# Power MOSFET, N Channel, 550 V, 22.5 A, 0.066 ohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:2729678RL/)

**URL**: https://novapart.co/products/STL36N55M5/power-mosfet-n-channel-550-v-225-a-0066-ohm
**SKU**: STL36N55M5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.3900
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:22.5A; Drain Source Voltage Vds:550V; On Resistance Rds(on):0.066ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vg

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 4Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 150W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 550V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 22.5A |
| Drain Source On State Resistance | 0.066ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2729678RL/)

## **STL36N55M5** 

N-channel 550 V, 0.066 Ω typ., 22.5 A MDmesh™ M5 Power MOSFET in a PowerFLAT™ 8x8 HV package 

**Datasheet — production data** 

## **Features** 

|**Features**||||
|---|---|---|---|
|**Order code**|**VDS@ **<br>**TJmax**|**RDS(on)**<br>**max**|**ID**|
|STL36N55M5|600 V|0.090Ω|22.5 A|



- Extremely low RDS(on) 

- Low gate charge and input 

- capacitance 

- Excellent switching performance 

- 100% avalanche tested 

## **Applications** 

## **Figure 1. Internal schematic diagram** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET based on MDmesh™ M5 innovative vertical process technology combined with the wellknown PowerMESH™ horizontal layout. The resulting product offers extremely low onresistance, making it particularly suitable for applications requiring high power and superior efficiency. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STL36N55M5|36N55M5|PowerFLAT™ 8x8 HV|Tape and reel|



_www.st.com_ 

September 2014 

DocID022602 Rev 4 

1/16 

This is information on a product in full production. 

**Contents** 

**STL36N55M5** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)       . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10**|
|**5**|**Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|550|V|
|VGS|Gate-source voltage|± 25|V|
|ID<br>(1)|Drain current (continuous) at TC= 25 °C|22.5|A|
|ID<br>(1)|Drain current (continuous) at TC= 100 °C|17|A|
|IDM<br>(1),(2)|Drain current (pulsed)|90|A|
|ID<br>(3)|Drain current (continuous) at Tamb= 25 °C|3.7|A|
|ID<br>(3)|Drain current (continuous) at Tamb= 100 °C|2.2|A|
|PTOT<br>(3)|Total dissipation at Tamb= 25 °C|2.8|W|
|PTOT<br>(1)|Total dissipation at TC= 25 °C|150|W|
|IAR|Avalanche current, repetitive or not-<br>repetitive (pulse width limited by Tj max)|7|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR, VDD= 50 V)|510|mJ|
|dv/dt(4)|Peak diode recovery voltage slope|15|V/ns|
|Tstg|Storage temperature|- 55 to 150|°C|
|Tj|Max. operating junction temperature|150|°C|



1. The value is rated according to Rthj-case and limited by package.. 

2. Pulse width limited by safe operating area. 

3. When mounted on FR-4 board of inch², 2 oz Cu. 

4. ISD ≤ 22.5 A, di/dt ≤ 400 A/µs, VPeak < V(BR)DSS, VDD = 340 V 

**Table 3. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case max|0.83|°C/W|
|Rthj-amb<br>(1)|Thermal resistance junction-ambient max|45|°C/W|



1. When mounted on FR-4 board of inch², 2 oz Cu. 

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**STL36N55M5** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 4. On /off states** 

|||**Table 4. On /off states**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 1 mA, VGS= 0|550|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 550 V|||1|µA|
|||VDS= 550 V, TC=125 °C|||100|µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 25 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 16.5 A||0.066|0.090|Ω|



**Table 5. Dynamic** 

|||**Table 5. Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0|-|2670|-|pF|
|Coss|Output capacitance||-|75|-|pF|
|Crss|Reverse transfer<br>capacitance||-|6.6|-|pF|
|Co(er)<br>(1)|Equivalent output<br>capacitance energy<br>related|VGS= 0,<br>VDS= 0 to 440 V|-|71|-|pF|
|Co(tr)<br>(2)|Equivalent output<br>capacitance time<br>related||-|192|-|pF|
|RG|Intrinsic gate<br>resistance|f = 1 MHz open drain|-|1.85|-|Ω|
|Qg|Total gate charge|VDD= 440 V, ID= 16.5 A,<br>VGS= 10 V<br>(see_Figure 16_)|-|62|-|nC|
|Qgs|Gate-source charge||-|15|-|nC|
|Qgd|Gate-drain charge||-|27|-|nC|



1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS 

2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS 

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**Electrical characteristics** 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|td(V)|Voltage delay time|VDD= 400 V, ID= 22 A,<br>RG= 4.7ΩVGS= 10 V<br>(see_Figure 20_)|-|56|-|ns|
|tr(V)|Voltage rise time||-|13|-|ns|
|tf(i)|Current fall time||-|13|-|ns|
|tc(off)|Crossing time||-|17|-|ns|



**Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD<br>(1)|Source-drain current||-||22.5|A|
|ISDM<br>(1),(2)|Source-drain current (pulsed)||-||90|A|
|VSD (3)|Forward on voltage|ISD= 22.5 A, VGS= 0|-||1.5|V|
|trr|Reverse recovery time|ISD= 22.5 A, di/dt = 100 A/µs<br>VDD= 100 V (see_Figure 17_)|-|292||ns|
|Qrr|Reverse recovery charge||-|4.2||µC|
|IRRM|Reverse recovery current||-|29||A|
|trr|Reverse recovery time|ISD= 22.5 A, di/dt = 100 A/µs<br>VDD= 100 V, Tj= 150 °C<br>(see_Figure 17_)|-|364||ns|
|Qrr|Reverse recovery charge||-|6||µC|
|IRRM|Reverse recovery current||-|33||A|



1. The value is rated according to Rthj-case and limited by package. 

2. Pulse width limited by safe operating area 

3. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**STL36N55M5** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

## **Figure 2. Safe operating area** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM14937v1<br>(A) Tj=150°C<br>Tc=25°C<br>Single pulse<br>10<br>10µs<br>100µs<br>1 1ms<br>10ms<br>0.1<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


## **Figure 4. Output characteristics** 

## **Figure 3. Thermal impedance** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
Zth PowerFLAT 8x8 HV<br>K<br>δ=0.5<br>0.2<br>0.1<br>10-1 0.05<br>0.02<br>0.01<br>Single pulse<br>10-2<br>10-5 10-4 10-3 10-2 tp [(s)]<br>**----- End of picture text -----**<br>


## **Figure 5. Transfer characteristics** 

**==> picture [462 x 375] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM14930v1 AM14931v1<br>ID (A) VGS=9, 10V ID (A) VDS=25V<br>70 8V 70<br>7V<br>60 60<br>50 50<br>40 40<br>30 30<br>6V<br>20 20<br>10 10<br>0 0<br>0 5 10 15 20 25 VDS(V) 3 4 5 6 7 8 9 VGS(V)<br>Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance<br>VGS AM14932v1 AM14933v2<br>VDS(V) RDS(on) (Ω)<br>(V) VDS VDD=440V 450 VGS=10V<br>0.071<br>12 ID=16.5A<br>400<br>0.069<br>10<br>350<br>0.067<br>300<br>8<br>0.065<br>250<br>6 0.063<br>200<br>0.061<br>150<br>4<br>0.059<br>100<br>2<br>50 0.057<br>0 0 0.055<br>0 10 20 30 40 50 60 70 Qg(nC) 0 5 10 15 20 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

## **Figure 8. Capacitance variations** 

**==> picture [203 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
C AM14934v1<br>(pF)<br>10000<br>Ciss<br>1000<br>SSA<br>100 MSN<br>Coss<br>10<br>Crss<br>1<br>0.1 1 10 100 VDS(V)<br>**----- End of picture text -----**<br>


## **Figure 9. Output capacitance stored energy** 

**==> picture [195 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
Eoss AM14935v1<br>(µJ)<br>10<br>8<br>6<br>4<br>2<br>0<br>0 100 200 300 400 500 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

**Figure 11. Normalized on-resistance vs temperature** 

**==> picture [433 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM05459v3 RDS(on) AM05460v3<br>(norm) ID=250µA (norm) VGS=10V<br>1.10 2.1<br>ID=16.5V<br>P| | | 1.9 +++. ++<br>1.00 1.7<br>PSSA | EEE<br>1.5<br>0.90 1.3<br>FPS | 1.1 EERE<br>aeeeNee |i}ttA<br>0.80 Pt | tT PAT 0.9 Pt [tr]] Tt TT<br>PLP 0.7 tt<br>0.70 0.5<br>-50 PP -25 0 Et 25 ET 50 eT 75 PN 100 TIN TJ(°C) -50 |ZaGgeeeee  pA -25 0 25 | 50 75 100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

**Figure 13. Normalized V(BR)DSS vs temperature** 

**==> picture [193 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM05461v3<br>(V) TJ=-50°C<br>1.2<br>1.0<br>a<br>0.8<br>Zoe TJ=25°C<br>| |<br>0.6<br>cr |<br>TJ=150°C<br>0.4<br>pT ET<br>0.2<br>pt} ty tt<br>0<br>0 pi 10 20 i i 30 | 40 | 50 ISD(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

## **Figure 14. Switching losses vs gate resistance (1)** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
E AM14936v1<br>(μJ)<br>ID=22A<br>Eon<br>600<br>VDD=400V<br>VGS=10V<br>500<br>400<br>300 Eoff<br>200<br>100<br>0<br>0 10 20 30 40 RG(Ω)<br>**----- End of picture text -----**<br>


1. Eon including reverse recovery of a SiC diode. 

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**Test circuits** 

## **3 Test circuits** 

**Figure 15. Switching times test circuit for resistive load** 

**Figure 16. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>**----- End of picture text -----**<br>


## **Figure 19. Unclamped inductive waveform** 

## **Figure 20. Switching time waveform** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS Id Concept waveform for Inductive Load Turn-off<br>VD<br>90%Vds 90%Id<br>Tdelay -off<br>IDM<br>Vgs<br>90%Vgs on<br>ID<br>Vgs(I(t ))<br>VDD VDD 10%Vds 10%Id<br>Vds<br>Trise Tfall<br>AM01472v1 Tcross - over AM05540v2<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK is an ST trademark. 

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**Package mechanical data** 

**==> picture [273 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 21. PowerFLAT™ 8x8 HV drawing mechanical data<br>**----- End of picture text -----**<br>


**==> picture [405 x 607] intentionally omitted <==**

**----- Start of picture text -----**<br>
8222871_REV_C<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

**Table 8. PowerFLAT™ 8x8 HV mechanical data** 

|**Dim.**|**mm**|**mm**|**mm**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|0.80|0.90|1.00|
|A1|0.00|0.02|0.05|
|b|0.95|1.00|1.05|
|D||8.00||
|E||8.00||
|D2|7.05|7.20|7.30|
|E2|4.15|4.30|4.40|
|e||2.00||
|L|0.40|0.50|0.60|



## **Figure 22. PowerFLAT™ 8x8 HV recommended footprint** 

**==> picture [398 x 352] intentionally omitted <==**

**----- Start of picture text -----**<br>
8222871_REV_C_footprint<br>**----- End of picture text -----**<br>


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**Packaging mechanical data** 

## **5 Packaging mechanical data** 

## **Figure 23. PowerFLAT™ 8x8 HV tape** 

**==> picture [405 x 257] intentionally omitted <==**

**----- Start of picture text -----**<br>
P2 (2.0±0.1) P0 (4.0±0.1)<br>T (0.30±0.05) D0 ( 1.55±0.05)<br>E (1.75±0.1)<br>D1 ( 1.5 Min)<br>P1 (12.00±0.1) A0 (8.30±0.1)<br>K0 (1.10±0.1)<br>Note: Base and Bulk quantity 3000 pcs<br>8229819_Tape_revA<br>)<br>)<br>F (7.50±0.1)<br>(B0 8.30±0.1 (W 16.00±0.3<br>**----- End of picture text -----**<br>


**Figure 24. PowerFLAT™ 8x8 HV package orientation in carrier tape.** 

**==> picture [405 x 143] intentionally omitted <==**

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**Packaging mechanical data** 

**==> picture [175 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 25. PowerFLAT™ 8x8 HV reel<br>**----- End of picture text -----**<br>


**==> picture [149 x 149] intentionally omitted <==**

**==> picture [167 x 149] intentionally omitted <==**

8229819_Reel_revA 

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**Revision history** 

## **6 Revision history** 

**Table 9. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|14-Dec-2011|1|First release.|
|17-Oct-2012|2|Updated:_Table 5_,_6_and_Table 7.: Source drain diode_typ. values|
|24-Jan-2013|3|– Modified:_Figure 1: Internal schematic diagram_ _4_and_6_<br>– Document status promoted from preliminary data to production<br>data<br>– Modified: VDDon_Table 5_<br>– Minor text changes|
|22-Sep-2014|4|– Updated title, features and description in cover page.<br>– Updated_Figure 1: Internal schematic diagram_.<br>– Updated_Section 4: Package mechanical data_.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2014 STMicroelectronics – All rights reserved 

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## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/stl36n55m5/power-mosfet-n-channel-22-5a-pwrflat/dp/2729678RL)
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