# Power MOSFET, N Channel, 600 V, 21 A, 0.115 ohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:2889931/)

**URL**: https://novapart.co/products/STL33N60DM2/power-mosfet-n-channel-600-v-21-a-0115-ohm
**SKU**: STL33N60DM2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.7100
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:21A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.115ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 3 - 168 hours |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 5Pins |
| Channel Type | N Channel |
| Product Range | MDmesh |
| Qualification | - |
| Power Dissipation | 150W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 21A |
| Drain Source On State Resistance | 0.115ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2889931/)

## **STL33N60DM2** 

N-channel 600 V, 0.115 Ω typ., 21 A MDmesh™ DM2 Power MOSFET in a PowerFLAT™ 8x8 HV package 

Datasheet - production data 

## **Features** 

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5<br>4<br>3<br>2<br>1<br>**----- End of picture text -----**<br>


|**Order code**|**VDS@ **<br>**TJmax**|**RDS(on)max**|**ID**|
|---|---|---|---|
|STL33N60DM2|650 V|0.140 Ω|21 A|



- Fast-recovery body diode 

- Extremely low gate charge and input capacitance 

- Low on-resistance 

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PowerFLAT™ 8x8 HV<br>**----- End of picture text -----**<br>


- 100% avalanche tested 

- Extremely high dv/dt ruggedness 

- Zener-protected 

**Figure 1: Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STL33N60DM2|33N60DM2|PowerFLAT™ 8x8 HV|Tape and reel|



March 2016 

DocID026781 Rev 2 

1/15 

This is information on a product in full production. 

_www.st.com_ 

|**Contents**<br>**STL33N60DM2**|**Contents**<br>**STL33N60DM2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package mechanical data ............................................................... 9**|
||4.1<br>PowerFLAT™ 8x8 HV package mechanical data ........................... 10|
||4.2<br>PowerFLAT™ 8x8 HV packing information ..................................... 12|
|**5**|**Revision history ............................................................................ 14**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 25|V|
|ID<br>_(1)_|Drain current (continuous) at TC= 25 °C|21|A|
|ID<br>_(1)_|Drain current (continuous) at TC= 100 °C|15|A|
|IDM<br>_(1)_,_(2)_|Drain current (pulsed)|84|A|
|PTOT<br>_(1)_|Total dissipation at TC= 25 °C|150|W|
|IAR|Avalanche current, repetitive or not-repetitive (pulse width limited by<br>Tjmax)|4.5|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR, VDD= 50 V)|570|mJ|
|dv/dt_(3)_|Peak diode recoveryvoltage slope|50|V/ns|
|dv/dt_(4)_|MOSFET dv/dt ruggedness|50|V/ns|
|Tstg|Storage temperature range|- 55 to 150|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

(1) The value is rated according to Rthj-case and limited by package. 

- (2) Pulse width limited by safe operating area. 

(3) ISD ≤ 21 A, di/dt ≤ 900 A/µs, VDS(peak) < V(BR)DSS, VDD = 400 V. 

- (4) VDS ≤ 480 V. 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case max|0.83|°C/W|
|Rthj-amb<br>_(1)_|Thermal resistancejunction-ambient max|45|°C/W|



## **Notes:** 

(1)When mounted on FR-4 board of inch², 2oz Cu. 

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**STL33N60DM2** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 4: On /off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown voltage|VGS= 0, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage<br>drain current|VGS= 0, VDS= 600 V|||1|µA|
|||VGS= 0,<br>VDS= 600 V, TC=125 °C_(1)_|||100|µA|
|IGSS|Gate-body leakage<br>current|VDS= 0, VGS= ± 25 V|||±10|µA|
|VGS(th)|Gate threshold<br>voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source<br>on- resistance|VGS= 10 V, ID= 10.5 A||0.115|0.140|Ω|



## **Notes:** 

(1) Defined by design, not subject to production test. 

**Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0|-|1870|-|pF|
|Coss|Output capacitance||-|87|-|pF|
|Crss|Reverse transfer<br>capacitance||-|2|-|pF|
|Coss eq.<br>_(1)_|Equivalent output<br>capacitance|VDS= 0 to 480 V, VGS= 0|-|157|-|pF|
|RG|Intrinsic gate<br>resistance|f = 1 MHz, ID=0 A|-|4.5|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 21 A<br>VGS= 10 V<br>(see_Figure 15: "Gate_<br>_charge test circuit"_)|-|43|-|nC|
|Qgs|Gate-source charge||-|9.8|-|nC|
|Qgd|Gate-drain charge||-|21.4|-|nC|



## **Notes:** 

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%[V] DSS[.] 

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**Electrical characteristics** 

**Table 6: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 10.5 A<br>RG= 4.7 Ω, VGS= 10 V<br>(see_Figure 14: "Switching_<br>_times test circuit for resistive_<br>_load"_)|-|17|-|ns|
|tr|Rise time||-|8|-|ns|
|td(off)|Turn-off delaytime||-|62|-|ns|
|tf|Fall time||-|9|-|ns|



**Table 7: Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD<br>_(1)_|Source-drain current||-||21|A|
|ISDM<br>_(1)(2)_|Source-drain current<br>(pulsed)||-||84|A|
|VSD<br>_(3)_|Forward on voltage|ISD= 21 A, VGS= 0|-||1.6|V|
|trr|Reverse recoverytime|ISD= 21 A, di/dt = 100 A/µs<br>VDD= 100 V (see_Figure 16: " Test_<br>_circuit for inductive load switching_<br>_and diode recovery times"_)|-|120||ns|
|Qrr|Reverse recovery<br>charge||-|0.53||µC|
|IRRM|Reverse recovery<br>current||-|8.8||A|
|trr|Reverse recoverytime|ISD= 21 A, di/dt = 100 A/µs<br>VDD= 100 V, Tj= 150 °C<br>(see_Figure 16: " Test circuit for_<br>_inductive load switching and diode_<br>_recovery times"_)|-|316||ns|
|Qrr|Reverse recovery<br>charge||-|2.85||µC|
|IRRM|Reverse recovery<br>current||-|18||A|



## **Notes:** 

(1) The value is rated according to Rthj-case and limited by package. 

(2) Pulse width limited by safe operating area 

(3) Pulsed: pulse duration = 300 μs, duty cycle 1.5% 

**Table 8: Gate-source Zener diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)GSO|Gate-source breakdown voltage|IGS= ±250µA, ID= 0 A|±30|-|-|V|



The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. 

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**Electrical characteristics** 

## **2.2 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

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**----- Start of picture text -----**<br>
Figure 3: Thermal impedance<br>K Zth PowerFLAT 8x8 HV<br>δ=0.5<br>0.2<br>0.1<br>10-1 _ —ov f 0.05<br>Yo<br>4Le 0.01 0.02 Zth= K*RthJ-c<br>δ= tp/ Ƭ<br>oH<br>Single pulse<br>1010-2 -5 10 -4 10 -3 10tp-2  Ƭ tp [(s)]<br>**----- End of picture text -----**<br>


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Figure 4: Output characteristics  Figure 5: Transfer characteristics<br>**----- End of picture text -----**<br>


**Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance** 

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**Electrical characteristics** 

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Figure 8: Capacitance variations  Figure 9: Normalized gate threshold voltage<br>vs temperature<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs  Figure 11: Normalized V(BR)DSS vs temperature<br>temperature<br>**----- End of picture text -----**<br>


**Figure 12: Output capacitance stored energy Figure 13: Source- drain diode forward characteristics** 

**==> picture [162 x 142] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

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Figure 14: Switching times test circuit for  Figure 15: Gate charge test circuit<br>resistive load<br>oVpo<br>12V | 47kQ | 1kQ<br>100 nF<br>RL 2200 3.3<br>+ µF µF VDD Ves ’ lg=° CONST 100 9 D . U. T.<br>— VD 1. ° C} Co Hy<br>| — VGS RG D.U.T. pulse width 2200u F | 27 kOCZ 4 — OV<br>PW 47kQ<br>—<br>1kQ<br>GND1 GND2<br>(driver signal) (power) — — GND1 GND2<br>AM15855v1 AM01469v2<br>Figure 16:  Test circuit for inductive load  Figure 17:  Unclamped inductive load test<br>switching and diode recovery times  circuit<br>A A fe) A<br>D L<br>G D.U.T. FASTDIODE L=100µH<br>VD<br>S B 3.3 1000 2200 3.3<br>25Ω B B D µF + µF VDD + µF µF VDD<br>G ID<br>RG S<br>+ D.U.T.<br>Vi D.U.T.<br>1 )<br>GND1 GND2 Pw<br>AM15857v1 GND1 GND2 AM15858v1<br>**----- End of picture text -----**<br>


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Figure 18: Unclamped inductive waveform  Figure 19: Switching time waveform<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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## **Package mechanical** data 

- **4.1 PowerFLAT™ 8x8 HV package mechanical data** 

**Figure 20: PowerFLAT™ 8x8 HV package outline** 

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8222871_Rev_3_ A<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

|**Dim.**|**mm**|**mm**|**mm**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|0.75|0.85|0.95|
|A1|0.00||0.05|
|A3|0.10|0.20|0.30|
|b|0.90|1.00|1.10|
|D|7.90|8.00|8.10|
|E|7.90|8.00|8.10|
|D2|7.10|7.20|7.30|
|E1|2.65|2.75|2.85|
|E2|4.25|4.35|4.45|
|e||2.00||
|L|0.40|0.50|0.60|



**Figure 21: PowerFLAT™ 8x8 HV footprint** 

All dimensions are in millimeters. 

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**Package mechanical** data 

## **4.2 PowerFLAT™ 8x8 HV packing information** 

**Figure 22: PowerFLAT™ 8x8 HV tape** 

**Figure 23: PowerFLAT™ 8x8 HV package orientation in carrier tape** 

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**Package mechanical** data 

**Figure 24: PowerFLAT™ 8x8 HV reel** 

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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|08-Aug-2014|1|First release.|
|09-Mar-2016|2|Updated title and internal schematic in cover page.<br>Document status promoted from preliminary data to production<br>data.<br>Modified:_Table 2: "Absolute maximum ratings"_,_Table 4: "On /off_<br>_states"_,_Table 5: "Dynamic"_,_Table 6: "Switching times"_and_Table_<br>_7: "Source drain diode"_<br>Added:_Section 4.1: "Electrical characteristics (curves)"_<br>Updated:_Section 6.1: "PowerFLAT™ 8x8 HV package mechanical_<br>_data"_<br>Minor text changes|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

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