# Power MOSFET, N Channel, 100 V, 107 A, 5000 µohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:3129710RL/)

**URL**: https://novapart.co/products/STL110N10F7/power-mosfet-n-channel-100-v-107-a-5000-ohm
**SKU**: STL110N10F7
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.0300
**Stock**: 10+
**Lead Time**: 147 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:107A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.005ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4.5

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | STripFET F7 |
| Qualification | - |
| Power Dissipation | 136W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 136W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.005ohm |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 107A |
| Drain Source On State Resistance | 5000µohm |
| Automotive Qualification Standard | - |
| Gate Source Threshold Voltage Max | 4.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3129710RL/)

**STL110N10F7** 

N-channel 100 V, 5 mΩ typ., 107 A, STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STL110N10F7|100 V|6 mΩ|107 A|136 W|



- Among the lowest RDS(on) on the market 

- Excellent FoM (figure of merit) 

- Low Crss/Ciss ratio for EMI immunity 

- High avalanche ruggedness 

## **Applications** 

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**----- Start of picture text -----**<br>
D(5, 6, 7, 8) 8 7 6 5<br>G(4)<br>1 2 3 4<br>& [| I<br>S(1, 2, 3) Top View<br>AM15540v2<br>Product status link<br>STL110N10F7<br>Product summary<br>Order code STL110N10F7<br>Marking 110N10F7<br>Package PowerFLAT™ 5x6<br>Packing Tape and reel<br>**----- End of picture text -----**<br>


- Switching applications 

## **Description** 

This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. 

**DS9392** - **Rev 5** - **September 2018** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STL110N10F7 Electrical ratings** 

**1** 

## **Electrical ratings** 

**Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|100|V|
|VGS|Gate-source voltage|±20|V|
|ID(1)|Drain current (continuous) at TC= 25 °C|107|A|
||Drain current (continuous) at TC= 100 °C|75|A|
|IDM(1)(2)|Drain current (pulsed)|428|A|
|ID(3)|Drain current (continuous) at TC= 25 °C|21|A|
||Drain current (continuous) at TC=100 °C|14|A|
|IDM(2)(3)|Drain current (pulsed)|84|A|
|PTOT(1)|Total dissipation at TC= 25 °C|136|W|
|PTOT(3)|Total dissipation at Tpcb= 25 °C|4.8|W|
|EAS(4)|Single pulse avalanche energy|490|mJ|
|TJ|Operating junction temperature range|-55 to 175|°C|
|Tstg|Storage temperature range|||



_1. This value is rated according to Rthj-c._ 

_2. Pulse width limited by safe operating area._ 

_3. This value is rated according to Rthj-pcb._ 

_4. Starting TJ = 25 °C, ID = 18 A, VDD = 50 V_ 

**Table 2. Thermal resistance** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|1.1|°C/W|
|Rthj-pcb(1)|Thermal resistance junction-pcb|31.3|°C/W|



_1. When mounted on an FR-4 board of 1 inch², 2oz Cu, t < 10 s._ 

**DS9392** - **Rev 5** 

**page 2/13** 

**STL110N10F7 Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 3. On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|VGS= 0 V, ID= 250 µA|100|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 100 V|||1|µA|
|||VGS= 0 V, VDS= 100 V, TC= 125 °C(1)|||10||
|IGSS|Gate body leakage current|VDS= 0, VGS= 20 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2.5||4.5|V|
|RDS(on)|Static drain-source on‑resistance|VGS= 10 V, ID= 10 A||5|6|mΩ|



_1. Defined by design, not subject to production test._ 

**Table 4. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 50 V, f = 1 MHz, VGS= 0 V|-<br>-<br>-|5117|-|pF|
|Coss|Output capacitance|||992|-||
|Crss|Reverse transfer capacitance|||39|-||
|Qg|Total gate charge|VDD= 50 V, ID= 21 A,<br>VGS= 0 to 10 V (seeFigure 15. Test<br>circuit for gate charge behavior|-<br>-<br>-|72|-|nC|
|Qgs|Gate-source charge|||30|-||
|Qgd|Gate-drain charge|||17|-||



**Table 5. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 50 V, ID= 10 A,<br>RG= 4.7 Ω, VGS= 10 V (see<br>Figure 14. Test circuit for resistive<br>load switching timesandFigure<br>19. Switching time waveform)|-|25|-|ns|
|tr|Rise time||-|36|-|ns|
|td(off)|Turn-off delay time||-|52|-|ns|
|tf|Fall time||-|21|-|ns|



**Table 6. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD(1)|Forward on voltage|ISD= 21 A, VGS= 0 V|-||1.2|V|
|trr|Reverse recovery time|ISD= 21 A, di/dt = 100 A/µs,<br>VDD= 80 V, Tj= 150 °C (see<br>Figure 16. Test circuit for inductive<br>load switching and diode recovery<br>times)|-|77||ns|
|Qrr|Reverse recovery charge||-|150||nC|
|IRRM|Reverse recovery current||-|4.3||A|



_1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%_ 

**DS9392** - **Rev 5** 

**page 3/13** 

**STL110N10F7 Electrical characteristics (curves)** 

## **2.1 Electrical characteristics (curves)** 

**Figure 3. Safe operating area** 

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**----- Start of picture text -----**<br>
ID AM16083v1<br>(A)<br>10<br>1<br>Tj=175 ° C  10ms<br>Tpcb=25°C  100ms<br>Single pulse<br>0.1 1s<br>0.1  1  10  VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4. Thermal impedance** 

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**----- Start of picture text -----**<br>
K  AM16096v1<br>δ=0.5<br>0.2<br>10 [-1] 0.1<br>0.05<br>0.02<br>Z th = K R thj-pcb<br>10 [-2] 0.01<br>Single pulse<br>10 [-3]<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 0 10 1 tp(s)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 5. Output characteristics Figure 6. Transfer characteristics<br>AM16084v1 AM16085v1<br>ID<br>ID(A)  VGS = 8, 9, 10 V (A)<br>160  70 VDS=2V<br>7V<br>140<br>60<br>120<br>50<br>100<br>6V<br>40<br>80<br>30<br>60<br>40  20<br>5V<br>20  10<br>4V<br>0 0<br>0  2  4  6  8  VDS(V)  0  2  4  6  8  VGS(V)<br>Figure 7. Gate charge vs gate-source voltage<br>Figure 8. Static drain-source on-resistance<br>AM16085v1<br>ID AM16087v1<br>(A)  RDS(on)<br>70 VDS=2V (mΩ)  VGS=10V<br>5.06<br>60<br>5.04<br>50<br>5.02<br>40<br>5.00<br>30<br>4.98<br>20<br>4.96<br>10<br>4.94<br>0  2  4  6  8  10 12  14 16 18 20 ID(A)<br>0  2  4  6  8  VGS(V)<br>**----- End of picture text -----**<br>


**DS9392** - **Rev 5** 

**page 4/13** 

**STL110N10F7 Electrical characteristics (curves)** 

**Figure 9. Capacitance variations** 

**==> picture [199 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
C  AM16088v1<br>(pF)<br>6000<br>5000  Ciss<br>4000<br>3000<br>2000<br>1000<br>Coss<br>0  Crss<br>0  10  20  30  40 50 60 70 80  VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

**==> picture [200 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM16089v1<br>(norm)<br>1.2 ID=250µA<br>1.1<br>1<br>0.9<br>0.8<br>0.7<br>0.6<br>0.5<br>0.4<br>-75  -50  -25  0 25  50  75  100 125 150  TJ(°C)<br>**----- End of picture text -----**<br>


**==> picture [513 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 11. Normalized on-resistance vs temperature Figure 12. Source-drain diode forward characteristics<br>RDS(on ) AM16090v1 VSD(V)  AM16092v1<br>(norm)<br>TJ=-55°C<br>2  ID=10 A<br>VGS=10 V 0.9<br>1.8<br>TJ=25°C<br>1.6  0.8<br>1.4<br>0.7<br>1.2  TJ=175°C<br>1  0.6<br>0.8<br>0.5<br>0.6<br>0.4  0.4<br>-75 -50  -25  0 25  50  75 100 125 150TJ(°C) 2  4  6  8 10  12  14 16 18 20 ISD(A)<br>**----- End of picture text -----**<br>


**Figure 13. Normalized V(BR)DSS vs temperature** 

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**----- Start of picture text -----**<br>
V(BR)DSS AM16091v1<br>(norm)<br>ID=1mA<br>1.04<br>1.02<br>1<br>0.98<br>0.96<br>0.94<br>-50  -25  0  25  50  75  100  TJ(°C)<br>**----- End of picture text -----**<br>


**DS9392** - **Rev 5** 

**page 5/13** 

**STL110N10F7 Test circuits** 

**3 Test circuits** 

**==> picture [513 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width 2200 + 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 184] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 16. Test circuit for inductive load switching and<br>Figure 17. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 19. Switching time waveform<br>Figure 18. Unclamped inductive waveform<br>ton toff<br>V(BR)DSS<br>td(on) tr td(off) tf<br>VD<br>90% 90%<br>IDM<br>ID 0 10% VDS 10%<br>VDD VDD VGS 90%<br>AM01472v1 0 10%<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS9392** - **Rev 5** 

**page 6/13** 

**STL110N10F7 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

## **4.1 PowerFLAT™ 5x6 type C package information** 

**Figure 20. PowerFLAT™ 5x6 type C package outline** 

**==> picture [48 x 262] intentionally omitted <==**

**----- Start of picture text -----**<br>
Bottom view<br>Side view<br>Top view<br>**----- End of picture text -----**<br>


**==> picture [59 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
8231817_typeC_A0ER_Rev16<br>**----- End of picture text -----**<br>


**DS9392** - **Rev 5** 

**page 7/13** 

**STL110N10F7 PowerFLAT™ 5x6 type C package information** 

**Table 7. PowerFLAT™ 5x6 type C package mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|0.80||1.00|
|A1|0.02||0.05|
|A2||0.25||
|b|0.30||0.50|
|C|5.80|6.00|6.20|
|D|5.00|5.20|5.40|
|D2|4.15||4.45|
|D3|4.05|4.20|4.35|
|D4|4.80|5.00|5.20|
|D5|0.25|0.40|0.55|
|D6|0.15|0.30|0.45|
|e||1.27||
|E|5.95|6.15|6.35|
|E2|3.50||3.70|
|E3|2.35||2.55|
|E4|0.40||0.60|
|E5|0.08||0.28|
|E6|0.20|0.325|0.45|
|E7|0.75|0.90|1.05|
|K|1.05||1.35|
|L|0.725||1.025|
|L1|0.05|0.15|0.25|
|θ|0°||12°|



**Figure 21. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)** 

**==> picture [79 x 113] intentionally omitted <==**

**==> picture [85 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
8231817_FOOTPRINT_simp_Rev_16<br>**----- End of picture text -----**<br>


**DS9392** - **Rev 5** 

**page 8/13** 

**STL110N10F7 PowerFLAT™ 5x6 packing information** 

## **4.2 PowerFLAT™ 5x6 packing information** 

## **Figure 22. PowerFLAT™ 5x6 tape (dimensions are in mm)** 

**==> picture [286 x 85] intentionally omitted <==**

**----- Start of picture text -----**<br>
(I)   Measured from centreline of sprocket hole<br>      to centreline of pocket. Base and bulk quantity 3000 pcs<br>All dimensions are in millimeters<br>(II)  Cumulative tolerance of 10 sprocket<br>      holes is ±0.20.<br>(III) Measured from centreline of sprocket<br>      hole to centreline of pocket<br>8234350_Tape_rev_C<br>**----- End of picture text -----**<br>


**==> picture [272 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 23. PowerFLAT™ 5x6 package orientation in carrier tape<br>**----- End of picture text -----**<br>


**==> picture [36 x 14] intentionally omitted <==**

**----- Start of picture text -----**<br>
Pin 1<br>identification<br>**----- End of picture text -----**<br>


**==> picture [391 x 145] intentionally omitted <==**

**DS9392** - **Rev 5** 

**page 9/13** 

**STL110N10F7 PowerFLAT™ 5x6 packing information** 

**Figure 24. PowerFLAT™ 5x6 reel** 

**DS9392** - **Rev 5** 

**page 10/13** 

**STL110N10F7** 

## **Revision history** 

**Table 8. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|03-Dec-2012|1|First release.|
|12-Dec-2013|2|Modified: PTOTvalue and_Figure 1_in cover page<br>Modified: ID, IDMand PTOTvalues in_Table 2_<br>Added: EASvalue in_Table 2_<br>Modified: all values in_Table 3_<br>Modified: IDSS, IGSSand IDfor RDS(on)<br>Updated: the entire typical values in_Table 5, 6_and_7_<br>Updated:_Figure 13, 14, 15_and_16_<br>Minor text changes|
|25-Mar-2014|3|Updated title and features on cover page.<br>Added PTOTvalue at TC= 25 °C in_Table 2: Absolute maximum ratings_.<br>Updated_Section 4: Package mechanical data_.|
|20-Aug-2014|4|Modified: title, features and description<br>Modified:_Figure 2_and_3_<br>Updated:_Section 4: Package mechanical data_.<br>Minor text changes|
|17-Sep-2018|5|Removed maturity status indication.<br>Updated title and description on cover page.<br>UpdatedTable 1. Absolute maximum ratingsandTable 6. Source-drain diode.<br>UpdatedSection 4.1 PowerFLAT™ 5x6 type C package information.<br>Minor text changes|



**DS9392** - **Rev 5** 

**page 11/13** 

**STL110N10F7 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
||**4.1**<br>PowerFLAT™ 5x6 type C package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
||**4.2**<br>PowerFLAT™ 5x6 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11**||



**DS9392** - **Rev 5** 

**page 12/13** 

**STL110N10F7** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2018 STMicroelectronics – All rights reserved 

**DS9392** - **Rev 5** 

**page 13/13** 



## Links

- [View this product on Novapart](https://novapart.co/products/STL110N10F7/power-mosfet-n-channel-100-v-107-a-5000-ohm)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stl110n10f7/mosfet-n-ch-100v-107a-powerflat/dp/3129710RL)
---

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