# Power MOSFET, N Channel, 100 V, 80 A, 7300 µohm, PowerFLAT, Surface Mount

![Product image](https://novapart.co/image/farnell:4036319/)

**URL**: https://novapart.co/products/STL100N10F7/power-mosfet-n-channel-100-v-80-a-7300-ohm
**SKU**: STL100N10F7
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.0000
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | STripFET VII DeepGATE Series |
| Qualification | - |
| Power Dissipation | 100W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerFLAT |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 80A |
| Drain Source On State Resistance | 7300µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:4036319/)

## **STL100N10F7** 

N-channel 100 V, 0.0062 Ω typ., 19 A, STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 5x6 package **Datasheet** - **production data Features R Order code VDSS DS(on) ID PTOT max** 1 2 STL100N10F7 100 V 0.0073 Ω 19 A 5 W 3 4 • Ultra low on-resistance **PowerFLAT™ 5x6** • 100% avalanche tested **Applications** • Switching applications ~~=~~ **Description Figure 1. Internal schematic diagram** This device is an N-channel Power MOSFET D(5, 6, 7, 8) 8 7 6 5 developed using the 7[[th]] generation of STripFET™ DeepGATE™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.DS(on) in all packages. in all packages. G(4) 1 2 3 4 ~~ru~~ Top View S(1, 2, 3) AM15540v2 

This device is an N-channel Power MOSFET developed using the 7[[th]] generation of STripFET™ DeepGATE™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.DS(on) in all packages. in all packages. 

**Table 1. Device summary** 

|**Order code**<br>~~——~~|**Marking**<br>~~——~~|**Package**|**Packaging**|
|---|---|---|---|
|STL100N10F7<br>~~——~~|100N10F7<br>~~——~~|PowerFLAT™ 5x6|Tape and reel|



July 2013 

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This is information on a product in full production. 

_www.st.com_ 

**Contents** 

**STL100N10F7** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)           . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|



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**STL100N10F7** 

**Electrical ratings** 

## **1 Electrical ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|100|V|
|VGS|Gate-source voltage|± 20|V|
|ID<br>(1)|Drain current (continuous) at TC= 25 °C|80|A|
|ID<br>(1)|Drain current (continuous) at TC= 100 °C|70|A|
|ID<br>(2)|Drain current (continuous) at Tpcb= 25 °C|19|A|
|ID<br>(2)|Drain current (continuous) at Tpcb=100 °C|13|A|
|IDM<br>(2)(3)|Drain current (pulsed)|76|A|
|PTOT<br>(1)|Total dissipation at TC= 25 °C|100|W|
|PTOT<br>(2)|Total dissipation at Tpcb= 25 °C|5|W|
|TJ<br>Tstg|Operating junction temperature<br>Storage temperature|-55 to 175|°C|



1. This value is rated according to Rthj-c. 

2. This value is rated according to Rthj-pcb. 

3. Pulse width limited by safe operating area. 

**Table 3. Thermal resistance Symbol Parameter Value Unit** Rthj-case Thermal resistance junction-case 1.56 °C/W ~~—~~ Rthj-pcb (1) Thermal resistance junction-pcb 31 °C/W 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec **Table 4. Avalanche data Symbol Parameter Value Unit** Single pulse avalanche energy EAS (TJ = 25 °C, L = 3.5 mH, IAS = 15 A, VDD = 50 V, 400 mJ VGS = 10 V) ~~eeee~~ 

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**STL100N10F7** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE=25 °C unless otherwise specified) 

**Table 5. On/off states** 

**Symbol Parameter Test conditions Min. Typ. Max. Unit** Drain-source breakdown V(BR)DSS voltage (VGS= 0) ID = 250 µA 100 V Zero gate voltage drain VDS = 100 V 1 µA IDSS current (VGS = 0) VDS = 100 V; TC=125 °C 100 µA Gate body leakage current IGSS (VDS = 0) VGS = +20 V 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 2 4 V Static drain-source onRDS(on) resistance VGS= 10 V, ID= 19 A 0.0062 0.0073 Ω ~~Si~~ **Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit** Ciss Input capacitance - 4369 5680 pF Coss Output capacitance VDS =50 V, f=1 MHz, - 823 1070 pF Reverse transfer VGS=0 Crss capacitance - 36 47 pF Qg Total gate charge VDD=50 V, ID = 19 A - 61 80 nC Qgs Gate-source charge VGS =10 V - 26 nC ~~se~~ Qgd Gate-drain charge _Figure 14_ - 13 nC **Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit** td(on) Turn-on delay time - 27 - ns tr Rise time VDD=50 V, ID= 19 A, - 40 - ns RG=4.7 Ω, VGS= 10 V td(off) Turn-off delay time _Figure 13_ - 46 - ns tf Fall time - 15 - ns ~~aa~~ DocID023656 Rev 4 

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**STL100N10F7** 

**Electrical characteristics** 

**Table 8. Source drain diode** 

|**Symbol**<br>~~ee~~|**Parameter**<br>~~ee~~|**Test conditions**<br>~~ee~~|**Min**<br>~~ee~~|**Typ.**<br>~~ee~~|**Max**<br>~~ee~~|**Unit**<br>~~ee~~|
|---|---|---|---|---|---|---|
|ISD<br>~~a~~|Source-drain current||-||19|A|
|ISDM<br>(1)<br>~~a~~<br>~~a~~|Source-drain current (pulsed)||-||76|A|
|VSD<br>(2)<br>~~a~~<br>~~a~~<br>~~ee ee~~|Forward on voltage<br>~~ee~~|ISD= 38 A, VGS=0|-<br>~~fT~~|~~fT~~|1.2<br>~~fT~~|V<br>~~fT~~|
|trr<br>~~a~~<br>~~ee ee~~<br>~~ee~~<br>~~a~~|Reverse recovery time<br>~~ee~~<br>~~ee~~<br>|ISD= 19 A,<br>di/dt = 100 A/µs,<br>VDD=80 V, Tj=150 °C|-<br>~~fT~~<br>~~ft~~|77<br>~~fT~~<br>~~ft~~<br>~~ft~~|~~fT~~<br>~~ft~~<br>~~ft~~|ns<br>~~fT~~<br>~~ft~~|
|Qrr<br>~~ee ee~~<br>~~ee~~<br>~~a~~|Reverse recovery charge<br>~~ee~~<br>~~ee~~<br>~~ee~~||-<br>~~fT~~<br>~~ft~~<br>~~tt~~|146<br>~~fT~~<br>~~ft~~<br>~~ft~~<br>~~tt~~|~~fT~~<br>~~ft~~<br>~~ft~~<br>~~tt~~|nC<br>~~fT~~<br>~~ft~~<br>~~tt~~|
|IRRM<br>~~ee~~<br>~~a ~~|Reverse recovery current<br>~~ee~~<br> ~~ee~~||-<br>~~ft~~<br>~~tt~~|4<br>~~ft~~<br>~~ft~~<br>~~tt~~|~~ft~~<br>~~ft~~<br>~~tt~~|A<br>~~ft~~<br>~~tt~~|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration=300µs, duty cycle 1.5% 

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**STL100N10F7** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**==> picture [428 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2. Safe operating area Figure 3. Thermal impedance<br>ID _—————— ee AM15617v1 K ge PF<br>(A)<br>100 aFf At| a10-2LCss2<br>Pee ee eee pee  aese|<br>10<br>SSS vo 2M eT TAIT TT<br>1 SSLd NN ease2ees0eet sth0 e esti -pcb<br>Tj=175°C 10ms<br>=eariiil Tc=25°C SSN 100ms eg Ma<br>0.1 1s<br>Single<br>0.010.1 aeiiil 1 pulse 10 att VDS(V) p 10-5 10-4 105 e = 10- 2 10-1 12 10!<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**==> picture [425 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 4. Output characteristics Figure 5. Transfer characteristics<br>AM15623v1 AM15618v1<br>ID ID<br>(A) VGS=10 V (A)<br>300 300 VDS= 5 V<br>VGS=9 V<br>250 |pLgr 250 aa foa<br>200 a fe VGS=8 V 200 PEL |<br>150 Gm V GS = 7 V 150 TAL<br>100 | {Sfo T 100 PEELELTATVE T TT<br>VGS= 6 V<br>50 7 a 50 f<br>IY __— PELE<br>VGS= 5 V<br>0 Jr 0 EEPARREEEE<br>0 1 2 3 4 VDS(V) 2 4 6 8 10 VGS(V)<br>**----- End of picture text -----**<br>


**Figure 6. Gate charge vs gate-source voltage** 

**Figure 7. Static drain-source on-resistance** 

**==> picture [425 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM15624v1 RDS(on) AM15621v1<br>(V) (mΩ) VGS=10V<br>VDD=50V<br>12<br>ID=100A<br>12<br>10<br>10<br>8<br>8<br>6<br>6<br>4<br>4<br>2 2<br>0 0<br>0 20 40 60 Qg(nC) 0 20 40 60 80 100 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8. Capacitance variations** 

**Figure 9. Normalized BVDSS vs temperature** 

**==> picture [429 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
C AM15625v1 VDS AM15619v1<br>(pF) (norm)<br>5000 1.04 ID = 1mA<br>Ciss<br>4000 BERREREEEE 1.02 Hh) cee<br>See | 7 “|<br>3000 SRRRRRREEE 1 GREP 4eeee<br>2000 0.98<br>MELEE EPZERREaE<br>1000 0.96<br>PPA ET YALL TELL<br>Coss<br>0 Crss 0.94<br>Nel PTTL ETT E<br>0 20 40 60 80 VDS(V) -55 -30 -5 20 45 70 95 120 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage vs temperature** 

**==> picture [203 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM15622v1<br>(norm)<br>1 ID = 250 µA<br>0.95<br>P| | | eA TT<br>0.9<br>ae eeNe<br>0.85 Pte<br>0.8 Pt tTETeTTE T E NAE<br>0.75 A<br>0.7<br>0.65 HERE EE<br>0.6 Fit] tT tT |<br>-55 -30 -5 20 45 70 95 120 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 11. Normalized on-resistance vs temperature** 

**==> picture [202 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) AM06484v2<br>(norm)<br>2.1 ID=50 A<br>1.71.9 Pt tte EY<br>1.5 rT<br>TA<br>1.3<br>rT ToL 7<br>1.1<br>pt [ttAt]<br>0.9<br>0.7 HEEZ| EAE| ts<br>0.5 rT | | | tt<br>-50 -25 0 25 50 75 100 TJ(°C)<br>**----- End of picture text -----**<br>


## **Figure 12. Source-drain diode forward characteristics** 

**==> picture [193 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM15620v1<br>(V)<br>1.1 TJ=-50°C<br>1 sea<br>0.9 paar an<br>TJ=25°C<br>a<br>0.8<br>0.7 TJ=150°C<br>ealeee<br>0.6 yw |<br>0.5<br>Pt tT et|<br>0 20 40 60 80 100 ISD(A)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 13. Switching times test circuit for resistive load** 

**Figure 14. Gate charge test circuit** 

**==> picture [442 x 151] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [445 x 314] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform<br>V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**STL100N10F7** 

**Package mechanical data** 

**Table 9. PowerFLAT 5x6 type S-R mechanical data** 

||**Table 9. PowerFLAT 5x6 type S-R mechanical dataype S-R mechanical datae S-R mechanical data**|**Table 9. PowerFLAT 5x6 type S-R mechanical dataype S-R mechanical datae S-R mechanical data**|**Table 9. PowerFLAT 5x6 type S-R mechanical dataype S-R mechanical datae S-R mechanical data**|
|---|---|---|---|
|**Dim.**<br>~~a~~|**mm**<br>~~ee ee~~|||
||**Min.**<br>~~es~~|**Typ.**<br>~~es~~<br>~~ee ee~~|**Max.**<br>~~es~~<br>~~ee~~|
|A<br>~~a~~|0.80|~~ee ee~~|1.00<br>~~ee~~|
|A1<br>~~a~~|0.02||0.05|
|A2<br>~~a~~||0.25||
|b<br>~~a~~<br>~~Rs~~|0.30||0.50|
|D<br>~~Rs~~<br>~~Rs~~|5.00|5.20|5.40|
|E<br>~~Rs~~<br>~~Rs~~|5.95|6.15|6.35|
|D2<br>~~Rs~~<br>~~a~~|4.11||4.31|
|E2<br>~~a~~|3.50||3.70|
|e<br>~~a~~||1.27||
|L<br>~~a~~|0.60||0.80|
|K<br>~~a~~|1.275||1.575|



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**Package mechanical data** 

**==> picture [330 x 476] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 19. PowerFLAT 5x6 type S-R drawing<br>5 8<br>Bottom View<br>rest<br>Pin 1<br>identification<br>oe<br>4 1<br>Side View<br>8 5<br>.<br>Top View<br>Pin 1  1 4<br>identification<br>8231817_Rev.F_Ribbon type S-R<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

**==> picture [347 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20. PowerFLAT™ 5x6 recommended footprint (dimensions in mm)<br>**----- End of picture text -----**<br>


**==> picture [24 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
Footprint<br>**----- End of picture text -----**<br>


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**Packaging mechanical data** 

## **5 Packaging mechanical data** 

**==> picture [168 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 21. PowerFLAT™ 5x6 tape [(a)]<br>**----- End of picture text -----**<br>


**==> picture [437 x 226] intentionally omitted <==**

**----- Start of picture text -----**<br>
P 2 P 0<br>(0.30 T ±0.05) Do 2.0±0.1 (I) 4.0±0.1 (II) E1<br>Ø1.55±0.05 Y 1.75±0.1<br>TL<br>D1<br>Ø1.5 MIN.<br>CL<br>Y<br>P1(8.00±0.1) Ao(6.30±0.1)<br>i Ko (1.20±0.1)<br>SECTION Y-Y<br>(I) Measured from centerline of sprocket holeto centerline of pocket. Base and bulk quantity 3000 pcs<br>(II) Cumulative tolerance of 10 sprocket<br>holes is ± 0.20 .<br>(III) Measured from centerline of sprocket<br>hole to centerline of pocket.<br>8234350_Tape_rev_C<br>REF.R0.50<br>REF 0.20<br>))((IIIF5.50±0.1 )(W12.00±0.3<br>5.30±0.1)(Bo<br>**----- End of picture text -----**<br>


## **Figure 22. PowerFLAT™ 5x6 package orientation in carrier tape.** 

**==> picture [33 x 12] intentionally omitted <==**

**----- Start of picture text -----**<br>
Pin 1<br>identification<br>**----- End of picture text -----**<br>


- a. All dimensions are in millimeters. 

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**STL100N10F7** 

**Packaging mechanical data** 

## **Figure 23. PowerFLAT™ 5x6 reel** 

**==> picture [388 x 251] intentionally omitted <==**

**----- Start of picture text -----**<br>
R0.60<br>W3<br>PART NO. 11.9/15.4<br>1 .90<br>2.50<br>W2<br>18.4 (max)<br>R25.00<br>   ØN    A<br>4.00 178(±2.0) 330 (+0/-4.0)<br>2.50<br>ESD LOGO<br>W1<br>12.4 (+2/-0)<br>ØA<br>QL<br>R1.10<br>Ø21.2<br>All dimensions are in millimeters<br>13.00<br>CORE DETAIL<br>8234350_Reel_rev_C<br>128<br>77<br>ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES<br>2.20<br>06PS<br>**----- End of picture text -----**<br>


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**Revision history** 

## **6 Revision history** 

**Table 10. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|05-Oct-2012|1|First release.|
|19-Feb-2013|2|– Document status chaged from preliminary to production data<br>– Inserted:_Section 2.1: Electrical characteristics (curves)_<br>– Updated:_Section 4: Package mechanical data_<br>– Added:_Section 5: Packaging mechanical data_<br>– Minor text changes|
|21-Feb-2013|3|– Updated_Table 8: Source drain diode_and_Figure 5: Transfer_<br>_characteristics_.|
|31-Jul-2013|4|– Updated IDvalues in test conditions respectively in_Table 6:_<br>_Dynamic_and_Table 7: Switching times_.<br>– Modified:_Figure 13_,_14_,_15_and_16_<br>– Minor text changes|



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## Links

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