# Intelligent Power Module (IPM), MOSFET, 600 V, 12.5 A, 1.5 kV, SDIP, SLLIMM
**URL**: https://novapart.co/products/STIB1060DM2T-L/intelligent-power-module-ipm-mosfet-600-v-125-a-15
**SKU**: STIB1060DM2T-L
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || Intelligent Power Modules
**Price**: €13.0100
**Stock**: 10+
**Lead Time**: 373 days (indicative)
## Description
IPM Power Device:MOSFET; Voltage Rating (Vces / Vdss):600V; Current Rating (Ic / Id):12.5A; Isolation Voltage:1.5kV; IPM Case Style:SDIP; IPM Series:SLLIMM; Product Range:SLLIMM-2n
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Ipm Series | SLLIMM |
| Product Range | SLLIMM-2nd Series |
| Ipm Case Style | SDIP |
| Ipm Power Device | MOSFET |
| Isolation Voltage | 1.5kV |
| Current Rating (Ic / Id) | 12.5A |
| Voltage Rating (Vces / Vdss) | 600V |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:3011600/)
**STIB1060DM2T-L**
Datasheet
SLLIMM™ - 2[nd] series IPM, 3-phase inverter, 0.18 Ω typ., 10 A, 600 V Power MOSFET
## **Features**
- IPM 10 A, 600 V, 3-phase MOSFET inverter bridge including 2 control ICs for gate driving
- 3.3 V, 5 V TTL/CMOS inputs with hysteresis
- Internal bootstrap diode
- Undervoltage lockout of gate drivers
- Smart shutdown function
**==> picture [50 x 9] intentionally omitted <==**
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Marking area
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- Short-circuit protection
- Shutdown input/fault output
- Separate open-source outputs
- Built-in temperature sensor
- Comparator for fault protection
- Fast, soft recovery diodes
- 85 kΩ NTC, UL 1434, CA 4 recognized
- Fully isolated package
- Isolation rating of 1500 Vrms/min
**==> picture [74 x 9] intentionally omitted <==**
**----- Start of picture text -----**
SDIP2B-26L type L
**----- End of picture text -----**
## **Applications**
- 3-phase inverters for motor drives
- Linear and BLDC compressor
- Aircon
## **Product status link**
|**Product summary**|**Product summary**|
|---|---|
|**Order code**|STIB1060DM2T-L|
|**Marking**|IB1060DM2T-L|
|**Package**|SDIP2B-26L type L|
|**Packing**|Tube|
## **Description**
This new IPM, belonging to the second series of SLLIMM (small low-loss intelligent molded module), provides a compact, high-performance AC motor drive in a simple, rugged design.
It combines new ST proprietary control ICs with the high-voltage N-channel superjunction MDMesh™ DM2, providing fast-recovery diode series to increase efficiency and minimize EMI and overall losses, making it ideal for any high-efficiency converter and 3-phase inverter system. SLLIMM™ is a trademark of STMicroelectronics.
**DS12121** - **Rev 2** - **September 2018** For further information contact your local STMicroelectronics sales office.
www.st.com
**STIB1060DM2T-L Internal schematic and pin description**
## **1 Internal schematic and pin description**
**Figure 1. Internal schematic diagram and pin configuration**
**==> picture [436 x 471] intentionally omitted <==**
**----- Start of picture text -----**
NC (1) (26) T1
VbootU (2) (25) T2
VbootV (3)
VbootW (4)
(24) P
HinU (5)
23 (U)
HinV (6)
HinW (7)
(22) V
VccH (8)
GND (9)
H-side
(21) W
LinU (10)
LinV (11)
LinW (12)
(20) NU
VccL (13)
SD / OD (14)
(19) NV
Cin (15)
GND (16)
(18) NW
TSO (17) L-side
**----- End of picture text -----**
GADG240420171352IG
**DS12121** - **Rev 2**
**page 2/23**
**STIB1060DM2T-L Internal schematic and pin description**
## **Table 1. Pin description**
|**Pin**|**Symbol**|**Description**|
|---|---|---|
|1|NC|-|
|2|VBOOTu|Bootstrap voltage for U phase|
|3|VBOOTv|Bootstrap voltage for V phase|
|4|VBOOTw|Bootstrap voltage for W phase|
|5|HINu|High-side logic input for U phase|
|6|HINv|High-side logic input for V phase|
|7|HINw|High-side logic input for W phase|
|8|VCCH|High-side low voltage power supply|
|9|GND|Ground|
|10|LINu|Low-side logic input for U phase|
|11|LINv|Low-side logic input for V phase|
|12|LINw|Low-side logic input for W phase|
|13|VCCL|Low-side low voltage power supply|
|14|SD /OD|Shutdown logic input (active low) / open-drain (comparator output)|
|15|CIN|Comparator input|
|16|GND|Ground|
|17|TSO|Temperature sensor output|
|18|NW|Negative DC input for W phase|
|19|NV|Negative DC input for V phase|
|20|NU|Negative DC input for U phase|
|21|W|W phase output|
|22|V|V phase output|
|23|U|U phase output|
|24|P|Positive DC input|
|25|T2|NTC thermistor terminal 2|
|26|T1|NTC thermistor terminal 1|
**DS12121** - **Rev 2**
**page 3/23**
**STIB1060DM2T-L Absolute maximum ratings**
**2 Absolute maximum ratings**
TJ = 25 °C unless otherwise noted.
**Table 2. Inverter part**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VPN|Supply voltage between P -NU, -NV, -NW|450|V|
|VPN(surge)|Supply voltage surge among P -NU, -NV, -NW|500|V|
|VDSS|MOSFET blocking voltage (or drain-source voltage) for each MOSFET
(VIN (1)= 0)|600|V|
|± ID|Drain current (continuous) at TC= 25 °C|12.5|A|
|± IDP|Peak drain current each MOSFET (less than 1 ms)|50|A|
|PTOT|Total dissipation at TC=25 °C each MOSFET|78|W|
|tscw|Short circuit withstand time, VDS= 300 V, TJ= 125 °C, VCC= Vboot= 15 V,
VIN= 0 to 5 V|12|μs|
_1. Applied among HINx, LINx and GND for x = U, V, W_
**Table 3. Control part**
|**Symbol**|**Parameter**|**Min.**|**Max.**|**Unit**|
|---|---|---|---|---|
|VCC|Supply voltage between VCCH-GND, VCCL-GND|- 0.3|20|V|
|VBOOT|Bootstrap voltage|- 0.3|619|V|
|VOUT|Output voltage among U, V, W and GND|VBOOT- 21|VBOOT+ 0.3|V|
|VCIN|Comparator input voltage|- 0.3|20|V|
|VIN|Logic input voltage applied among HINx, LINx and GND|- 0.3|15|V|
|V
SD/OD|Open-drain voltage|-0.3|7|V|
|I
SD/OD|Open-drain sink current||10|mA|
|VTSO|Temperature sensor output voltage|-0.3|5.5|V|
|ITSO|Temperature sensor output current||7|mA|
**Table 4. Total system**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VISO|Isolation withstand voltage applied between each pin and heatsink plate
(AC voltage, t = 60 s.)|1500|Vrms|
|TJ|Power chips operating junction temperature range|-40 to 150|°C|
|TC|Module operation case temperature range|-40 to 125|°C|
**DS12121** - **Rev 2**
**page 4/23**
**STIB1060DM2T-L Thermal data**
## **2.1 Thermal data**
## **Table 5. Thermal data**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rth(j-c)|Thermal resistance junction-case single MOSFET|1.59|°C/W|
**DS12121** - **Rev 2**
**page 5/23**
**STIB1060DM2T-L Electrical characteristics**
## **3 Electrical characteristics**
TJ = 25 °C unless otherwise noted.
## **3.1 Inverter part**
## **Table 6. Static**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|IDSS|Zero gate voltage drain current|VDS= 600 V, VCC= Vboot= 15 V|||100|μA|
|V(BR)DSS|Drain-source breakdown
voltage|VCC= Vboot= 15 V,
VIN(1)= 0 V, ID= 1 mA|600|||V|
|RDS(on)|Static drain-source turn-on
resistance|VCC= Vboot= 15 V, VIN(1)= 0 to 5 V,
ID= 1.0 A||0.168||Ω|
|||VCC= Vboot= 15 V, VIN(1)= 0 to 5 V,
ID= 10 A||0.180|0.210||
|VSD|Drain-source diode forward
voltage|VIN(1)= 0 V, ID= 10 A||0.98|1.36|V|
_1. Applied among HINx, LINx and GND for x = U, V, W._
**Table 7. Inductive load switching time and energy**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ton(1)|Turn-on time|VDD= 300 V, VCC= Vboot= 15 V,
VIN(2)= 0 to 5 V, ID= 10 A|-|560|-|ns|
|tc(on)(1)|Cross-over time on||-|160|-||
|toff(1)|Turn-off time||-|1040|-||
|tc(off)(1)|Cross-over time off||-|70|-||
|trr|Reverse recovery time||-|155|-||
|Eon|Turn-on switching energy||-|465|-|µJ|
|Eoff|Turn-off switching energy||-|70|-||
|Err|Reverse recovery energy||-|23|-||
_1. ton and toff include the propagation delay times of the internal drive. tC(on) and tC(off) are the switching times of the MOSFET itself under the internally given gate driving condition._
_2. Applied among HINx, LINx and GND for x = U, V, W._
**DS12121** - **Rev 2**
**page 6/23**
**STIB1060DM2T-L Inverter part**
**Figure 2. Switching time test circuit**
**==> picture [398 x 572] intentionally omitted <==**
**----- Start of picture text -----**
ID
VCC VCC Boot
L
Hin HVG
GND OUT
C +
Vdd
-
5 V VCC
Input
0 V Lin
+5 V Rsd SD LVG VDS +-
Cin
GND
GADG240420171446IG
Figure 3. Switching time definition
100% ID 100% ID
t rr
VDS ID ID VDS
VIN VIN
t ON t OFF
t t
C(ON) C(OFF)
VIN(ON) 10% ID 90% ID 10% VDS VIN(OFF) 10% VDS 10% ID
(a) turn-on (b) turn-off AM09223V2
**----- End of picture text -----**
**DS12121** - **Rev 2**
**page 7/23**
**STIB1060DM2T-L Control/protection parts**
## **3.2 Control/protection parts**
## **Table 8. High- and low-side drivers**
|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Vil|Low logic level voltage||||0.8|V|
|Vih|High logic level voltage||2|||V|
|IINh|IN logic “1” input bias current|INx= 15 V|80|150|200|µA|
|IINl|IN logic “0” input bias current|INx= 0 V|||1|µA|
|**High-side**|||||||
|VCC_hys|VCCUV hysteresis||1.2|1.4|1.7|V|
|VCCH_th(on)|VCCHUV turn-on threshold||11|11.5|12|V|
|VCCH_th(off)|VCCHUV turn-off threshold||9.6|10.1|10.6|V|
|VBS_hys|VBSUV hysteresis||0.5|1|1.6|V|
|VBS_th(on)|VBSUV turn-on threshold||10.1|11|11.9|V|
|VBS_th(off)|VBSUV turn-off threshold||9.1|10|10.9|V|
|IQBSU|Under voltage VBSquiescent current|VBS= 9 V, HINx(1)= 5 V||55|75|µA|
|IQBS|VBSquiescent current|VCC= 15 V, HINx(1)= 5 V||125|170|µA|
|Iqccu|Under voltage quiescent supply current|VCC= 9 V, HINx(1)= 0 V||190|250|µA|
|Iqcc|Quiescent current|VCC= 15 V, HINx(1)= 0 V||560|730|µA|
|RDS(on)|BS driver ON resistance|||150||Ω|
|**Low-side**|||||||
|VCC_hys|VCCUV hysteresis||1.1|1.4|1.6|V|
|VCCL_th(on)|VCCLUV turn-on threshold||10.4|11.6|12.4|V|
|VCCL_th(off)|VCCLUV turn-off threshold||9.0|10.3|11|V|
|Iqccu|Under voltage quiescent supply current|VCC= 10 V,
SD pulled to 5 V
through RSD= 10 kΩ,
CIN = LINx(1)= 0||600|800|µA|
|Iqcc|Quiescent current|VCC= 15 V,
SD= 5 V,
CIN = LINx(1)= 0||700|900|µA|
|VSSD|Smart
SD unlatch threshold||0.5|0.6|0.75|V|
|ISDh|SD logic “1” input bias current|SD = 5 V|25|50|70|µA|
|ISDl|SD logic “0” input bias current|SD = 0 V|||1|µA|
_1. Applied among HINx, LINx and GND for x = U, V, W_
**Table 9. Temperature sensor output**
|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VTSO|Temperature sensor output voltage|TJ= 25 °C|0.974|1.16|1.345|V|
|ITSO_SNK|Temperature sensor sink current capability|||0.1||mA|
|ITSO_SRC|Temperature sensor source current capability||4|||mA|
**DS12121** - **Rev 2**
**page 8/23**
**STIB1060DM2T-L Control/protection parts**
**Table 10. Sense comparator (VCC = 15 V, unless otherwise is specified)**
|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ICIN|CIN input bias current|VCIN=1 V|-0.2||0.2|µA|
|Vref|Internal reference voltage||460|510|560|mV|
|VOD|Open-drain low level output voltage|Iod= 5 mA|||500|mV|
|tCIN_SD|CINcomparator delay to
SD|SD pulled to 5 V through RSD= 10 kΩ;
measured applying a voltage step 0-1 V to pin
CIN;
50 % CIN to 90 %
SD|240|320|410|ns|
|SRSD|SD fall slew rate|SD pulled to 5 V through RSD= 10 kΩ;
CL= 1 nF through
SD and ground;
90 %
SD to 10 %
SD||25||V/µs|
The comparator stays enabled even if VCC is in the UVLO condition but higher than 4 V.
**DS12121** - **Rev 2**
**page 9/23**
**STIB1060DM2T-L Fault management**
**4**
## **Fault management**
The device integrates an open-drain output connected to the SD pin. As soon as a fault occurs, the open-drain is activated and the LVGx outputs are forced low. Two types of fault can be identified:
- Overcurrent (OC) sensed by the internal comparator (see more detail in Section 4.1 Smart shutdown function);
- Undervoltage on supply voltage (VCC)
Each fault enables the SD open drain for a different time, as described in the following table.
**Table 11. Fault timing**
|**Symbol**
~~a~~|**Parameter**
~~ee ee~~|**Event time(1)**
~~ee~~|**SD open-drain enable time result(1)(2)**|
|---|---|---|---|
|OC
~~a~~|Over-current event
~~ee ee~~|≤ 24 μs
~~ee~~|24 μs|
|||> 24 µs|OC time|
|UVLO|Under-voltage lockout event|≤ 70 μs|70 µs|
|||> 70 µs
until the VCC_LS exceeds the
VCC_LS UV turn ON threshold|UVLO time|
_1. Typical value (-40 °C ≤ TJ ≤ +125 °C)_
_2. Without contribution of the RC network on SD_
Actually, the device remains in a fault condition (SD at low logic level and LVGx outputs disabled) for a time also depending on the RC network connected to the SD pin. The network generates a time contribution that is added to the internal value.
**Figure 4. Overcurrent timing (without contribution of the RC network on SD)**
GIPG120520141638FSR
**DS12121** - **Rev 2**
**page 10/23**
**STIB1060DM2T-L Fault management**
**Figure 5. UVLO timing (without contribution of the RC network on SD)**
**DS12121** - **Rev 2**
**page 11/23**
**STIB1060DM2T-L Smart shutdown function**
## **4.1 Smart shutdown function**
The device integrates a comparator committed to the fault sensing function. The comparator input can be connected to an external shunt resistor in order to implement a simple overcurrent detection function.
The output signal of the comparator is fed to an integrated MOSFET with the open drain output available on the SD input. When the comparator triggers, the device is set in shutdown state and its outputs are all set to low level.
**Figure 6. Smart shutdown timing waveforms in case of overcurrent event**
**==> picture [331 x 469] intentionally omitted <==**
**----- Start of picture text -----**
comp
Vref
PROTECTION
CIN
t CIN_SD
LIN
LVG
SD
l
open-drain gate
(internal)
t 1 t 2
t OC
real disable time
Fast shutdown:
the driver outputs are set in SD state t 1
immediately after comparator triggering
even if the SD signal has not yet reached
the lower input threshold
t 2
SHUTDOWN CIRCUIT
where:
VBIAS
RSD
FROM / TO SD
CONTROLLER
R PD_SD SMARTSD
CSD R ON_OD LOGIC
**----- End of picture text -----**
RON_OD = VOD/5 mA, see Table 10. Sense comparator (VCC = 15 V, unless otherwise is specified); RPD_SD (typ.) = 5 V/ISDh
**DS12121** - **Rev 2**
**page 12/23**
**STIB1060DM2T-L Smart shutdown function**
In common overcurrent protection designs, the comparator output is usually connected to the SD input and an RC network is connected to this SD line in order to provide a mono-stable circuit which implements a protection time that follows the fault condition.
As opposed to common fault detection systems, the device smart shutdown architecture allows the immediate turn-off of output gates driver in case of fault, by minimizing the propagation delay between the fault detection event and the actual switching off of the outputs. In fact, the time delay between the fault and the turning off of the outputs is no longer dependent on the RC value of the external network connected to the pin.
In the smart shutdown circuitry, the fault signal has a preferential path which directly switches off the outputs after the comparator triggering.
At the same time, the internal logic turns on the open-drain output and holds it on until the SD voltage goes below the VSSD threshold and the toc time is elapsed.
The driver outputs restart following the input pins as soon as the voltage at the SD pin reaches the higher threshold of the SD logic input.
The smart shutdown system provides the possibility to increase the time constant of the external RC network (i.e., the disable time after the fault event) up to very high values without increasing the delay time of the protection.
**DS12121** - **Rev 2**
**page 13/23**
**STIB1060DM2T-L Temperature monitoring solutions**
## **5 Temperature monitoring solutions**
## **5.1 TSO output**
The device integrates a temperature sensor. A voltage proportional to the die temperature is available on the TSO pin. When this function is not used, the pin can be left floating.
**Figure 7. VTSO output characteristics vs LVIC temperature**
**==> picture [200 x 176] intentionally omitted <==**
**----- Start of picture text -----**
VTSO IGBT110820161234TSO
(V)
2.8
Min
2.2
1.6
Typ
Max
1.0
0.4
0 25 50 75 100 T (°C)
**----- End of picture text -----**
## **5.2 NTC thermistor**
**Table 12. NTC thermistor**
|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|R25|Resistance|T = 25 °C||85||kΩ|
|R125|Resistance|T = 125 °C||2.6||kΩ|
|B|B-constant|T = 25 to 100 °C||4092||K|
|T|Operating temperature range||-40||125|°C|
**DS12121** - **Rev 2**
**page 14/23**
**STIB1060DM2T-L NTC thermistor**
**Figure 8. NTC resistance vs temperature**
**==> picture [409 x 239] intentionally omitted <==**
**----- Start of picture text -----**
R(kΩ) GIPG120520142249FSR
3000
2500
2000
1500
Typ
1000
500 Max
Min
0
-50 -25 0 25 50 75 100 125 T(°C)
**----- End of picture text -----**
**Figure 9. NTC resistance vs temperature - zoom**
**==> picture [415 x 244] intentionally omitted <==**
**----- Start of picture text -----**
R(kΩ) GIPG120520141304FSR
30
25
20
Max
15
Typ
10
Min
5
0
50 60 70 80 90 100 110 120 T(°C)
**----- End of picture text -----**
**DS12121** - **Rev 2**
**page 15/23**
**STIB1060DM2T-L Application circuit example**
**6 Application circuit example**
## **Figure 10. Application circuit example**
**==> picture [328 x 506] intentionally omitted <==**
**----- Start of picture text -----**
MICROCONTROLLER
GADG260420170807IG
+ -
Vdc
Cvdc
NTC
VTSO/ C4
CTO
M op- amp
MCU/
5V RTO to
3V/ Rshunt PWR_GND
3.
RSF
CSF
T1 (26) T2 (25) P (24) U (23) V (22) W (21) NU (20) NV (19) NW (18)
H-side L-side
(1) NC (2) Vboot U (3) Vboot V (4) Vboot W (5) HinU (6) HinV (7) HinW (8) VccH (9) GND (10) LinU (11) LinV (12) LinW (13) VccL (14) SD/OD (15) Cin (16) GND (17) TSO
Cboot U Dz 2 Dz 2 SGN_GN D
C3
C2 C2
Dz 1 V
Cboot Cvc c Cv c c
C3
+ - + - CTSO
Dz 1 W
Cboot Vc c Vc c
C3
C1 C1 C1 C1 C1 C1 RSD CSD VTSO/NTC
Dz 1
R1 R1 R1 R1 R1 R1 5V
3V/
3.
Hin U Hin V Hin W Lin U Lin V Lin W Fault VTSO/NTC
**----- End of picture text -----**
Application designers are free to use a different scheme according to the device specifications.
**DS12121** - **Rev 2**
**page 16/23**
**STIB1060DM2T-L Guidelines**
## **6.1 Guidelines**
1. Input signals HIN, LIN are active-high logic. A 100 kΩ (typ.) pull-down resistor is built-in for each input pin. To prevent input signal oscillations, the wiring of each input should be as short as possible and the use of RC filters (R1, C1) on each input signal is suggested. The filters should be with a time constant of about 100 ns and placed as close as possible to the IPM input pins.
2. The use of a bypass capacitor CVCC (aluminum or tantalum) can reduce the transient circuit demand on the power supply. Besides, to reduce any high-frequency switching noise distributed on the power lines, a decoupling capacitor C2 (100 to 220 nF, with low ESR and low ESL) should be placed as close as possible to each Vcc pin and in parallel with the bypass capacitor.
3. The use of an RC filter (RSF, CSF) prevents protection circuit malfunctions. The time constant (RSF x CSF) should be set to 1 µs and the filter must be placed as close as possible to the CIN pin.
4. The SD is an input/output pin (open-drain type if it is used as output). It should be pulled up to a power supply (i.e., MCU bias at 3.3/5 V) by a resistor value, which can keep the Iod no higher than 5 mA (VOD ≤ 500 mV when open-drain MOSFET is ON). The filter on SD should be sized to get a desired re-starting time after a fault event and placed as close as possible to the SD pin.
5. A decoupling capacitor CTSO between 1 nF and 10 nF can be used to increase the noise immunity of the TSO thermal sensor; a similar decoupling capacitor COT (between 10 nF and 100 nF) can be implemented if the NTC thermistor is available and used. In both cases, their effectiveness is improved if these capacitors are placed close to the MCU.
6. The decoupling capacitor C3 (100 to 220 nF with low ESR and low ESL) in parallel with each Cboot filters high-frequency disturbances. Both Cboot and C3 (if present) should be placed as close as possible to the U,V,W and Vboot pins. Bootstrap negative electrodes should be connected to the U,V,W terminals directly and separated from the main output wires.
7. To prevent overvoltage on the VCC pin, a Zener diode (Dz1) can be used. Similarly on the Vboot pin, a Zener diode (Dz2) can be placed in parallel with each Cboot.
8. The use of the decoupling capacitor C4 (100 to 220 nF, with low ESR and low ESL) in parallel with the electrolytic capacitor CVdc prevents surge destruction. Both capacitors C4 and CVdc should be placed as close as possible to the IPM (C4 has priority over Cvdc).
9. By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an optocoupler is possible.
10. Low inductance shunt resistors should be used for phase leg current sensing.
11. In order to avoid malfunctions, the wiring on N pins, the shunt resistor and PWR_GND should be as short as possible.
12. The connection of the SGN_GND to the PWR_GND at one point only (close to the shunt resistor terminal) can reduce the impact of power ground fluctuation.
These guidelines ensure the device specifications for application designs. For further details, please refer to the relevant application note.
**Table 13. Recommended operating conditions**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VPN|Supply voltage|Applied among P-Nu, NV, Nw||300|400|V|
|VCC|Control supply voltage|Applied to VCC-GND|13.5|15|18|V|
|VBS|High-side bias voltage|Applied to VBOOTi-OUTifor i = U, V, W|13||18|V|
|tdead|Blanking time to prevent arm-short|For each input signal|1.5|||µs|
|fPWM|PWM input signal|-40 °C < TC< 100 °C
-40 °C < TJ< 125 °C|||20|kHz|
|TC|Case operation temperature||||100|°C|
**DS12121** - **Rev 2**
**page 17/23**
**STIB1060DM2T-L Electrical characteristics (curves)**
## **7 Electrical characteristics (curves)**
**==> picture [513 x 180] intentionally omitted <==**
**----- Start of picture text -----**
Figure 11. Output characteristics Figure 12. Diode VSD vs drain current
ID IGBT200920181213OC25 VSD IGBT200920181215DVF
(A) (V) VCC = 15 V
VCC = 15 V 1
16 TJ = 25 °C
TJ = 25 °C 0.8
12
TJ = 150 °C
0.6
8
0.4
TJ = 150 °C
4
0.2
0
0 1 2 3 4 VDS (V) 0 4 8 12 16 ID (A)
**----- End of picture text -----**
**==> picture [513 x 179] intentionally omitted <==**
**----- Start of picture text -----**
Figure 13. ID vs temperature Figure 14. EON switching energy vs drain current
ID IGBT200920181216IDT EON IGBT200920181217SLC
(A) (mJ)
VDD = 300 V, VCC = Vboot 15 V
1.8
12
1.5
9 TJ = 150 °C
1.2
0.9
6
0.6
TJ = 25 °C
3
VCC = 15 V, TJ ≤ 150 °C 0.3
0 0.0
0 25 50 75 100 125 150 TC (°C) 0 4 8 12 16 ID (A)
**----- End of picture text -----**
**Figure 15. EOFF switching energy vs drain current**
**==> picture [167 x 149] intentionally omitted <==**
**----- Start of picture text -----**
EOFF IGBT200920181218SFC
(mJ) VDD = 300 V, VCC = Vboot 15 V
0.3
TJ = 150 °C
0.2
0.1
TJ = 25 °C
0
0 4 8 12 16 ID (A)
**----- End of picture text -----**
**Figure 16. Thermal impedance for SDIP2B-26L MOSFET**
**==> picture [160 x 150] intentionally omitted <==**
**----- Start of picture text -----**
K GIPD290720151032FSR
10 [-1]
10 [-2]
10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0] t p (s)
**----- End of picture text -----**
**DS12121** - **Rev 2**
**page 18/23**
**STIB1060DM2T-L Package information**
**8 Package information**
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark.
## **8.1 SDIP2B-26L type L package information**
**Figure 17. SDIP2B-26L type L package outline**
**==> picture [51 x 63] intentionally omitted <==**
**==> picture [151 x 119] intentionally omitted <==**
**==> picture [197 x 119] intentionally omitted <==**
**==> picture [47 x 6] intentionally omitted <==**
**----- Start of picture text -----**
8450802_5_type_L
**----- End of picture text -----**
**DS12121** - **Rev 2**
**page 19/23**
**STIB1060DM2T-L SDIP2B-26L type L package information**
**Table 14. SDIP2B-26L type L package mechanical data**
|**Rf**|**Dimensions (mm)**|**Dimensions (mm)**|**Dimensions (mm)**|
|---|---|---|---|
|**e.**|**Min.**|**Typ.**|**Max.**|
|A|37.50|38.00|38.50|
|A1|0.97|1.22|1.47|
|A2|0.97|1.22|1.47|
|A3|34.70|35.00|35.30|
|c|1.45|1.50|1.55|
|B|23.50|24.00|24.50|
|B1||12.00||
|B2|13.90|14.40|14.90|
|B3|28.90|29.40|29.90|
|C|3.30|3.50|3.70|
|C1|5.00|5.50|6.00|
|C2|13.50|14.00|14.50|
|D|28.70|29.30|29.80|
|D1|2.55|2.85|3.15|
|e|3.356|3.556|3.756|
|e1|1.578|1.778|1.978|
|e2|7.42|7.62|7.82|
|e3|4.88|5.08|5.28|
|e4|2.34|2.54|2.74|
|E|11.90|12.40|12.90|
|E1|3.45|3.75|4.05|
|E2||1.80||
|f|0.45|0.60|0.75|
|f1|0.35|0.50|0.65|
|F|1.95|2.10|2.25|
|F1|0.95|1.10|1.25|
|R|1.55|1.575|1.60|
|T|0.375|0.40|0.425|
|V|0°||5°|
**DS12121** - **Rev 2**
**page 20/23**
**STIB1060DM2T-L**
## **Revision history**
**Table 15. Document revision history**
|**Date**|**Revision**|**Changes**|
|---|---|---|
|02-May-2017|1|Initial release|
|24-Sep-2018|2|Updated title, features and description on cover page.
UpdatedTable 2. Inverter part,Table 5. Thermal dataandTable 11. Fault
timing.
UpdatedSection 3 Electrical characteristics,Section 7 Electrical
characteristics (curves)andSection 8.1 SDIP2B-26L type L package
information.
Minor text changes|
**DS12121** - **Rev 2**
**page 21/23**
**STIB1060DM2T-L Contents**
## **Contents**
|**1**|**Internal schematic diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4**|
||**2.1**
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4|
|**3**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6**|
||**3.1**
Inverter part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
||**3.2**
Control/protection part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7|
|**4**|**Fault management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10**|
||**4.1**
Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12|
|**5**|**Temperature monitoring solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14**|
||**5.1**
TSO output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14|
||**5.2**
NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14|
|**6**|**Application circuit example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16**|
||**6.1**
Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16|
|**7**|**Electrical characteristics (curves). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18**|
|**8**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19**|
||**8.1**
SDIP2B-26L type L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21**||
**DS12121** - **Rev 2**
**page 22/23**
**STIB1060DM2T-L**
## **IMPORTANT NOTICE – PLEASE READ CAREFULLY**
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
**DS12121** - **Rev 2**
**page 23/23**
## Links
- [View this product on Novapart](https://novapart.co/products/STIB1060DM2T-L/intelligent-power-module-ipm-mosfet-600-v-125-a-15)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stib1060dm2t-l/intelligent-power-module-600v/dp/3011600)
---
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