# Power MOSFET, N Channel, 100 V, 180 A, 1900 µohm, H2PAK-6, Surface Mount

![Product image](https://novapart.co/image/farnell:2629748RL/)

**URL**: https://novapart.co/products/STH310N10F7-6/power-mosfet-n-channel-100-v-180-a-1900-ohm-h2pak
**SKU**: STH310N10F7-6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.3000
**Stock**: 10+
**Lead Time**: 42 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:180A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.0019ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3.

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 7Pins |
| Channel Type | N Channel |
| Product Range | STripFET |
| Qualification | - |
| Power Dissipation | 315W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | H2PAK-6 |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 180A |
| Drain Source On State Resistance | 1900µohm |
| Gate Source Threshold Voltage Max | 3.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2629748RL/)

## **STH310N10F7-2, STH310N10F7-6** 

N-channel 100 V, 1.9 mΩ typ.,180 A, STripFET™ F7 Power MOSFETs in H[2] PAK-2 and H[2] PAK-6 packages 

Datasheet - production data 

**==> picture [119 x 77] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>TAB<br>7<br>2<br>3 1<br>1<br>H [2] PAK-2 H [2] PAK-6<br>**----- End of picture text -----**<br>


## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STH310N10F7-2|100 V|2.3 mΩ|180 A|
|STH310N10F7-6||||



- Among the lowest RDS(on) on the market 

**Figure 1: Internal schematic diagram** 

- Excellent figure of merit (FoM) 

- Low Crss/Ciss ratio for EMI immunity 

- High avalanche ruggedness 

## **Applications** 

- Switching applications 

## **Description** 

**==> picture [76 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
S(2,3,4,5,6,7)<br>**----- End of picture text -----**<br>


These N-channel Power MOSFETs utilize STripFET™ F7 technology with an enhanced trench gate structure that results in very low onresistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STH310N10F7-2|310N10F7|H2PAK-2|Tape and reel|
|STH310N10F7-6||H2PAK-6||



This is information on a product in full production. 

July 2015 

DocID024040 Rev 4 

1/19 

_www.st.com_ 

|**Contents**<br>**STH310N10F7-2, STH310N10F7-6**|**Contents**<br>**STH310N10F7-2, STH310N10F7-6**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>H2PAK-2 package information ........................................................ 10|
||4.2<br>H2PAK-6 package information ........................................................ 13|
||4.3<br>Packing information ......................................................................... 16|
|**5**|**Revision history ............................................................................ 18**|



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**STH310N10F7-2, STH310N10F7-6** 

**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|100|V|
|VGS|Gate-source voltage|± 20|V|
|ID_(1)_|Drain current (continuous) at TC= 25 °C|180|A|
||Drain current (continuous) at TC= 100 °C|180|A|
|ID_(2)_|Drain current (pulsed)|720|A|
|PTOT|Total dissipation at TC= 25 °C|315|W|
|EAS_(3)_|Singlepulse avalanche energy(TJ= 25 °C L = 0.55 mH, IAS= 65 A)|1|J|
|TJ|Operating junction temperature|-55 to 175|°C|
|Tstg|Storage temperature||°C|



## **Notes:** 

(1)Current limited by package 

(2)Pulse width limited by safe operating area 

(3)Starting TJ = 25 °C, ID = 60 A, VDD = 50 V 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|0.48|°C/W|
|Rthj-pcb_(1)_|Thermal resistancejunction-pcb|35|°C/W|



## **Notes:** 

(1)When mounted on FR-4 board of 1 inch², 2 oz Cu 

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**STH310N10F7-2, STH310N10F7-6** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 4: On/off-state** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage (VGS= 0)|ID= 250 µA|100|||V|
|IDSS|Zero gate voltage drain<br>current (VGS= 0)|VDS= 100 V|||1|µA|
|||VDS= 100 V; TC= 125 °C|||100|µA|
|IGSS|Gate body leakage current<br>(VDS= 0)|VGS= 20 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2.5|3.5|4.5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 60 A||1.9|2.3|mΩ|



**Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz,<br>VGS= 0|-|12800|-|pF|
|Coss|Output capacitance|||3500||pF|
|Crss|Reverse transfer<br>capacitance|||170||pF|
|Qg|Total gate charge|VDD= 50 V, ID= 180 A<br>VGS= 10 V<br>See_Figure 14: "Gate_<br>_charge test circuit"_||180||nC|
|Qgs|Gate-source charge|||78||nC|
|Qgd|Gate-drain charge|||34||nC|



## **Table 6: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 50 V, ID= 90 A,<br>RG= 4.7 Ω, VGS= 10 V<br>See_Figure 13: "Switching_<br>_times test circuit for_<br>_resistive load"_|-|62|-|ns|
|tr|Rise time|||108||ns|
|td(off)|Turn-off delaytime|||148||ns|
|tf|Fall time|||40||ns|



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**STH310N10F7-2, STH310N10F7-6 Electrical characteristics** 

## **Table 7: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||180|A|
|ISDM_(1)_|Source-drain current<br>(pulsed)||||720|A|
|VSD_(2)_|Forward on voltage|ISD= 60 A, VGS= 0|||1.5|V|
|trr|Reverse recoverytime|ISD= 180 A,<br>di/dt = 100 A/µs,<br>VDD= 80 V, Tj= 150 °C||85||ns|
|Qrr|Reverse recoverycharge|||200||nC|
|IRRM|Reverse recoverycurrent|||4.7||A|



## **Notes:** 

(1)Pulse width limited by safe operating area 

(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

DocID024040 Rev 4 

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**STH310N10F7-2, STH310N10F7-6** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**==> picture [416 x 344] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>ID AM15430v1 280tok<br>K<br>(A)<br>ᵟ [=][0.5]<br>100 0.2<br>0.1<br>0.05<br>10 100µs 10-1<br>0.02<br>Zth=k Rthj-c<br>Tj= 175 °C<br>1 Tc= 25 °C 1ms 0.01 ᵟ [=tp/] [t]<br>Sinlge 10ms<br>pulse Single pulse tp<br>t<br>0.10.1 1 10 VDS(V) 1010-2 -5 10 -4 10-3 10 -2 10 -1 tp [(s)]<br>Figure 4: Output characteristics  Figure 5: Transfer characteristics<br>ID AM14734v1 ID AM14735v1<br>(A) VGS=10V (A)<br>VDS = 2V<br>300 350<br>8V<br>7V 300<br>250<br>250<br>200<br>200<br>150<br>150<br>100 6V 100<br>50 50<br>5V<br>0 0<br>0 2 4 6 8 VDS(V) 0 1 2 3 4 5 6 7 8 VGS(V)<br>DS(on)<br>Limited by max R<br>Operation in this area is<br>**----- End of picture text -----**<br>


**==> picture [383 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6: Gate charge vs gate-source voltage  Figure 7: Static drain-source on-resistance<br>VGS AM14736v1 RDS(on) AM15431v1<br>(V) (mΩ)<br>VDD=50V<br>10 ID=180 A 2.25 VGS=10V<br>8 2.20<br>6 2.15<br>4 2.10<br>2 2.05<br>0 2<br>0 50 100 150 Qg(nC) 0 40 80 120 160 ID(A)<br>**----- End of picture text -----**<br>


**Figure 6: Gate charge vs gate-source voltage** 

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**STH310N10F7-2, STH310N10F7-6** 

**Electrical characteristics** 

**==> picture [395 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 8: Normalized V(BR)DSS vs<br>Figure 9: Capacitance variations<br>V(BR)DSS temperature  AM14742v1 (pF)C AM14738v1<br>(norm)<br>ID = 1m A 14000<br>1.04 Ciss<br>12000<br>1.02<br>10000<br>1.00 8000<br>6000<br>0.98<br>4000<br>0.96 2000 Crss<br>Coss<br>0<br>0.94 0 20 40 60 80 100 VDS(V)<br>-75 -25 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 10: Source-drain diode forward Figure 11: Normalized gate threshold voltage characteristics vs temperature** 

**==> picture [355 x 143] intentionally omitted <==**

**----- Start of picture text -----**<br>
VSD AM14739v1 VGS(th) AM14741v1<br>(V) (norm)<br>1.05 ID = 250µ A<br>TJ=-50°C 1.0<br>0.95<br>0.90<br>0.85<br>TJ=25°C<br>0.75<br>0.80<br>0.65<br>TJ=150°C 0.70<br>0.55<br>0.45 0.60<br>0 40 80 120 160 ISD(A) -75 -25 0 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12: Normalized on-resistance vs temperature** 

**==> picture [188 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM14740v1<br>RDS(on)<br>(norm)<br>2.0<br>ID = 60A<br>1.6<br>1.2<br>0.8<br>0.4<br>-75 -25 0 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 13: Switching times test circuit for resistive load** 

**==> picture [207 x 79] intentionally omitted <==**

**Figure 15: Test circuit for inductive load switching and diode recovery times** 

**==> picture [213 x 129] intentionally omitted <==**

**Figure 17: Unclamped inductive waveform** 

**Figure 14: Gate charge test circuit** 

**==> picture [200 x 148] intentionally omitted <==**

**Figure 16: Unclamped inductive load test circuit** 

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**Figure 18: Switching time waveform** 

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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**STH310N10F7-2, STH310N10F7-6** 

**Package information** 

## **4.1 H2PAK-2 package information** 

**Figure 19: H²PAK-2 package outline** 

**==> picture [406 x 597] intentionally omitted <==**

**----- Start of picture text -----**<br>
8159712_D<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 8: H²PAK-2 package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.30|-|4.80|
|A1|0.03||0.20|
|C|1.17||1.37|
|e|4.98||5.18|
|E|0.50||0.90|
|F|0.78||0.85|
|H|10.00||10.40|
|H1|7.40||7.80|
|L|15.30||15.80|
|L1|1.27||1.40|
|L2|4.93||5.23|
|L3|6.85||7.25|
|L4|1.5||1.7|
|M|2.6||2.9|
|R|0.20||0.60|
|V|0°||8°|



DocID024040 Rev 4 

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**STH310N10F7-2, STH310N10F7-6** 

**Package information** 

**Figure 20: H²PAK-2 recommended footprint** 

**==> picture [406 x 389] intentionally omitted <==**

**----- Start of picture text -----**<br>
8159712_D<br>**----- End of picture text -----**<br>


12/19 

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**STH310N10F7-2, STH310N10F7-6** 

**Package information** 

## **4.2 H2PAK-6 package information** 

**Figure 21: H²PAK-6 package outline** 

**==> picture [406 x 445] intentionally omitted <==**

**----- Start of picture text -----**<br>
8159693_Rev_F<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 9: H²PAK-6 package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.30|-|4.80|
|A1|0.03||0.20|
|C|1.17||1.37|
|e|2.34||2.74|
|e1|4.88||5.28|
|e2|7.42||7.82|
|E|0.45||0.60|
|F|0.50||0.70|
|H|10.00||10.40|
|H1|7.40||7.80|
|L|14.75||15.25|
|L1|1.27||1.40|
|L2|4.35||4.95|
|L3|6.85||7.25|
|L4|1.5||1.75|
|M|1.90||2.50|
|R|0.20||0.60|
|V|0°||8°|



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**Package information** 

**Figure 22: H²PAK-6 recommended footprint** 

**==> picture [45 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
footprint_Rev_F<br>**----- End of picture text -----**<br>


Dimensions are in mm. 

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**Package information** 

## **4.3 Packing information** 

**Figure 23: Tape outline** 

**==> picture [407 x 338] intentionally omitted <==**

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**Package information** 

**Figure 24: Reel outline** 

**==> picture [406 x 299] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>REEL DIMENSIONS<br>40 mm min.<br>Access hole<br>At slot location<br>B<br>D<br>C<br>N<br>A<br>G measured<br>Tape slot<br>In core for<br>Full radius At hub<br>Tape start<br>**----- End of picture text -----**<br>


**Table 10: Tape and reel mechanical data** 

||**Tape**|||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**m**|**m**<br>**Max.**|**Dim.**|**mm**||
||**Min.**|||**Min.**|**Max.**|
|A0|10.5|10.7|A||330|
|B0|15.7|15.9|B|1.5||
|D|1.5|1.6|C|12.8|13.2|
|D1|1.59|1.61|D|20.2||
|E|1.65|1.85|G|24.4|26.4|
|F|11.4|11.6|N|100||
|K0|4.8|5.0|T||30.4|
|P0|3.9|4.1||||
|P1|11.9|12.1|Basequantity||1000|
|P2|1.9|2.1|Bulkquantity||1000|
|R|50|0.35<br>24.3||||
|T|0.25|||||
|W|23.7|||||



DocID024040 Rev 4 

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**STH310N10F7-2, STH310N10F7-6** 

**Revision history** 

## **5 Revision history** 

**Table 11: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|10-Dec-2012|1|Initial release. Part number(s)previouslyincluded in datasheet ID02287|
|23-Jul-2013|2|<br>Document status promoted from preliminary to production<br>data<br><br>Modified: IDSSand VGSvalue in table 4<br><br>Added: EASvalue in table 2<br><br>Minor text changes|
|27-Nov-2014|3|<br>Updated: H2PAK-6 package information.<br><br>Updated the title, features and description.<br><br>Minor text changes.|
|29-Jul-2015|4|Updated_Table 2: "Absolute maximum ratings"_.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2015 STMicroelectronics – All rights reserved 

DocID024040 Rev 4 

19/19 



## Links

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- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/sth310n10f7-6/mosfet-n-ch-100v-180a-h2pak-6/dp/2629748RL)
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