# Intelligent Power Module (IPM), 3-Phase, IGBT, 600 V, 20 A, 2.5 kV, SDIP, SLLIMM

![Product image](https://novapart.co/image/farnell:2807351/)

**URL**: https://novapart.co/products/STGIPS20C60T-H/intelligent-power-module-ipm-3-phase-igbt-600-v-20
**SKU**: STGIPS20C60T-H
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || Intelligent Power Modules
**Price**: €13.3900
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| Ipm Series | SLLIMM |
| Product Range | SLLIMM Series |
| Ipm Case Style | SDIP |
| Isolation Voltage | 2.5kV |
| Current Rating (Ic / Id) | 20A |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807351/)

## **STGIPS20C60T-H** ~~a a~~ SLLIMM™ small low-loss intelligent molded module IPM, 3-phase inverter - 20 A, 600 V short-circuit rugged IGBT 

**Datasheet** - **production data** 

## **Applications** 

- 3-phase inverters for motor drives 

- Air conditioners 

## **Description** 

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SDIP-25L<br>**----- End of picture text -----**<br>


This intelligent power module provides a compact, high performance AC motor drive in a simple, rugged design. Combining ST proprietary control ICs with the most advanced short-circuitrugged IGBT system technology, this device is ideal for 3-phase inverters in applications such as motor drives and air conditioners. SLLIMM™ is a trademark of STMicroelectronics. 

## **Features** 

- IPM 20 A, 600 V 3-phase IGBT inverter bridge including control ICs for gate driving and freewheeling diodes 

- Short-circuit rugged IGBTs 

- 3.3 V, 5 V, 15 V CMOS/TTL inputs comparators with hysteresis and pull-down / pull-up resistors 

- Undervoltage lockout 

- Internal bootstrap diode 

- Interlocking function 

- Shutdown function 

- 4.7 kΩ NTC for temperature control 

- DBC leading to low thermal resistance 

- Isolation rating of 2500 Vrms/min 

- UL recognized: UL1557 file E81734 

**Table 1. Device summary** 

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|||||
|---|---|---|---|
|Order code|Marking|Package|Packing|
|STGIPS20C60T-H|GIPS20C60T-H|SDIP-25L|Tube|

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April 2015 DocID026322 Rev 2 1/19 

This is information on a product in full production. 

_www.st.com_ 

**Contents** 

**STGIPS20C60T-H** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Internal block diagram and pin configuration  . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5**|
||2.1<br>Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
||2.2<br>Thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7**|
||3.1<br>Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
||3.1.1<br>NTC thermistor  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
||3.2<br>Waveform definitions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
|**4**|**Application information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13**|
||4.1<br>Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|**5**|**Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|
||5.1<br>SDIP-25L package information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15|
||5.2<br>Packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18**|



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**Internal block diagram and pin configuration** 

## **1 Internal block diagram and pin configuration** 

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Figure 1. Internal block diagram<br>**----- End of picture text -----**<br>


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AM09320v2<br>**----- End of picture text -----**<br>


DocID026322 Rev 2 

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**STGIPS20C60T-H** 

**Internal block diagram and pin configuration** 

**Table 2. Pin description** 

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||||
|---|---|---|
|Pin n°|Symbol|Description|
|1|OUTU|High-side reference output for U phase|
|2|VbootU|Bootstrap voltage for U phase|
|3|LINU|Low-side logic input for U phase|
|4|HINU|High-side logic input for U phase|
|5|VCC|Low voltage power supply|
|6|OUTV|High-side reference output for V phase|
|7|Vboot V|Bootstrap voltage for V phase|
|8|GND|Ground|
|9|LINV|Low-side logic input for V phase|
|10|HINV|High-side logic input for V phase|
|11|OUTW|High-side reference output for W phase|
|12|Vboot W|Bootstrap voltage for W phase|
|13|LINW|Low-side logic input for W phase|
|14|HINW|High-side logic input for W phase|
|15|SD|Shutdown logic input (active low)|
|16|T1|NTC thermistor terminal|
|17|NW|Negative DC input for W phase|
|18|W|W phase output|
|19|P|Positive DC input|
|20|NV|Negative DC input for V phase|
|21|V|V phase output|
|22|P|Positive DC input|
|23|NU|Negative DC input for U phase|
|24|U|U phase output|
|25|P|Positive DC input|

**----- End of picture text -----**<br>


**Figure 2. Pin layout (bottom view)** 

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**STGIPS20C60T-H** 

**Electrical ratings** 

## **2 Electrical ratings** 

|**2.1**|**Absolute maximum ratings**||||
|---|---|---|---|---|
||**Table 3. Inverterpart**||||
||**Symbol**<br>**Parameter**<br>**Value**<br>**Unit**<br>VPN<br>Supply voltage applied between P - NU, NV, NW<br>450<br>V<br>VPN(surge)<br>Supply voltage (surge) applied between P - NU,<br>NV, NW<br>500<br>V<br>VCES<br>Each IGBT collector emitter voltage (VIN<br>(1)= 0)<br>600<br>V<br>± IC<br>Each IGBT continuous collector current<br>at TC= 25°C<br>20<br>A<br>± ICP<br>(2)<br>Each IGBT pulsed collector current<br>40<br>A<br>PTOT<br>Each IGBT total dissipation at TC= 25°C<br>46<br>W<br>tscw<br>Short circuit withstand time, VCE= 0.5 V(BR)CES<br>TJ= 125 °C, VCC= Vboot= 15 V, VIN<br>(1)= 0 - 5 V<br>5<br>µs<br>~~——~~||||
||1. Applied between HINi, LINi andGND for i = U, V, W||||
||2. Pulse width limited by max junction temperature||||
||**Table 4. Controlpart**||||
||**Symbol**<br>**Parameter**<br>**Value**<br>**Unit**<br>VOUT<br>Output voltage applied between<br>OUTU,OUTV,OUTW- GND<br>Vboot- 21 to Vboot+ 0.3<br>V<br>VCC<br>Low voltage power supply<br>- 0.3 to +21<br>V<br>Vboot<br>Bootstrap voltage applied between<br>Vboot i- OUTifor i = U, V, W<br>- 0.3 to 620<br>V<br>VIN<br>Logic input voltage applied between HIN, LIN and<br>GND<br>- 0.3 to 15<br>V<br>VSD<br>/OD<br>Open drain voltage<br>- 0.3 to 15<br>V<br>dVOUT/dt<br>Allowed output slew rate<br>50<br>V/ns<br>~~——~~||||
||**Table 5. Total system**||||
||**Symbol**<br>**Parameter**||**Value**|**Unit**|
||VISO<br>Isolation withstand voltage applied between each<br>pin and heatsink plate (AC voltage, t = 60 sec.)||2500|V|
||Tj<br>Power chips operating junction temperature||- 40 to 150|°C|
||TC<br>Module case operation temperature||- 40 to 125|°C|



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**STGIPS20C60T-H** 

**Electrical ratings** 

## **2.2 Thermal data** 

**Table 6. Thermal data** 

||**Table 6. Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|RthJC|Thermal resistance junction-case single IGBT|2.7|°C/W|
||Thermal resistance junction-case single diode|5|°C/W|



**Figure 3. Maximum IC(RMS) current vs. switching Figure 4. Maximum** I **C(RMS) current vs. fsine(1) frequency[(1)]** 

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IC(RMS) AM17108v1 IC(RMS) AM17109v1<br>    (A)    (A) 3-phase sinusoidal PWM<br>28 VPN 3-phase sinusoidal PWM 17 V PF = 0.6, Tj = 150 °C, Tc = 100 °C PN = 300 V, Modulation Index = 0.8,<br>Pitt TT PF = 0.6, T = 300 V, j  = 150 °C, fsine  = 60 Hz Modulation Index= 0.8, 16 ay eel  |<br>26<br>SEGneeuiaueu fsw = 12 kHz ACT fsw = 16 kHz<br>15<br>24 ITTTTT TTT Cont yen<br>Tc = 80 °C<br>14<br>22 TPS PEN MT<br>13<br>20<br>Ped an 12 cn a<br>18 PA ETEE PeEE EE PRL | oTOY<br>11<br>16 a Tc = 100 °C 10 A000 fsw = 20 kHz<br>14 COO—RRA inne 9 eToi<br>12 POCO 8 coi coCn n Cooo<br>4 8 12 16 fsw (kHz) 1 10 100 fsine (Hz)<br>**----- End of picture text -----**<br>


1. Simulated curves refer to typical IGBT parameters and maximum Rthj-c. 

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**STGIPS20C60T-H** 

**Electrical characteristics** 

## **3 Electrical characteristics** 

TJ = 25 °C unless otherwise specified. 

**Table 7. Inverter part** 

**Value Symbol Parameter Test conditions Unit Min. Typ. Max.** ~~pp1~~ VCC = Vboot = 15 V, VIN(1)= 0 ÷ 5 V, - 1.6 2 V Collector-emitter ~~po~~ IC = 20 A V CE(sat) saturation voltage VCC = Vboot = 15 V, VIN(1)= 0 ÷ 5 V, - 1.7 IC = 20 A, TJ = 125 °C Collector-cut off current ICES (VIN(1)= 0 “logic state”) VCE = 550 V, VCC = VBoot = 15 V - 100 µA ~~Fa~~ VF Diode forward voltage ~~rr~~ VIN(1) = 0 “logic state”, IC = 20 A - 2.2 V ~~a~~ **Inductive load switching time and energy** ton Turn-on time - 390 - ~~—————|~~ tc(on) Crossover time (on) VPN = 300 V, ~~TT~~ - 170 - ~~|~~ toff Turn-off time VCC = Vboot = 15 V, - 970 - ns tc(off) Crossover time (off) VIN(1) = 0 ÷ 5 V, - 150 - ~~———~~ trr Reverse recovery time IC = 20 A ~~—~~ - 284 - ~~| ===—+~~ (see _Figure 5_ ) Eon Turn-on switching losses - 520 - µJ Eoff Turn-off switching losses - 460 - ~~—_———~~ 1. Applied between HINi, LINi and GND for i = U, V, W. ~~1~~ _Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are the switching time of IGBT itself under the internally given gate driving condition._ 

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**Electrical characteristics** 

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Figure 5. Switching time test circuit<br>**----- End of picture text -----**<br>


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INPUT<br>BOOT BUS<br>Lin VBOOT>VCC<br>+5V<br>/SD<br>RSD HVG<br>L<br>Hin<br>VCC OUT<br>Vcc IC<br>DT LVG<br>VCE<br>GND CP+<br>0<br>ie smniis 1 AM17138v1<br>Figure 6. Switching time definition<br>100% IC   100% IC<br>t rr<br>VCE IC IC VCE<br>VIN VIN<br>t ON t OFF<br>t t<br> C(ON)  C(OFF)<br>VIN(ON) 10% IC 90% IC 10% VCE VIN(OFF) 10% VCE 10% IC<br>(a) turn-on (b) turn-off AM09223V1<br>**----- End of picture text -----**<br>


Figure 4 “Switching time definition" refers to HIN, LIN inputs (active high). 

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**Electrical characteristics** 

## **3.1 Control part** 

|**Table 8. Low voltage power supply (VCC = 15 V unless otherwise specified)**|
|---|
|**Symbol**<br>**Parameter**<br>**Test conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>VCC_hys<br>VCCUV hysteresis<br>1.2<br>1.5<br>1.8<br>V<br>~~a a~~<br>~~ee ee ee ee~~<br>~~a~~|
|VCC_thON<br>VCCUV turn ON threshold<br>11.5<br>12<br>12.5<br>V<br>VCC_thOFF<br>VCCUV turn OFF threshold<br>10<br>10.5<br>11<br>V<br>Iqccu<br>Undervoltage quiescent<br>supply current<br>VCC= 10 V<br>SD<br>= 5 V; LIN = HIN = 0<br>450<br>µA<br>~~aEE~~|
|Iqcc<br>Quiescent current<br>VCC= 15 V<br>SD<br>= 5 V; LIN = HIN = 0<br>3.5<br>mA|
|**Table 9. Bootstrapped voltage (VCC = 15 V unless otherwise specified)**|
|**Symbol**<br>**Parameter**<br>**Test conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>~~aGD~~|
|VBS_hys<br>VBS UV hysteresis<br>1.2<br>1.5<br>1.8<br>V<br>~~a~~|
|VBS_thON<br>VBS UV turn ON threshold<br>11.1<br>11.5<br>12.1<br>V<br>VBS_thOFF<br>VBS UV turn OFF threshold<br>9.8<br>10<br>10.6<br>V<br>IQBSU<br>Undervoltage VBSquiescent<br>current<br>VBS< 9 V<br>SD<br>= 5 V; LIN = 0, HIN = 5 V<br>70<br>110<br>µA<br>~~aEE~~|
|IQBS<br>VBSquiescent current<br>VBS= 15 V<br>SD<br>= 5 V; LIN = 0, HIN = 5 V<br>200<br>300<br>µA|
|RDS(on)<br>Bootstrap driver on resistance<br>LIN= 5 V; HIN= 0 V<br>120<br>Ω<br>~~a~~|
|**Table 10. Logic inputs(VCC = 15 V unless otherwise specified)**|
|**Symbol**<br>**Parameter**<br>**Test conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>Vil<br>Low level logic threshold<br>voltage<br>0.8<br>1.1<br>V<br>Vih<br>High level logic threshold<br>voltage<br>1.9<br>2.25<br>V<br>~~a~~<br>~~se~~<br>~~ee~~<br>~~SeDe~~<br>~~SD~~|
|IHINh<br>HIN logic “1” input bias current<br>HIN = 15 V<br>20<br>40<br>100<br>µA<br>~~a~~|
|IHINI<br>HIN logic “0” input bias current<br>HIN = 0 V<br>1<br>µA<br>~~a~~|
|ILINh<br>LIN logic “1” input bias current<br>LIN = 15 V<br>20<br>40<br>100<br>µA<br>~~a~~|
|ILINI<br>LIN logic “0” input bias current<br>LIN = 0V<br>1<br>µA<br>~~a~~|
|ISDh<br>SD<br>logic “0” input bias current<br>SD<br>= 15 V<br>30<br>120<br>300<br>µA<br>~~a~~|
|ISDl<br>SD<br>logic “1” input bias current<br>SD<br>= 0 V<br>3<br>µA<br>~~a~~|
|Dt<br>Dead time<br>see_Figure 7_and_Table 14_<br>1.2<br>µs<br>~~a~~|



DocID026322 Rev 2 

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**STGIPS20C60T-H** 

**Electrical characteristics** 

**Table 11. Sense comparator characteristics (VCC = 15 V unless otherwise specified)** 

|**Symbol**<br>**Parameter**<br>~~a a~~|**Symbol**<br>**Parameter**<br>~~a a~~|**Test conditions**||**Min.**||**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|---|---|
|Iib<br>Input bias current||VCIN= 1 V||-|||3|µA|
|Vol<br>Open-drain low-level output<br>voltage<br>td_comp<br>Comparator delay<br>~~SR~~||Iod= 3 mA<br>SD<br>/OD pulled to 5 V through<br>100 kΩresistor||-<br>-||90|0.5<br>130|V<br>ns|
|SR<br>Slew rate||CL= 180 pF; Rpu= 5 kΩ||-||60||V/µsec|
|tsd<br>Shut down to high / low side<br>driver propagation delay<br>~~a~~||VOUT = 0, Vboot = VCC,<br>VIN = 0 to 3.3 V||50||125|200|ns|
|**Condition**<br>Shutdown enable<br>half-bridge tri-state<br>Interlocking<br>half-bridge tri-state<br>~~CCa~~|**SD**<br>L<br>H|**Table 12. Truth table**<br>**Logic input (VI)**<br>**LIN**<br>**HIN**<br>X<br>X<br>H<br>H<br>~~ee ~~|||**Output**<br>**LVG**<br>**HVG**<br>L<br>L<br>L<br>L<br> ~~ee~~||||
|0 ‘’logic state”<br>half-bridge tri-state|H|L<br>L||||L|L||
|1 “logic state”<br>low side direct driving|H|H<br>L||||H|L||
|1 “logic state”<br>high side direct driving|H|L<br>H||||L|H||



_Note: X: don’t care_ 

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**STGIPS20C60T-H** 

**Electrical characteristics** 

## **3.1.1 NTC thermistor** 

**Table 13. NTC thermistor** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit.**|
|---|---|---|---|---|---|---|
|R25|Resistance|T = 25°C||4.7||kΩ|
|R125|Resistance|T = 125°C||160||Ω|
|B|B-constant|T = 25°C to 85°C||3950||K|
|T|Operating temperature||-40||150|°C|



## **Equation 1: resistance variation vs. temperature** 

**==> picture [125 x 31] intentionally omitted <==**

## Where T are temperatures in Kelvins 

## **Figure 7. NTC resistance vs. temperature** 

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**----- Start of picture text -----**<br>
NTC [kΩ]180160140120100 TT (ASERADEROEROOEROEEASERGSEROEROSEROEEmCWCC AM16299v1<br>80 MAX.<br>60 L A WSAERRRAERALELE<br>CENTER<br>40<br>Bi V s<br>20 MIN.<br>0 AbVEHIEEEEUEEEIILENSEC<br>-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 (°C)<br>ure 8. NTC resistance vs. temperature (perature (erature ((zoom)<br>NTC [kΩ1.800] CHT ET AM17098v1<br>1.600 CET<br>1.400 NCEE<br>1.200 MAX.<br>1.000 AUTUELETLETETE E<br>0.800 A CENTER Q<br>0.600<br>EN TLTLEPEELEE<br>0.400<br>MIN.<br>0.200<br>T P S TE<br>0.000<br>50 FFLEELELETBEP 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 135 140 145  SESS (°C)<br>DocID026322 Rev 2<br>**----- End of picture text -----**<br>


## **Figure 8. NTC resistance vs. temperature (perature (erature ((zoom)** 

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11/19<br>**----- End of picture text -----**<br>


**STGIPS20C60T-H** 

**Electrical characteristics** 

## **3.2 Waveform definitions** 

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Figure 9. Dead time and interlocking waveforms definition<br>**----- End of picture text -----**<br>


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! ' ;<br>7 1 hd<br>INTERLOCKING INTERLOCKING<br>**----- End of picture text -----**<br>


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**Application information** 

## **4 Application information** 

## **Figure 10. Typical application circuit** 

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AM09321v2<br>**----- End of picture text -----**<br>


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**STGIPS20C60T-H** 

**Application information** 

## **4.1 Recommendations** 

- Input signals HIN, LIN are active high logic. A 375 k Ω (typ.) pull down resistor is built-in for each input. If an external RC filter is used, for noise immunity, pay attention to the variation of the input signal level. 

- To prevent the input signals oscillation, the wiring of each input should be as short as possible. 

- By integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler is possible. 

- Each capacitor should be located as nearby the pins of IPM as possible. 

- Low inductance shunt resistors should be used for phase leg current sensing. 

- Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. Additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. 

- The SD signal should be pulled up to 5 V / 3.3 V with an external resistor. 

**Table 14. Recommended operating conditions** 

**Value Symbol Parameter Conditions Unit Min. Typ. Max.** ~~2~~ VPN Supply Voltage Applied between P-Nu,Nv,Nw 300 400 V ~~a~~ VCC Control supply voltage Applied between VCC-GND 13.5 15 18 V ~~aa~~ VBS High side bias voltage Applied between Vi=U,V,W BOOTi-OUTi for 13 18 V ~~a~~ Blanking time to tdead prevent Arm-short For each input signal 1.5 µs ~~a~~ fPWM PWM input signal -40°C < T-40°C < Tc < 125°C < 100°C 20 kHz ~~a~~ j Case operation TC temperature 100 °C ~~A~~ 

_Note: For further details refer to AN3338._ 

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**STGIPS20C60T-H** 

**Package information** 

## **5 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

Please refer to dedicated technical note TN0107 for mounting instructions. 

## **5.1 SDIP-25L package information** 

## **Figure 11. SDIP-25L package outline** 

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**STGIPS20C60T-H** 

**Package information** 

**Table 15. SDIP-25L mechanical data** 

||**Table 15. SDIP-25L mechanical data**|**Table 15. SDIP-25L mechanical data**|**Table 15. SDIP-25L mechanical data**|
|---|---|---|---|
|**Dim.**<br>~~a~~|**mm**<br>~~ee ee~~|||
||**Min.**<br>~~es~~|**Typ.**<br>~~es~~<br>~~ee ee~~|**Max.**<br>~~es~~<br>~~ee~~|
|A<br>~~a~~|43.90|44.40<br>~~ee ee~~|44.90<br>~~ee~~|
|A1<br>~~a~~|1.15|1.35|1.55|
|A2<br>~~a~~|1.40|1.60|1.80|
|A3<br>~~a~~<br>~~Rs~~|38.90|39.40|39.90|
|B<br>~~Rs~~<br>~~Rs~~|21.50|22.00|22.50|
|B1<br>~~Rs~~<br>~~Rs~~|11.25|11.85|12.45|
|B2<br>~~Rs~~<br>~~a~~|24.83|25.23|25.63|
|C<br>~~a~~|5.00|5.40|6.00|
|C1<br>~~a~~|6.50|7.00|7.50|
|C2<br>~~a~~<br>~~Rs~~|11.20|11.70|12.20|
|C3<br>~~Rs~~<br>~~Rs~~|2.90|3.00|3.10|
|e<br>~~Rs~~<br>~~Rs~~|2.15|2.35|2.55|
|e1<br>~~Rs~~<br>~~a~~|3.40|3.60|3.80|
|e2<br>~~a~~|4.50|4.70|4.90|
|e3<br>~~a~~|6.30|6.50|6.70|
|D<br>~~a~~||33.30||
|D1<br>~~a~~<br>~~Rs~~||5.55||
|E<br>~~Rs~~||11.20||
|E1<br>~~Rs~~<br>~~a~~||1.40||
|F<br>~~a~~|0.85|1.00|1.15|
|F1<br>~~a~~|0.35|0.50|0.65|
|R<br>~~a~~<br>~~Rs~~|1.55|1.75|1.95|
|T<br>~~Rs~~|0.45|0.55|0.65|
|V<br>~~Rs~~<br>~~a~~|0°||6°|



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**Package information** 

## **5.2 Packing information** 

**==> picture [193 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 12. SDIP-25L packing information<br>**----- End of picture text -----**<br>


**==> picture [329 x 535] intentionally omitted <==**

**----- Start of picture text -----**<br>
7 4 — U O F<br>| ‘ -<br>aa a e :<br>m4 ‘<br>1! i<br>II i<br>LU a P<br>* II 3 a<br>2 II a]<br>E obo I | fy iain<br>eas ee ———_<br>m4<br>ly 1<br>I} 1<br>I} 1<br>an<br>||<br>\\ |<br>I} 1 2<br>HI<br>1,1<br>|<br>| SY<br>\ N<br>NN<br>N A<br>N N<br>N ON<br>N N<br>NN<br>< :<br>AM10488v1<br>8123127_E<br>Base quantity: 11 pcs Bulk quantity: 132 pcs<br>**----- End of picture text -----**<br>


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**Revision history** 

## **6 Revision history** 

**Table 16. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|09-Oct-2014|1|Initial release|
|10-Apr-2015|2|Text edits and formatting changes throughout document<br>Updated_Figure 2: Pin layout (bottom view)_<br>Updated_Section 5: Package information_|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

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## Links

- [View this product on Novapart](https://novapart.co/products/STGIPS20C60T-H/intelligent-power-module-ipm-3-phase-igbt-600-v-20)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/en-ES/stmicroelectronics/stgips20c60t-h/ipm-module-igbt-20a-600v-sdip/dp/2807351)
---

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