# Intelligent Power Module (IPM), IGBT, 600 V, 5 A, 1.5 kV, N2DIP, SLLIMM-nano

![Product image](https://novapart.co/image/farnell:2530470/)

**URL**: https://novapart.co/products/STGIPQ5C60T-HL/intelligent-power-module-ipm-igbt-600-v-5-a-15-kv
**SKU**: STGIPQ5C60T-HL
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || Intelligent Power Modules
**Price**: €3.5100
**Stock**: 10+
**Lead Time**: 127 days (indicative)

## Description

IPM Power Device:IGBT; Voltage Rating (Vces / Vdss):600V; Current Rating (Ic / Id):5A; Isolation Voltage:1.5kV; IPM Case Style:N2DIP; IPM Series:SLLIMM-nano; Product Range:SLLIMM Nano

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Ipm Series | SLLIMM-nano |
| Product Range | SLLIMM Nano 2nd Series |
| Ipm Case Style | N2DIP |
| Ipm Power Device | IGBT |
| Isolation Voltage | 1.5kV |
| Current Rating (Ic / Id) | 5A |
| Voltage Rating (Vces / Vdss) | 600V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2530470/)

## **STGIPQ5C60T-HL, STGIPQ5C60T-HZ** SLLIMM™ nano - 2[nd] series IPM, 3-phase inverter, 5 A, 600 V short-circuit rugged IGBTs 

**Datasheet** - **production data** 

## **Applications** 

- 3-phase inverters for motor drives 

- Home appliances such as dish washer, refrigerator compressors, heating systems, airconditioning fans, draining and recirculation pumps 

**==> picture [182 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
N2DIP-26L type L<br>N2DIP-26L type Z<br>**----- End of picture text -----**<br>


## **Features** 

- IPM 5 A, 600 V 3-phase IGBT inverter bridge including 3 control ICs for gates driving and freewheeling diodes 

- 3.3 V, 5 V and 15 V TTL/CMOS inputs comparators with hysteresis and pull down/pull up resistors 

- Internal bootstrap diode 

- Optimized for low electromagnetic interference 

- Undervoltage lockout 

- Short-circuit rugged TFS IGBTs 

- Smart shutdown function 

## **Description** 

This second series of SLLIMM (small low-loss intelligent molded module) nano provides a compact, high performance AC motor drive in a simple, rugged design. It is composed of six improved short-circuit rugged trench gate fieldstop IGBTs with freewheeling diodes and three half-bridge HVICs for gate driving, providing low electromagnetic interference (EMI) characteristics with optimized switching speed. The package is designed to allow a better and easy screw on heatsink, it is optimized for thermal performance and compactness in built-in motor applications, or other low power applications where assembly space is limited. This IPM includes an operational amplifier, completely uncommitted, and a comparator that can be used to design a fast and efficient protection circuit. SLLIMM™ is a trademark of STMicroelectronics. 

- Interlocking function 

- Op-amp for advanced current sensing 

- Comparator for fault protection against overcurrent 

- NTC (UL 1434 CA 2 and 4) 

- Isolation rating of 1500 Vrms/min 

- Up to ±2 kV ESD protection (HBM C = 100 pF, R = 1.5 kΩ) 

**Table 1. Device summary** 

|**Order codes**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STGIPQ5C60T-HL|GIPQ5C60T-HL|N2DIP-26L type L|Tube|
|STGIPQ5C60T-HZ|GIPQ5C60T-HZ|N2DIP-26L type Z|Tube|



This is information on a product in full production. 

_www.st.com_ 

**Contents** 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Internal schematic and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Absolute maximum ratings  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5**|
||2.1<br>Thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7**|
||3.1<br>Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
||3.1.1<br>NTC thermistor  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12|
||3.2<br>Waveforms definitions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14|
|**4**|**Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|
|**5**|**Typical application circuit  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17**|
|**6**|**Recommendations  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18**|
|**7**|**Electrical characteristics (curves)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20**|
|**8**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22**|
||8.1<br>N2DIP-26L type L package information . . . . . . . . . . . . . . . . . . . . . . . . . . 23|
||8.2<br>N2DIP-26L type Z package information . . . . . . . . . . . . . . . . . . . . . . . . . . 24|
|**9**|**Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25**|
|**10**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26**|



2/27 

DocID026844 Rev 6 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Internal schematic and pin description** 

## **1 Internal schematic and pin description** 

## **Figure 1. Internal schematic diagram and pin configuration** 

DocID026844 Rev 6 

3/27 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Internal schematic and pin description** 

**Table 2. Pin description** 

|||**Table 2. Pin description**|
|---|---|---|
|**Pin**|**Symbol**|**Description**|
|1|GND|Ground|
|2|T/SD<br>/OD|NTC thermistor terminal / shutdown logic input (active low) / open-drain<br>(comparator output)|
|3|VCCW|Low voltage power supply W phase|
|4|HIN W|High-side logic input for W phase|
|5|LIN W|Low-side logic input for W phase|
|6|OP+|Op-amp non inverting input|
|7|OPout|Op-amp output|
|8|OP-|Op-amp inverting input|
|9|VCCV|Low voltage power supply V phase|
|10|HIN V|High-side logic input for V phase|
|11|LIN V|Low-side logic input for V phase|
|12|CIN|Comparator input|
|13|VCCU|Low voltage power supply V phase|
|14|HIN U|High-side logic input for V phase|
|15|T/SD<br>/OD|NTC thermistor terminal / shutdown logic input (active low) / open-drain<br>(comparator output)|
|16|LIN U|Low-side logic input for U phase|
|17|VBOOTU|Bootstrap voltage for U phase|
|18|P|Positive DC input|
|19|U,OUTU|U phase output|
|20|NU|Negative DC input for U phase|
|21|VBOOTV|Bootstrap voltage for V phase|
|22|V,OUTV|V phase output|
|23|NV|Negative DC input for V phase|
|24|VBOOTW|Bootstrap voltage for W phase|
|25|W,OUTW|W phase output|
|26|NW|Negative DC input for W phase|



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DocID026844 Rev 6 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Absolute maximum ratings** 

## **2 Absolute maximum ratings** 

- (Tj= 25°C unless otherwise noted). 

**Table 3. Inverter parts** 

||**Table 3. Inverterparts**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VCES|Collector-emitter voltage each IGBT (VIN<br>(1)= 0 V)|600|V|
|IC|Continuous collector current each IGBT|5|A|
|ICP<br>(2)|Peak collector current each IGBT (less than 1ms)|10|A|
|PTOT|Total dissipation at TC=25°C each IGBT|13.6|W|



1. Applied between HINx, LINx and GND for x = U, V, W. 

2. Pulsed width limited by max junction temperature. 

**Table 4. Control parts** 

||**Table 4. Controlparts**||||
|---|---|---|---|---|
|**Symbol**|**Parameter**|**Min**|**Max**|**Unit**|
|VCC|Low voltage power supply|-0.3|21|V|
|VBOOT|Bootstrap voltage|-0.3|620|V|
|VOUT|Output voltage between OUTU, OUTV, OUTW<br>and GND|VBOOT- 21|VBOOT+ 0.3|V|
|VCIN|Comparator input voltage|-0.3|VCC+ 0.3|V|
|Vop+|Op-amp non-inverting input|-0.3|VCC+ 0.3|V|
|Vop-|Op-amp inverting input|-0.3|VCC+ 0.3|V|
|VIN|Logic input voltage applied between HINx, LINx<br>and GND|-0.3|15|V|
|VT/SD<br>/OD|Open drain voltage|-0.3|15|V|
|∆VOUT/dt|Allowed output slew rate||50|V/ns|



**Table 5. Total system** 

||**Table 5. Total system**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VISO|Isolation withstand voltage applied between each pin and<br>heat sink plate (AC voltage, t = 60sec.)|1500|Vrms|
|TJ|Power chips operating junction temperature|-40 to 150|°C|
|TC|Module case operation temperature|-40 to 125|°C|



DocID026844 Rev 6 

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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Absolute maximum ratings** 

## **2.1 Thermal data** 

**Table 6. Thermal data** 

||**Table 6. Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rth(j-c)|Thermal resistancejunction-case single IGBT|9.2|°C/W|
||Thermal resistance junction-case single diode|15||



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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

## **3 Electrical characteristics** 

(Tj= 25°C unless otherwise noted). 

**Table 7. Inverter parts** 

|||**Table 7. Inverterparts**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|ICES|Collector-cut off<br>current<br>(VIN<br>(1)= 0 logic state)|VCE= 550 V, VCC= Vboot= 15 V|-||250|µA|
|VCE(sat)|Collector-emitter<br>saturation voltage|VCC= VBoot= 15 V, VIN<br>(1)= 0 to 5 V,<br>IC= 5 A,|-|1.7|2.15|V|
|VF|Diode forward voltage|VIN<br>(1)= 0 logic state, IC= 5 A|-|2.1||V|
|**Inductive load switching time and energy(2)**|||||||
|ton|Turn-on time|VDD= 300 V, VCC= Vboot= 15 V,<br>VIN<br>(1)= 0 to 5 V, IC= 5 A<br>(see_Figure 3_)|-|280||ns|
|tcon|Cross-over time on||-|130|||
|toff|Turn-off time||-|950|||
|tcoff|Cross-over time off||-|115|||
|trr|Reverse recovery<br>time||-|94|||
|EON|Turn-on switching loss||-|110||µJ|
|EOFF|Turn-off switching loss||-|93|||



1. Applied between HINx, LINx and GND for x = U, V, W 

2. ton and toff include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are the switching time of IGBT itself under the internally given gate driving condition. 

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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

## **Figure 2. Switching time test circuit** 

**==> picture [396 x 224] intentionally omitted <==**

## **Figure 3. Switching time definition** 

**==> picture [405 x 291] intentionally omitted <==**

**----- Start of picture text -----**<br>
100% IC   100% IC<br>t rr<br>VCE IC IC VCE<br>VIN VIN<br>t ON t OFF<br>t t<br> C(ON)  C(OFF)<br>VIN(ON) 10% IC 90% IC 10% VCE VIN(OFF) 10% VCE 10% IC<br>(a) turn-on (b) turn-off AM09223V1<br>**----- End of picture text -----**<br>


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DocID026844 Rev 6 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

## **3.1 Control part** 

(VCC=15 V unless otherwise specified) 

**Table 8. Low voltage power supply** 

|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|VCC_hys|VCCUV hysteresis||1.2|1.5|1.8|V|
|VCCH_th(on)|VCCHUV turn-on threshold||11.5|12|12.5|V|
|VCCH_th(off)|VCCHUV turn-off threshold||10|10.5|11|V|
|Iqccu|Under voltage quiescent<br>supply current|VCC=10V; T/SD<br>/OD=5V;<br>LIN=HIN=CIN=0V|||150|µA|
|Iqcc|Quiescent current|VCC=10 V; T/SD<br>/OD=5V;<br>LIN=HIN=CIN=0V|||1|mA|
|VREF|Internal comparator (CIN)<br>reference voltage||0.51|0.54|0.60|V|



**Table 9. Bootstrapped voltage** 

|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|VBS_hys|VBSUV hysteresis||1.2|1.5|1.8|V|
|VBS_th(on)|VBSUV turn-on threshold||11.1|11.5|12.1|V|
|VBS_th(off)|VBSUV turn-off threshold||9.8|10|10.6|V|
|IQBSU|Undervoltage VBSquiescent<br>current|VBS<9V<br>T/SD<br>/OD=5V;<br>LIN=0V;HIN=5V;CIN=0V;||70|110|µA|
|IQBS|VBSquiescent current|VBS=15V<br>T/SD<br>/OD=5V;<br>LIN=0V;HIN=5V;CIN=0V;||150|210|µA|
|RDS(on)|Bootstrap driver on<br>resistance|LVG ON||120||Ω|



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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

**Table 10. Logic inputs** 

||**Table**|**10. Logic inputs**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|Vil|Low logic level voltage||||0.8|V|
|Vih|High logic level voltage||2.25|||V|
|IHINh|HIN logic “1” input bias|HIN=15V|20|40|100|µA|
|IHINl|HIN logic “0” input bias<br>current|HIN=0V|||1|µA|
|ILINh|LIN logic “1” input bias<br>current|LIN=15V|20|40|100|µA|
|ILINl|LIN logic “0” input bias<br>current|LIN=0V|||1|µA|
|ISDh|SD<br>logic “0” input bias<br>current|SD<br>=15V|220|295|370|µA|
|ISDl|SD<br>logic “1” input bias<br>current|SD<br>=0V|||3|µA|
|Dt|Dead time|See_Figure 8_||180||ns|



**Table 11. Op-amp characteristics** 

|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Vio|Input offset voltage|Vic=0V, Vo=7.5V|||6|mV|
|Iio|Input offset current|Vic=0V, Vo=7.5V||4|40|nA|
|Iib|Input bias current(1)|Vic=0V, Vo=7.5V||100|200|nA|
|Vicm|Input common mode voltage<br>range||0|||V|
|VOL|Low level output voltage<br>range|RL=10 kΩto VCC||75|150|mV|
|VOH|High level output voltage<br>range|RL=10 kΩto GND|14|14.7||V|
|Io|Output short-circuit current|Source<br>Vid=+1V, Vo=0V|16|30||mA|
|||Sink<br>Vid=-1V, Vo= VCC|50|80||mA|
|SR|Slew rate|Vi=1-4V; CL=100pF;<br>unity gain|2.5|3.8||V/µs|
|GBWP|Gain bandwidth product|Vo=7.5V|8|12||MHz|
|Avd|Large signal voltage gain|RL=2 kΩ|70|85||dB|



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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

**Table 11. Op-amp characteristics (continued)** 

|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|SVR|Supply voltage rejection<br>ratio|vs. Vcc|60|75||dB|
|CMRR|Common mode rejection<br>ratio||55|70||dB|



1. The direction of the input current is out of the IC. 

**Table 12. Sense comparator characteristics** 

|**Symbol**|**Parameter**|**Test condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Iib|Input bias current|VCin=1V|-||3|µA|
|Vod|Open drain low level output<br>voltage|Iod=3mA|-||0.5|V|
|RON_OD|Open drain low level output<br>resistance|Iod=3mA|-|166||Ω|
|RPD_SD|SD<br>pull down resistor(1)||-|125||kΩ|
|td_comp|Comparator delay|T/SD<br>/OD pulled to 5V through<br>100 kΩresistor|-|90|130|ns|
|SR|Slew rate|CL=180pF; Rpu=5 kΩ|-|60||V/µs|
|tsd|Shutdown to high/low side<br>driver propagation delay|VOUT=0V, Vboot= VCC, VIN=0 to<br>3.3V|-|125||ns|
|tisd|Comparator triggering to<br>high/low side driver turn-off<br>propagation delay|Measured applying a voltage<br>step from 0V to 3.3V to pin of CIN|-|200||ns|



1. Equivalent value as a result of the resistances of three drivers in parallel 

## **Table 13. Truth table** 

|**Condition**|**Logic input (Vl)**|**Logic input (Vl)**|**Logic input (Vl)**|**Output**|**Output**|
|---|---|---|---|---|---|
||**T/SD**<br>**/OD**|**LIN**|**HIN**|**LVG**|**HVG**|
|Shutdown enable half-bridge tri-state|L|X(1)|X(1)|L|L|
|Interlocking half-bridge tri-state|H|H|H|L|L|
|0 “logic state”<br>half-bridge tri-state|H|L|L|L|L|
|1 “logic state”<br>Low side direct driving|H|H|L|H|L|
|1 “logic state”<br>high side direct driving|H|L|H|L|H|



1. X = don’t care 

DocID026844 Rev 6 

11/27 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

## **3.1.1 NTC thermistor** 

## **Figure 4. Internal structure of SD and NTC[(a)]** 

## **Figure 5. Equivalent resistance (NTC//RPD_SD)** 

- a. RPD_SD: equivalent value as result of resistances of three drivers in parallel. 

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DocID026844 Rev 6 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

## **Figure 6. Equivalent resistance (NTC//RPD_SD) zoom** 

**Figure 7. Voltage of T/SD/OD pin according to NTC temperature** 

DocID026844 Rev 6 

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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Electrical characteristics** 

## **3.2 Waveforms definitions** 

**==> picture [276 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 8. Dead time and interlocking waveform definitions<br>**----- End of picture text -----**<br>


**==> picture [401 x 345] intentionally omitted <==**

**----- Start of picture text -----**<br>
INTERLOCKING INTERLOCKING<br>**----- End of picture text -----**<br>


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DocID026844 Rev 6 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Smart shutdown function** 

## **4 Smart shutdown function** 

The device integrates a comparator for fault sensing purposes. The comparator has an internal voltage reference VREF connected to the inverting input, while the non-inverting input on pin (CIN) can be connected to an external shunt resistor for simple overcurrent protection. 

When the comparator triggers, the device is set to the Shutdown state and both its outputs are switched to the low-level setting, causing the half bridge to enter a tri-state. 

In common overcurrent protection architectures, the comparator output is usually connected to the Shutdown input through an RC network that provides a mono-stable circuit which implements a protection time following a fault condition. 

Our smart shutdown architecture immediately turns off the output gate driver in case of overcurrent along a preferential path for the fault signal which directly switches off the outputs. The time delay between the fault and output shutdown no longer depends on the RC values of the external network connected to the shutdown pin. At the same time, the DMOS connected to the open-drain output (pin T/SD/OD) is turned on by the internal logic, which holds it on until the shutdown voltage is lower than the logic input lower threshold (Vil). 

Also, the smart shutdown function allows increasing the real disable time without increasing the constant time of the external RC network. 

An NTC thermistor for temperature monitoring is internally connected in parallel to the SD pin. To avoid undesired shutdown, keep the voltage VT/SD/OD[ higher than the high-level logic ] threshold by setting the pull-up resistor RSD to 1 kΩ or 2.2 kΩ for the 3.3 V or 5 V MCU power supplies, respectively. 

DocID026844 Rev 6 

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**Smart shutdown function** 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

## **Figure 9. Smart shutdown timing waveforms in case of overcurrent event** 

**==> picture [258 x 287] intentionally omitted <==**

**----- Start of picture text -----**<br>
comp Vref<br>CP+<br>HIN/LIN<br>PROTECTION<br>HVG/LVG<br>SD/OD<br>open drain gate<br>(internal)<br>disable time<br>Fast shut down:<br>the driver outputs are set to the SD state as soon as the comparator<br>triggers even if the SD signal hasn’t reached the lower input threshold<br>**----- End of picture text -----**<br>


**==> picture [399 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
An approximation of the disable time is given by:<br>Vbias SHUT DOWN CIRCUIT<br>R SD<br>V T1/SD/OD T1/SD/OD<br>SMART SD<br>C SD<br>LOGIC<br>NTC RPD_SD RON_OD<br>GIPG080920140931FSR<br>**----- End of picture text -----**<br>


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DocID026844 Rev 6 

**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Typical application circuit** 

## **5 Typical application circuit** 

## **Figure 10. Typical application circuit** 

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**STGIPQ5C60T-HL, STGIPQ5C60T-HZ** 

**Recommendations** 

## **6 Recommendations** 

- HIN and LIN are active-high logic input signals, each having an integrated 500 kΩ (typ.) pull-down resistor. Wire each input as short as possible and use RC filters (R1, C1) on each to prevent input signal oscillation. The filters should have a time constant of approximately 100 ns and must be placed as close as possible to the IPM input pins. 

- Use a bypass capacitor Cvcc (aluminum or tantalum) to reduce the transient circuit demand on the power supply and a decoupling capacitor C2 (from 100 to 220 nF, ceramic with low ESR), placed as close as possible to each Vcc pin and in parallel to the bypass capacitor, to reduce high frequency switching noise distributed on the power supply lines. 

- To prevent circuit malfunction, place an RC filter (RSF, CSF) with a time constant (RSF x CSF) of 1µs as close as possible to the CIN pin. 

- The SD is an input/output pin (open drain type if used as output). An integrated NTC thermistor is connected internally between the SD pin and GND. The pull-up resistor RSD causes the voltage VSD-GND to decrease as the temperature increases. To always maintain the voltage above the high-level logic threshold, use a 1 kΩ or 2.2 kΩ pull-up resistor for a 3.3 V or 5 V MCU power supply, respectively. Size the filter on SD appropriately to obtain the desired re-start time after a fault event, and locate it as close as possible to the SD pin. 

- Filter high-frequency disturbances by placing the decoupling capacitor C3 (from 100 to 220 nF, ceramic with low ESR) in parallel with each Cboot. 

- Prevent overvoltage with Zener diodes DZ1 between the VCC pins and GND and in parallel with each Cboot. 

- Locate the decoupling capacitor C4 (from 100 to 220 nF, ceramic with low ESR) in parallel with the electrolytic capacitor Cvdc to prevent surge destruction. Place capacitors C4 (especially) and Cvdc as close as possible to the IPM. 

- By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an opto-coupler is possible. 

- Use low inductance shunt resistors for phase leg current sensing. 

- The wiring between N pins, the shunt resistor and PWR_GND should be as short as possible. 

- Connect SGN_GND to PWR_GND at only one point (near the shunt resistor terminal), to avoid any malfunction due to power ground fluctuation. 

**Table 14. Recommended operating conditions** 

|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VPN|Supply voltage|Applied between P-<br>Nu,Nv,Nw||300|500|V|
|VCC|Control supply voltage|Applied between Vcc-GND|13.5|15|18|V|
|VBS|High side bias voltage|Applied between Vbootx-<br>OUT for x=U,V,W|13||18|V|
|tdead|Blanking time to prevent Arm-<br>short|For each input signal|1.5|||µs|



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**Recommendations** 

**Table 14. Recommended operating conditions (continued)** 

|**Symbol**|**Parameter**|**Test condition**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|fPWM|PWM input signal|-40°C<Tc<100°C<br>-40°C<Tj<125°C|||25|kHz|
|Tc|Case operation temperature||||100|°C|



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**Electrical characteristics (curves)** 

## **7 Electrical characteristics (curves)** 

**Figure 11. Output characteristics** 

**Figure 12. Vce(sat) vs collector current** 

**Figure 13. Diode VF vs forward current** 

**Figure 14. Eon switching loss vs collector current** 

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**Electrical characteristics (curves)** 

**Figure 15. Eoff switching loss vs collector current** 

**Figure 16. Thermal impedance for N2DIP-26L IGBT** 

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**Package mechanical data** 

## **8 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**Package mechanical data** 

## **8.1 N2DIP-26L type L package information** 

## **Figure 17. N2DIP-26L type L package mechanical outline** 

**Table 15. N2DIP-26L type L mechanical dimensions[(1)]** 

|**Ref.**|**Dimensions**|**Dimensions**|**Dimensions**|**Ref.**|**Dimensions**|**Dimensions**|**Ref.**|**Dimensions**<br>**Min.**<br>**Typ.**<br>**Max.**|**Dimensions**<br>**Min.**<br>**Typ.**<br>**Max.**|**Dimensions**<br>**Min.**<br>**Typ.**<br>**Max.**|
|---|---|---|---|---|---|---|---|---|---|---|
||**Min.**|**Typ.**|**Max.**||**Min.**<br>**Typ.**|**Max.**|||**Typ.**|**Max.**|
|A|4.80|5.10|5.40|b|0.53|0.72|E|12.35|12.45|12.55|
|A1|0.80|1.00|1.20|b2|0.83|1.02|e|1.70|1.80|1.90|
|A2|4.00|4.10|4.20|c|0.46|0.59|e1|2.40|2.50|2.60|
|A3|1.70|1.80|1.90|D|32.05<br>32.15|32.15<br>32.25|eB1|14.25|14.55|14.85|
|A4|1.70|1.80|1.90|D1|2.10||L|0.85|1.05|1.25|
|A5|8.10|8.40|8.70|D2|1.85||dia|3.10|3.20|3.30|
|A6|1.75|||D3|30.65<br>30.75|30.75<br>30.85|||||



1. All dimensions are expressed in millimeters. 

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**Package mechanical data** 

## **8.2 N2DIP-26L type Z package information** 

**==> picture [268 x 41] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. N2DIP-26L type Z package mechanical outline<br>—<br>sf<br>**----- End of picture text -----**<br>


**Table 16. N2DIP-26L type Z mechanical dimensions[(1)]** 

|**Ref.**|**Dimensions**|**Dimensions**|**Dimensions**|**Ref.**|**Dimensions**|**Dimensions**|**Ref.**<br>**Max.**|**Dimensions**<br>**Min.**<br>**Typ.**<br>**Max.**|**Dimensions**<br>**Min.**<br>**Typ.**<br>**Max.**|**Dimensions**<br>**Min.**<br>**Typ.**<br>**Max.**|
|---|---|---|---|---|---|---|---|---|---|---|
||**Min.**|**Typ.**|**Max.**||**Min.**|**Typ.**<br>**Max.**|||**Typ.**|**Max.**|
|A<br>~~a~~<br>~~PFof~~<br>~~a~~|4.80<br>~~ee~~<br>~~of~~<br>||5.10<br>~~eeee~~<br>|<br>[||5.40<br>~~ee~~<br>[|<br>[|b<br>~~ee~~<br>[<br>||0.53<br>~~ee~~<br>~~Ff~~|0.72<br>~~ee~~<br>~~ee~~<br>~~Ff~~<br>~~tf~~|0.72<br>E<br>~~ee~~<br>~~eeee~~<br>|<br>~~ff~~|12.35<br>~~ee~~<br>~~ee~~<br>~~ff~~|12.45<br>~~ee~~<br>~~ee~~<br>~~ffff~~|12.55<br>~~ee~~<br>~~ee~~<br>~~ff~~|
|A1<br>~~a~~<br>~~PFof~~<br>~~a~~<br>~~a~~|0.80<br>~~ee ~~<br>~~of~~<br>|<br>~~ee~~<br>|1.00<br> ~~eeee~~<br>|<br>[|<br>~~ee~~<br>|1.20<br>~~ee~~<br>[|<br>[<br>~~ee~~<br>|b2<br>~~ee~~<br>[<br>|<br>~~ee~~<br>|0.83<br>~~ee~~<br>~~Ff~~<br>~~es~~<br>|1.02<br>~~ee~~<br>~~ee~~<br>~~Ff~~<br>~~tf~~<br>~~esee~~<br>|1.02<br>e<br>~~ee~~<br>~~eeee~~<br>|<br>~~ff~~<br>~~eeee~~<br>|1.70<br>~~ee~~<br>~~ee~~<br>~~ff~~<br>~~eeee~~<br>|1.80<br>~~ee~~<br>~~ee~~<br>~~ffff~~<br>~~ee~~<br>|1.90<br>~~ee~~<br>~~ee~~<br>~~ff~~|
|A2<br>~~PF of~~<br>~~a~~<br>~~a~~<br>~~a~~|4.00<br>~~of~~<br>|<br>~~ee~~<br>~~ee~~<br>|4.10<br>|<br>[|<br>~~ee~~<br>~~ee ee~~<br>|4.20<br>[|<br>[<br>~~ee~~<br>~~ee~~<br>|c<br>[<br>|<br>~~ee~~<br>~~ee ee~~<br>|0.46<br>~~Ff~~<br>~~es~~<br>~~ee~~<br>|0.59<br>~~ee~~<br>~~Ff~~<br>~~tf~~<br>~~esee~~<br>~~ee ee~~<br>|0.59<br>e1<br>~~ee ee~~<br>|<br>~~ff~~<br>~~eeee~~<br>~~ee ee~~<br>|2.40<br>~~ee~~<br>~~ff~~<br>~~eeee~~<br>~~ee~~<br>|2.50<br>~~ee~~<br>~~ff ff~~<br>~~ee~~<br>~~ee~~<br>|2.60<br>~~ee~~<br>~~ff~~|
|A3<br>~~a~~ <br>~~a~~<br>~~a~~|1.70<br>~~ee ~~<br> ~~ee~~<br>~~ee~~<br>|1.80<br> ~~ee ~~<br>~~ee ee~~<br>~~ee ee~~<br>|1.90<br> ~~ee ~~<br>~~ee~~<br>~~ee~~<br>|D<br> ~~ee ~~<br>~~ee ee~~<br>~~ee ee~~<br>|32.05<br> ~~es ~~<br>~~ee~~<br>~~ee~~<br>|32.15<br>32.25<br> ~~es ee~~<br>~~ee ee~~<br>~~ee ee~~<br>|32.25<br>eB1<br>~~ee ee~~<br>~~ee ee~~<br>~~ee ee~~<br>|16.10<br>~~ee ee ~~<br>~~ee~~<br>~~ee~~<br>|16.40<br> ~~ee~~<br>~~ee~~<br>~~ee~~<br>|16.70|
|A4<br> <br>~~a~~ <br>~~a~~<br>~~PF~~|1.70<br> ~~ee ~~<br> ~~ee~~<br>~~ee~~|1.80<br> ~~ee ee~~<br>~~ee ee~~<br>~~ee~~|1.90<br>~~ee ~~<br>~~ee~~<br>~~ee~~|D1<br> ~~ee ee~~<br>~~ee ee~~<br>~~ee~~|2.10<br>~~ee ~~<br>~~ee~~<br>~~ee~~|~~ee ee~~<br>~~ee ee~~<br>~~eeee~~|eB2<br>~~ee ee ~~<br>~~ee ee~~<br>~~eeee~~|21.18<br> ~~ee~~<br>~~ee~~<br>~~eeee~~|21.48<br>~~ee~~<br>~~ee~~<br>~~ee~~|21.78|
|A5<br> <br>~~a ~~<br>~~PF~~<br>~~tf~~|8.10<br> ~~ee ~~<br> ~~ee~~<br>~~tf~~<br>~~[|~~|8.40<br> ~~ee ee~~<br>~~ee~~<br>~~[|~~<br>~~[|~~|8.70<br>~~ee ~~<br>~~ee~~<br>~~[|~~<br>~~[~~|D2<br> ~~ee ee~~<br>~~ee~~<br>~~[~~<br>~~|~~|1.85<br>~~ee ~~<br>~~ee~~<br>~~|~~|~~ee ee~~<br>~~eeee~~<br>~~|~~|L<br>~~ee ee ~~<br>~~eeee~~<br>~~[|~~<br>~~[|~~|0.85<br> ~~ee~~<br>~~eeee~~<br>~~[|~~<br>~~|~~|1.05<br>~~ee~~<br>~~ee~~<br>~~[|~~|1.25<br>~~[|~~|
|A6<br> <br>~~PF~~<br>~~tf~~|1.75<br> ~~ee~~<br>~~tf~~<br>~~[|~~|~~ee~~<br>~~[|~~<br>~~[|~~|~~ee~~<br>~~[|~~<br>~~[~~|D3<br>~~ee~~<br>~~[~~<br>~~|~~|30.65<br>~~ee~~<br>~~|~~|30.75<br>30.85<br>~~eeee~~<br>~~|~~|30.85<br>dia<br>~~eeee~~<br>~~[|~~<br>~~[|~~|3.10<br>~~eeee~~<br>~~[|~~<br>~~|~~|3.20<br>~~ee~~<br>~~[|~~|3.30<br>~~[|~~|



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**Packaging mechanical data** 

## **9 Packaging mechanical data** 

**==> picture [194 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 19. N2DIP-26L tube dimensions [(b)]<br>**----- End of picture text -----**<br>


**==> picture [171 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
b. All dimensions are expressed in millimeters.<br>**----- End of picture text -----**<br>


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**Revision history** 

## **10 Revision history** 

**Table 17. Document revision history** 

||**Table**|**17. Document revision history**|
|---|---|---|
|**Date**|**Revision**|**Changes**|
|08-Sep-2014|1|Initial release.|
|29-Oct-2014|2|– Minor text edits throughout the document.<br>– Updated_Figure 1_,_4_,_7_,_9_and_10_.<br>– Added_Figure 6_and_Figure 7_.<br>– Updated values for the ISDhand ISDlparameters in_Table 10:_<br>_Logic inputs_.<br>– Added footnote to_Table 12_.<br>– Removed NTC thermistor table and “Resistance variation vs.<br>temperature” equation from_Section 3.1.1: NTC thermistor_|
|07-Nov-2014|3|Minor text and formatting edits throughout document.|
|24-Jul-2015|4|Minor text and formatting edits throughout document.<br>Updated cover page package image.<br>Updated_Table 3_,_Table 6_,_Table 7_,_Table 8_,_Table 9_, and<br>_Table 10_<br>Added_Section 7: Electrical characteristics (curves)_|
|21-Aug-2015|5|Modified:_Figure 13_<br>Minor text changes|
|09-Dec-2015|6|Modified:_Features_<br>Minor text changes|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

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---

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