# Power MOSFET, N Channel, 600 V, 18 A, 0.168 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:4036315/)

**URL**: https://novapart.co/products/STFU24N60M2/power-mosfet-n-channel-600-v-18-a-0168-ohm-to
**SKU**: STFU24N60M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.8700
**Stock**: 500+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M2 Series |
| Qualification | - |
| Power Dissipation | 30W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 18A |
| Drain Source On State Resistance | 0.168ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:4036315/)

## **STFU24N60M2** 

N-channel 600 V, 0.168 Ω typ., 18 A MDmesh™ M2 Power MOSFET in a TO-220FP ultra narrow leads package 

Datasheet - production data 

## **Features** 

**Order code VDS RDS(on) max ID** STFU24N60M2 600 V 0.19 Ω 18 A ~~ee~~  Extremely low gate charge 

- Lower RDS(on) x area vs previous generation 

- Low gate input resistance 

1[2 3] **TO-220FP ultra narrow leads** 

- 100% avalanche tested 

- Zener-protected 

## **Applications** 

- Switching applications 

**Figure 1: Internal schematic diagram** 

- LLC converters, resonant converters 

D(2) **Description** This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical G(1) structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. S(3) AM15572v1_no_tab **Table 1: Device summary Order code Marking Package Packing** STFU24N60M2 24N60M2 TO-220FP ultra narrow leads Tube ~~EE~~ 

This is information on a product in full production. 

_www.st.com_ 

September 2015 

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|**Contents**<br>**STFU24N60M2**|**Contents**<br>**STFU24N60M2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuit ....................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>TO-220FP package information ........................................................ 9|
|**5**|**Revision history ............................................................................ 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 25|V|
|ID|Drain current (continuous) at TC= 25 °C|18_(1)_|A|
|ID|Drain current (continuous) at TC= 100 °C|12_(1)_|A|
|IDM_(2)_|Drain current (pulsed)|72_(1)_|A|
|PTOT|Total dissipation at TC= 25 °C|30|W|
|VISO|Insulation withstand voltage (RMS) from all three leads to<br>external heat sink (t = 1 s; TC= 25 °C)|2500|V|
|dv/dt_(3)_|Peak diode recovery voltage slope|15|V/ns|
|dv/dt_(4)_|MOSFET dv/dt ruggedness|50||
|Tstg|Storage temperature|- 55 to<br>150|°C|
|Tj|Max. operating junction temperature|||



## **Notes:** 

- (1)Limited by maximum junction temperature. 

- (2)Pulse width limited by safe operating area. 

(3)ISD ≤ 18 A, di/dt ≤ 400 A/µs; VDSpeak < V(BR)DSS, VDD = 400 V. 

- (4)VDS ≤ 480 V. 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case max|4.2|°C/W|
|Rthj-amb|Thermal resistancejunction-ambient max|62.5||



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive (pulse width<br>limited byTjmax)|3.5|A|
|EAS|Single pulse avalanche energy (starting Tj= 25°C, ID= IAR;<br>VDD= 50 V)|180|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 5: On /off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 1 mA, VGS= 0 V|600|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 600 V|||1|µA|
|||VDS= 600 V, TC= 125 °C|||100|µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 25 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2|3|4|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 9 A||0.168|0.19|Ω|



**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|1060|-|pF|
|Coss|Output capacitance||-|55|-|pF|
|Crss|Reverse transfer<br>capacitance||-|2.2|-|pF|
|Coss eq._(1)_|Equivalent output<br>capacitance|VDS= 0 to 480 V, VGS= 0 V|-|258|-|pF|
|RG|Intrinsicgate resistance|f = 1 MHz, ID= 0|-|7|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 18 A,<br>VGS= 10 V ( see_Figure 15:_<br>_"Test circuit for gate charge_<br>_behavior"_)|-|29|-|nC|
|Qgs|Gate-source charge||-|6|-|nC|
|Qgd|Gate-drain charge||-|12|-|nC|



## **Notes:** 

(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

**Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 9 A,<br>RG= 4.7 Ω, VGS= 10 V ( see<br>_Figure 14: "Test circuit for_<br>_resistive load switching times"_<br>and_Figure 19: "Switching time_<br>_waveform"_)|-|14|-|ns|
|tr|Rise time||-|9|-|ns|
|td(off)|Turn-off delaytime||-|60|-|ns|
|tf|Fall time||-|15|-|ns|



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**Electrical characteristics** 

**Table 8: Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD_(1)_|Source-drain current||-||18|A|
|ISDM_(1)(2)_|Source-drain current<br>(pulsed)||-||72|A|
|VSD_(3)_|Forward on voltage|ISD= 18 A, VGS= 0 V|-||1.6|V|
|trr|Reverse recoverytime|ISD= 18 A, di/dt = 100 A/µs,<br>VDD= 60 V ( see_Figure 16:_<br>_"Test circuit for inductive load_<br>_switching and diode recovery_<br>_times"_)|-|332||ns|
|Qrr|Reverse recoverycharge||-|4||µC|
|IRRM|Reverse recovery current||-|24||A|
|trr|Reverse recoverytime|ISD= 18 A, di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C, (see<br>_Figure 16: "Test circuit for_<br>_inductive load switching and_<br>_diode recovery times"_)|-|450||ns|
|Qrr|Reverse recoverycharge||-|5.5||µC|
|IRRM|Reverse recovery current||-|25||A|



## **Notes:** 

(1)The value is rated according to Rthj-case and limited by package. 

(2)Pulse width limited by safe operating area. 

(3)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [128 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 3: Thermal impedance<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics** 

**Figure 5: Transfer characteristics** 

**Figure 6: Gate charge vs gate-source voltage** 

**Figure 7: Static drain-source on-resistance** 

**==> picture [11 x 18] intentionally omitted <==**

**----- Start of picture text -----**<br>
W<br>()<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [198 x 178] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 8: Capacitance variations<br>(pF)C POESSSA EET AM15665v1<br>Po SSA<br>|<br>1000 ees Ciss<br>Po<br>|amet eS<br>|<br>100 HEN,<br>pA<br>Coss<br>\ EEN peg<br>10 sail [a] LL<br>SS ee ee ere<br>aR NR<br>Crss<br>1 PCI<br>0.1 1 10 100 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10: Normalized on-resistance vs temperature** 

**Figure 12: Normalized V(BR)DSS vs temperature** 

**Figure 9: Normalized gate threshold voltage vs. temperature** 

**Figure 11: Source-drain diode forward characteristics** 

**Figure 13: Output capacitance stored energy** 

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**Test circuit** 

## **3 Test circuit** 

**==> picture [416 x 569] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14: Test circuit for resistive load<br>Figure 15: Test circuit for gate charge<br>switching times  behavior<br>Figure 16: Test circuit for inductive load  Figure 17: Unclamped inductive load test<br>switching and diode recovery times  circuit<br>Figure 18: Unclamped inductive waveform  Figure 19: Switching time waveform<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 TO-220FP package information** 

**Figure 20: TO-220FP ultra narrow leads package outline** 

**==> picture [406 x 480] intentionally omitted <==**

**----- Start of picture text -----**<br>
8576148_1<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 9: TO-220FP ultra narrow leads mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|B|2.50||2.70|
|D|2.50||2.75|
|E|0.45||0.60|
|F|0.65||0.75|
|F1|-||0.90|
|G|4.95||5.20|
|G1|2.40|2.54|2.70|
|H|10.00||10.40|
|L2|15.10||15.90|
|L3|28.50||30.50|
|L4|10.20||11.00|
|L5|2.50||3.10|
|L6|15.60||16.40|
|L7|9.00||9.30|
|L8|3.20||3.60|
|L9|-||1.30|
|Dia.|3.00||3.20|



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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|12-Mar-2015|1|Initial release|
|08-Sepr-2015|2|Datasheet statuspromoted frompreliminarytoproduction data|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2015 STMicroelectronics – All rights reserved 

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