# Power MOSFET, N Channel, 800 V, 9 A, 0.47 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:2729665/)

**URL**: https://novapart.co/products/STFU10N80K5/power-mosfet-n-channel-800-v-9-a-047-ohm-to-220fp
**SKU**: STFU10N80K5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.0600
**Stock**: 10+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:9A; Drain Source Voltage Vds:800V; On Resistance Rds(on):0.47ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 30W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 800V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 9A |
| Drain Source On State Resistance | 0.47ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2729665/)

## **STF10N80K5, STFU10N80K5** 

N-channel 800 V, 0.470 Ω typ., 9 A MDmesh™ K5 Power MOSFETs in a TO-220FP and TO-220FP ultra narrow leads 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STF10N80K5|800 V|0.600 Ω|9 A|30 W|
|STFU10N80K5|||||



- Industry’s lowest RDS(on) x area 

- Industry’s best figure of merit (FoM) 

- Ultra-low gate charge 

- 100% avalanche tested 

- Zener-protected 

**Figure 1: Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STF10N80K5|10N80K5|TO-220FP<br>TO-220FP ultra narrow leads|Tube|
|STFU10N80K5||||



This is information on a product in full production. 

September 2016 

DocID026564 Rev 5 

1/17 

_www.st.com_ 

|**Contents**<br>**STF10N80K5, STFU10N80K5**|**Contents**<br>**STF10N80K5, STFU10N80K5**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 9**|
|**4**|**Package information ..................................................................... 11**|
||4.1<br>TO-220FP package information ...................................................... 12|
||4.2<br>TO-220FP ultra narrow leads package information ......................... 14|
|**5**|**Revision history ............................................................................ 16**|



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**STF10N80K5, STFU10N80K5** 

**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 30|V|
|ID_(1)_|Drain current (continuous) at TC= 25 °C|9|A|
|ID_(1)_|Drain current (continuous) at TC= 100 °C|6|A|
|IDM_(2)_|Drain currentpulsed|36|A|
|PTOT|Total dissipation at TC= 25 °C|30|W|
|IAR|Max. current during repetitive or single pulse avalanche (pulse<br>width limited byTjmax.)|3|A|
|EAS|Single pulse avalanche energy (starting TJ= 25 °C, ID= IAS,<br>VDD= 50 V)|130|mJ|
|VISO|Insulation withstand voltage (RMS) from all three leads to external<br>heat sink (t = 1 s; TC= 25 °C)|2500|V|
|dv/dt_(3)_|Peak diode recoveryvoltage slope|4.5|V/ns|
|dv/dt_(4)_|MOSFET dv/dt ruggedness|50||
|Tj|Operating junction temperature range|- 55 to 150|°C|
|Tstg|Storage temperature range|||



## **Notes:** 

(1)Limited by maximum junction temperature. 

(2)Pulse width limited by safe operating area. 

(3)ISD≤ 9 A, di/dt ≤ 100 A/μs; VDS peak ≤ V(BR)DSS (4)VDS ≤ 640 V 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|4.2|°C/W|
|Rthj-amb|Thermal resistancejunction-ambient|62.5|°C/W|



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**STF10N80K5, STFU10N80K5** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

TC = 25 °C unless otherwise specified 

**Table 4: On/off-state** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|VGS= 0 V, ID= 1 mA|800|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 800 V|||1|µA|
|||VGS= 0 V, VDS= 800 V<br>TC= 125 °C_(1)_|||50|µA|
|IGSS|Gate bodyleakage current|VDS= 0 V, VGS= ±20 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 100µA|3|4|5|V|
|RDS(on)|Static drain-source on-resistance|VGS= 10 V, ID= 4.5 A||0.470|0.600|Ω|



## **Notes:** 

(1)Defined by design, no subject to production test. 

**Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|635|-|pF|
|Coss|Output capacitance||-|53|-|pF|
|Crss|Reverse transfer<br>capacitance||-|0.8|-|pF|
|Co(tr)_(1)_|Equivalent capacitance<br>time related|VDS= 0 to 640 V, VGS= 0 V|-|85|-|pF|
|Co(er)_(2)_|Equivalent capacitance<br>energyrelated|||34|-|pF|
|Rg|Intrinsicgate resistance|f = 1 MHz , ID= 0 A|-|6|-|Ω|
|Qg|Totalgate charge|VDD= 640 V, ID= 9 A<br>VGS= 10 V<br>See_Figure 16: "Test circuit for_<br>_gate charge behavior"_|-|22|-|nC|
|Qgs|Gate-source charge||-|5.5|-|nC|
|Qgd|Gate-drain charge||-|13.2|-|nC|



## **Notes:** 

(1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

(2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS. 

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**STF10N80K5, STFU10N80K5** 

**Electrical characteristics** 

**Table 6: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on<br>delaytime|VDD= 400 V, ID= 4.5 A, RG= 4.7 Ω<br>VGS= 10 V See_Figure 15: "Test circuit for_<br>_resistive load switching times"_and_Figure_<br>_20: "Switching time waveform"_|-|14.5|-|ns|
|tr|Rise time||-|11|-|ns|
|td(off)|Turn-off<br>delaytime||-|35|-|ns|
|tf|Fall time||-|14|-|ns|



**Table 7: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain<br>current||-||9|A|
|ISDM_(1)_|Source-drain<br>current (pulsed)||-||36|A|
|VSD_(2)_|Forward on<br>voltage|ISD= 9 A, VGS= 0 V|-||1.5|V|
|trr|Reverse<br>recovery time|ISD= 9 A, di/dt = 100 A/µs,<br>VDD= 60 V, see_Figure 17: "Test circuit_<br>_for inductive load switching and diode_<br>_recovery times"_)|-|370||ns|
|Qrr|Reverse<br>recovery charge||-|4.58||µC|
|IRRM|Reverse<br>recoverycurrent||-|25||A|
|trr|Reverse<br>recoverytime|ISD= 9 A, di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C<br>see_Figure 17: "Test circuit for inductive_<br>_load switching and diode recovery_<br>_times"_|-|520||ns|
|Qrr|Reverse<br>recoverycharge||-|5.88||µC|
|IRRM|Reverse<br>recoverycurrent||-|22.5||A|



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. 

## **Table 8: Gate-source Zener diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ.**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)GSO|Gate-source breakdown voltage|IGS= ± 1 mA, ID= 0 A|30|-|-|V|



The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**Figure 3: Thermal impedance** 

**Figure 4: Output characteristics** 

**Figure 5: Transfer characteristics** 

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**Electrical characteristics** 

**Figure 6: Gate charge vs. gate-source voltage** 

**==> picture [180 x 161] intentionally omitted <==**

**Figure 8: Capacitance variations** 

**==> picture [182 x 161] intentionally omitted <==**

**Figure 10: Normalized gate threshold voltage vs. temperature** 

**==> picture [186 x 160] intentionally omitted <==**

**Figure 7: Static drain-source on-resistance** 

**==> picture [185 x 160] intentionally omitted <==**

**Figure 9: Source-drain diode forward characteristics** 

**==> picture [173 x 160] intentionally omitted <==**

**Figure 11: Normalized on-resistance vs. temperature** 

**==> picture [174 x 149] intentionally omitted <==**

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## **Electrical characteristics** 

**Figure 12: Normalized V(BR)DSS vs. temperature** 

**==> picture [167 x 137] intentionally omitted <==**

**Figure 13: Maximum avalanche energy vs. starting TJ** 

**==> picture [192 x 159] intentionally omitted <==**

**Figure 14: Output capacitance stored energy** 

**==> picture [179 x 161] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 400] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15: Test circuit for resistive load  Figure 16: Test circuit for gate charge<br>switching times  behavior<br>Figure 17: Test circuit for inductive load<br>switching and diode recovery times  Figure 18: Unclamped inductive load test<br>circuit<br>**----- End of picture text -----**<br>


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## **Test circuits** 

**Figure 19: Unclamped inductive waveform** 

**==> picture [157 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20: Switching time waveform<br>**----- End of picture text -----**<br>


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**STF10N80K5, STFU10N80K5** 

**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**STF10N80K5, STFU10N80K5** 

**Package information** 

## **4.1 TO-220FP package information** 

**Figure 21: TO-220FP package outline** 

~~©~~ 12/17 DocID026564 Rev 5 

**STF10N80K5, STFU10N80K5** 

**Package information** 

**Table 9: TO-220FP package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.4||4.6|
|B|2.5||2.7|
|D|2.5||2.75|
|E|0.45||0.7|
|F|0.75||1|
|F1|1.15||1.70|
|F2|1.15||1.70|
|G|4.95||5.2|
|G1|2.4||2.7|
|H|10||10.4|
|L2||16||
|L3|28.6||30.6|
|L4|9.8||10.6|
|L5|2.9||3.6|
|L6|15.9||16.4|
|L7|9||9.3|
|Dia|3||3.2|



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**STF10N80K5, STFU10N80K5** 

**Package information** 

**4.2 TO-220FP ultra narrow leads package information** 

**Figure 22: TO-220FP ultra narrow leads package outline** 

**==> picture [406 x 479] intentionally omitted <==**

**----- Start of picture text -----**<br>
8576148_1<br>**----- End of picture text -----**<br>


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**Package information** 

|**K5, STFU10N80K5**<br>**Package information**|**K5, STFU10N80K5**<br>**Package information**|**K5, STFU10N80K5**<br>**Package information**|**K5, STFU10N80K5**<br>**Package information**|
|---|---|---|---|
|**Table 10: TO-220FP ultra narrow leads mechanical data**||||
|**Dim.**||**mm**||
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|B|2.50||2.70|
|D|2.50||2.75|
|E|0.45||0.60|
|F|0.65||0.75|
|F1|-||0.90|
|G|4.95||5.20|
|G1|2.40|2.54|2.70|
|H|10.00||10.40|
|L2|15.10||15.90|
|L3|28.50||30.50|
|L4|10.20||11.00|
|L5|2.50||3.10|
|L6|15.60||16.40|
|L7|9.00||9.30|
|L8|3.20||3.60|
|L9|-||1.30|
|Dia.|3.00||3.20|



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**Revision history** 

## **5 Revision history** 

**Table 11: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|23-Jun-2014|1|First release.|
|13-Aug-2014|2|-Document status promoted from preliminary to production data.<br>-Inserted_Section 3: Electrical characteristics (curves)_.<br>-Minor text changes.|
|17-Sep-2014|3|Updated title, features and description in coverpage.|
|05-Nov-2014|4|Updated_Section 3: Electrical characteristics (curves)_.<br>Minor text changes.|
|08-Sep-2016|5|Added the order code STFU10N80K5 and the relative_Section 4.2: "TO-_<br>_220FP ultra narrow leads package information"._|



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## **STF10N80K5, STFU10N80K5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

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