# Power MOSFET, N Channel, 600 V, 11 A, 0.35 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:2602654/)

**URL**: https://novapart.co/products/STFH13N60M2/power-mosfet-n-channel-600-v-11-a-035-ohm-to-220fp
**SKU**: STFH13N60M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.9660
**Stock**: 200+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:11A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.35ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; P

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (23-Jan-2024) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh, M2 |
| Qualification | - |
| Power Dissipation | 25W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 11A |
| Drain Source On State Resistance | 0.35ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2602654/)

## **STFH13N60M2** 

N-channel 600 V, 0.35 Ω typ., 11 A MDmesh™ M2 Power MOSFET in a TO-220FP wide creepage package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max**|**ID**|
|---|---|---|---|
|STFH13N60M2|600 V|0.38 Ω|11 A|



- Extremely low gate charge 

- Excellent output capacitance (COSS) profile 

- 100% avalanche tested 

- Zener-protected 

- Wide creepage distance of 4.25 mm between the pins 

## **Applications** 

- Switching applications 

## **Description** 

**Figure 1: Internal schematic diagram** 

**==> picture [179 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
D(2)<br>G(1)<br>S(3) AM15572v1_no_tab<br>**----- End of picture text -----**<br>


This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. 

The TO-220FP wide creepage package provides increased surface insulation for Power MOSFETs to prevent failure due to arcing, which can occur in polluted environments. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STFH13N60M2|13N60M2|TO-220FP wide creepage|Tube|



This is information on a product in full production. 

_www.st.com_ 

June 2016 

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|**Contents**<br>**STFH13N60M2**|**Contents**<br>**STFH13N60M2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package mechanical data ............................................................... 9**|
||4.1<br>TO-220FP wide creepage package information ................................ 9|
|**5**|**Revision history ............................................................................ 11**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 25|V|
|ID|Drain current (continuous) at TC= 25 °C|11_(1)_|A|
|ID|Drain current (continuous) at TC= 100 °C|7_(1)_|A|
|IDM_(2)_|Drain current (pulsed)|44|A|
|PTOT|Total dissipation at TC= 25 °C|25|W|
|VISO|Insulation withstand voltage (RMS) from all three leads to external<br>heat sink (t = 1 s; TC= 25 °C)|2500|V|
|dv/dt_(3)_|Peak diode recovery voltage slope|15|V/ns|
|dv/dt_(4)_|MOSFET dv/dt ruggedness|50||
|Tstg|Storage temperature range|- 55 to 150|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

- (1)Limited by maximum junction temperature. 

- (2)Pulse width limited by safe operating area. 

(3)ISD ≤ 11 A, di/dt ≤ 400 A/µs; VDS(peak < V(BR)DSS, VDD  = 400 V 

- (4)VDS ≤ 480 V 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case max|5|°C/W|
|Rthj-amb|Thermal resistancejunction-ambient max|62.5|°C/W|



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive (pulse width limited byTjmax)|2.8|A|
|EAS|Singlepulse avalanche energy(startingTj= 25°C, ID= IAR; VDD= 50 V)|125|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 5: On /off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 1 mA, VGS= 0 V|600|||V|
|IDSS|Zero gate voltage<br>drain current|VDS= 600 V, VGS= 0 V|||1|µA|
|||VDS= 600 V, , VGS= 0 V,<br>TC= 125 °C_(1)_|||100|µA|
|IGSS|Gate-body leakage<br>current|VGS= ± 25 V, VDS= 0 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2|3|4|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 5.5 A||0.35|0.38|Ω|



## **Notes:** 

(1)Defined by design, not subject to production test. 

**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|580|-|pF|
|Coss|Output capacitance||-|32|-|pF|
|Crss|Reverse transfer<br>capacitance||-|1.1|-|pF|
|Coss eq._(1)_|Equivalent output<br>capacitance|VDS= 0 to 480 V, VGS= 0 V|-|120|-|pF|
|RG|Intrinsicgate resistance|f = 1 MHz open drain|-|6.6|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 11 A,<br>VGS= 10 V (see_Figure 15: "Test_<br>_circuit for gate charge behavior"_)|-|17|-|nC|
|Qgs|Gate-source charge||-|2.5|-|nC|
|Qgd|Gate-drain charge||-|9|-|nC|



## **Notes:** 

(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

**Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 5.5 A,<br>RG= 4.7 Ω, VGS= 10 V ( see<br>_Figure 14: "Test circuit for resistive_<br>_load switching times"_and_Figure_<br>_19: "Switching time waveform"_)|-|11|-|ns|
|tr|Rise time||-|10|-|ns|
|td(off)|Turn-off delaytime||-|41|-|ns|
|tf|Fall time||-|9.5|-|ns|



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**Electrical characteristics** 

|||**Table 8: Source drain diode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|ISD|Source-drain current||-||11|A|
|ISDM_(1)_|Source-drain current<br>(pulsed)||-||44|A|
|VSD_(2)_|Forward on voltage|ISD= 11 A, VGS= 0 V|-||1.6|V|
|trr|Reverse recoverytime|ISD= 11 A, di/dt = 100 A/µs,<br>VDD= 60 V ( see_Figure 16: "Test_<br>_circuit for inductive load switching_<br>_and diode recovery times"_)|-|297||ns|
|Qrr|Reverse recovery<br>charge||-|2.8||µC|
|IRRM|Reverse recovery<br>current||-|18.5||A|
|trr|Reverse recoverytime|ISD= 11 A, di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C, (see<br>_Figure 16: "Test circuit for_<br>_inductive load switching and diode_<br>_recovery times"_)|-|394||ns|
|Qrr|Reverse recovery<br>charge||-|3.8||µC|
|IRRM|Reverse recovery<br>current||-|19||A|



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [128 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 3: Thermal impedance<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics** 

**Figure 5: Transfer characteristics** 

**Figure 6: Normalized V(BR)DSS vs temperature** 

**Figure 7: Static drain-source on-resistance** 

**==> picture [11 x 27] intentionally omitted <==**

**----- Start of picture text -----**<br>
W<br>()<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8: Gate charge vs gate-source voltage** 

**==> picture [184 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS<br>VDS<br>(V)<br>VDD=480V (V)<br>VDS<br>10 ID=11A 500<br>8 400<br>6 300<br>4 200<br>2 100<br>0 0<br>0 4 8 12 16 Qg(nC)<br>**----- End of picture text -----**<br>


**Figure 10: Normalized gate threshold voltage vs temperature** 

**Figure 9: Capacitance variations** 

**==> picture [198 x 167] intentionally omitted <==**

**----- Start of picture text -----**<br>
C AM15717v1<br>(pF)<br>1000<br>Ciss<br>100<br>Coss<br>10<br>1 Crss<br>0.1<br>0.1 1 10 100 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 11: Normalized on-resistance vs temperature** 

**==> picture [28 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID=17 A<br>**----- End of picture text -----**<br>


**Figure 12: Source-drain diode forward characteristics** 

**Figure 13: Output capacitance stored energy** 

**==> picture [208 x 166] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15721v1<br>Eoss (µJ)<br>4<br>3<br>2<br>1<br>0<br>0 100 200 300 400 500 VDS(V)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 580] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14: Test circuit for resistive load  Figure 15: Test circuit for gate charge<br>switching times  behavior<br>Figure 16: Test circuit for inductive load<br>switching and diode recovery times  Figure 17: Unclamped inductive load test<br>circuit<br>Figure 19: Switching time waveform<br>Figure 18: Unclamped inductive waveform<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 TO-220FP wide creepage package information** 

**Figure 20: TO-220FP wide creepage package outline** 

**==> picture [406 x 482] intentionally omitted <==**

**----- Start of picture text -----**<br>
DM00260252_1<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

**Table 9: TO-220FP wide creepage package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.60|4.70|4.80|
|B|2.50|2.60|2.70|
|D|2.49|2.59|2.69|
|E|0.46||0.59|
|F|0.76||0.89|
|F1|0.96||1.25|
|F2|1.11||1.40|
|G|8.40|8.50|8.60|
|G1|4.15|4.25|4.35|
|H|10.90|11.00|11.10|
|L2|15.25|15.40|15.55|
|L3|28.70|29.00|29.30|
|L4|10.00|10.20|10.40|
|L5|2.55|2.70|2.85|
|L6|16.00|16.10|16.20|
|L7|9.05|9.15|9.25|
|Dia|3.00|3.10|3.20|



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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|12-May-2016|1|Initial release|
|10-Jun-2016|2|Document statuspromoted frompreliminarytoproduction data.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

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