# Power MOSFET, N Channel, 600 V, 3.5 A, 1.3 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:4036312/)

**URL**: https://novapart.co/products/STF5N60M2/power-mosfet-n-channel-600-v-35-a-13-ohm-to-220fp
**SKU**: STF5N60M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4840
**Stock**: 500+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M2 Series |
| Qualification | - |
| Power Dissipation | 20W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 3.5A |
| Drain Source On State Resistance | 1.3ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:4036312/)

## **STF5N60M2** 

N-channel 600 V, 1.3 Ω typ., 3.5 A MDmesh™ M2 Power MOSFET in a TO-220FP package 

Datasheet - production data 

## **Features** 

**Order code VDS@ TJmax RDS(on) max. ID** STF5N60M2 650 V 1.4 Ω 3.5 A ~~Sn~~ 

- Extremely low gate charge 

- Excellent output capacitance (COSS) profile  100% avalanche tested 

- Zener-protected 

**==> picture [42 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
TO-220FP<br>**----- End of picture text -----**<br>


## **Applications** 

- Switching applications 

**Figure 1: Internal schematic diagram** 

## **Description** 

This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STF5N60M2|5N60M2|TO-220FP|Tube|



_www.st.com_ 

June 2016 

DocID025320 Rev 2 

1/13 

This is information on a product in full production. 

|**Contents**<br>**STF5N60M2**|**Contents**<br>**STF5N60M2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>TO-220FP package information ...................................................... 10|
|**5**|**Revision history ............................................................................ 12**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID_(1)_|Drain current (continuous) at TC= 25 °C|3.5|A|
||Drain current (continuous) at TC= 100 °C|2.2||
|IDM_(2)_|Drain current (pulsed)|14|A|
|PTOT|Total dissipation at TC= 25 °C|20|W|
|VISO|Insulation withstand voltage (RMS) from all three leads to<br>external heat sink (t = 1 s; TC= 25 °C)|2500|V|
|dv/dt_(3)_|Peak diode recovery voltage slope|15|V/ns|
|dv/dt_(4)_|MOSFET dv/dt ruggedness|50||
|Tstg|Storage temperature range|-55 to 150|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

- (1)Limited by package. 

(2) Pulse width limited by safe operating area. 

(3) ISD ≤ 3.5 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD = 400 V. 

(4) VDS ≤ 480 V. 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case max.|6.25|°C/W|
|Rthj-amb|Thermal resistancejunction-ambient max.|62.5|°C/W|



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive<br>(pulse width limited byTjmax)|0.5|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR; VDD= 50 V)|80|mJ|



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**STF5N60M2** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 5: On /off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 600 V|||1|µA|
|||VGS= 0 V, VDS= 600 V,<br>TC= 125 °C_(1)_|||100||
|IGSS|Gate-body leakage<br>current|VDS= 0 V, VGS= ±25 V|||±10|μA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2|3|4|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 1.7 A||1.3|1.4|Ω|



## **Notes:** 

(1) Defined by design, not subject to production test. 

**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|211|-|pF|
|Coss|Output capacitance||-|13|-||
|Crss|Reverse transfer<br>capacitance||-|0.75|-||
|Coss eq._(1)_|Equivalent output<br>capacitance|VDS= 0 to 480 V, VGS= 0 V|-|19.5|-|pF|
|RG|Intrinsicgate resistance|f = 1 MHz open drain|-|6.2|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 3.5 A,<br>VGS= 10 V<br>(see_Figure 15: "Test circuit for_<br>_gate charge behavior"_)|-|8|-|nC|
|Qgs|Gate-source charge||-|1.6|-||
|Qgd|Gate-drain charge||-|4.4|-||



## **Notes:** 

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

**Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on<br>delaytime|VDD= 300 V, ID= 1.7 A RG= 4.7 Ω,<br>VGS= 10 V (see_Figure 14: "Test circuit for_<br>_resistive load switching times"_and_Figure 19:_<br>_"Switching time waveform"_)|-|12|-|ns|
|tr|Rise time||-|3|-||
|td(off)|Turn-off<br>delaytime||-|70|-||
|tf|Fall time||-|15|-||



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**Electrical characteristics** 

|||**Table 8: Source-drain diode**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|ISD|Source-drain current||-||3.5|A|
|ISDM_(1)_|Source-drain current<br>(pulsed)||-||14|A|
|VSD_(2)_|Forward on voltage|VGS= 0 V, ISD= 3.5 A|-||1.6|V|
|trr|Reverse recoverytime|ISD= 3.5 A, di/dt = 100 A/µs,<br>VDD= 60 V (see_Figure 16: "Test_<br>_circuit for inductive load switching_<br>_and diode recovery times"_)|-|220||ns|
|Qrr|Reverse recovery<br>charge||-|1.05||µC|
|IRRM|Reverse recovery<br>current||-|9.5||A|
|trr|Reverse recoverytime|ISD= 3.5 A, di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C (see<br>_Figure 16: "Test circuit for_<br>_inductive load switching and diode_<br>_recovery times"_)|-|314||ns|
|Qrr|Reverse recovery<br>charge||-|1.5||µC|
|IRRM|Reverse recovery<br>current||-|9.5||A|



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5 %. 

DocID025320 Rev 2 

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**STF5N60M2** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [156 x 143] intentionally omitted <==**

**Figure 3: Thermal impedance** 

**==> picture [141 x 143] intentionally omitted <==**

**Figure 4: Output characteristics** 

**==> picture [155 x 144] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [153 x 139] intentionally omitted <==**

**Figure 6: Gate charge vs gate-source voltage** 

**==> picture [161 x 143] intentionally omitted <==**

**Figure 7: Static drain-source on-resistance** 

**==> picture [159 x 142] intentionally omitted <==**

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**Electrical characteristics** 

**Figure 8: Capacitance variations** 

**==> picture [164 x 143] intentionally omitted <==**

**Figure 9: Output capacitance stored energy** 

**==> picture [161 x 143] intentionally omitted <==**

**Figure 10: Normalized gate threshold voltage Figure 11: Normalized on-resistance vs vs temperature temperature** 

**==> picture [163 x 143] intentionally omitted <==**

**==> picture [154 x 142] intentionally omitted <==**

**Figure 12: Normalized V(BR)DSS vs temperature** 

**==> picture [162 x 143] intentionally omitted <==**

**Figure 13: Source- drain diode forward characteristics** 

**==> picture [166 x 140] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 622] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14: Test circuit for resistive load  Figure 15: Test circuit for gate charge<br>switching times  behavior<br>Figure 16: Test circuit for inductive load<br>Figure 17: Unclamped inductive load test<br>switching and diode recovery times<br>circuit<br>Figure 19: Switching time waveform<br>Figure 18: Unclamped inductive waveform<br>DocID025320 Rev 2<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**STF5N60M2** 

**Package information** 

## **4.1 TO-220FP package information** 

**==> picture [161 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20: TO-220FP package outline<br>**----- End of picture text -----**<br>


~~©~~ 10/13 DocID025320 Rev 2 

**STF5N60M2** 

**Package information** 

**Table 9: TO-220FP package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.4||4.6|
|B|2.5||2.7|
|D|2.5||2.75|
|E|0.45||0.7|
|F|0.75||1|
|F1|1.15||1.70|
|F2|1.15||1.70|
|G|4.95||5.2|
|G1|2.4||2.7|
|H|10||10.4|
|L2||16||
|L3|28.6||30.6|
|L4|9.8||10.6|
|L5|2.9||3.6|
|L6|15.9||16.4|
|L7|9||9.3|
|Dia|3||3.2|



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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|30-Sep-2013|1|First release.|
|15-Jun-2016|2|Updated title, features and description in cover page.<br>Updated_Section 1: "Electrical ratings"_and_Section 2: "Electrical_<br>_characteristics"_.<br>Added_Section 2.1: "Electrical characteristics (curves)"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2016 STMicroelectronics – All rights reserved 

DocID025320 Rev 2 

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