# Power MOSFET, Mdmesh DM2, N Channel, 600 V, 28 A, 0.094 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:2531107/)

**URL**: https://novapart.co/products/STF35N60DM2/power-mosfet-mdmesh-dm2-n-channel-600-v-28-a-0094
**SKU**: STF35N60DM2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.4000
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Power Dissipation | 40W |
| Transistor Mounting | Through Hole |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 40W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.094ohm |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 28A |
| Drain Source On State Resistance | 0.094ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2531107/)

## **STF35N60DM2** 

## N-channel 600 V, 0.094 Ω typ., 28 A MDmesh™ DM2 Power MOSFET in a TO-220FP package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STF35N60DM2|600 V|0.110 Ω|28 A|40 W|



- Fast-recovery body diode 

- Extremely low gate charge and input capacitance 

- Low on-resistance 

- 100% avalanche tested 

**==> picture [42 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
TO-220FP<br>**----- End of picture text -----**<br>


- Extremely high dv/dt ruggedness 

- Zener-protected 

**Figure 1: Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. 

## **Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STF35N60DM2|35N60DM2|TO-220FP|Tube|



This is information on a product in full production. 

_www.st.com_ 

September 2015 

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|**Contents**<br>**STF35N60DM2**|**Contents**<br>**STF35N60DM2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>TO-220FP package information ...................................................... 10|
|**5**|**Revision history ............................................................................ 12**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID<br>_(1)_|Drain current (continuous) at Tcase= 25 °C|28|A|
||Drain current (continuous) at Tcase= 100 °C|17||
|IDM<br>_(2)_|Drain current (pulsed)|112|A|
|PTOT|Total dissipation at Tcase= 25 °C|40|W|
|dv/dt_(3)_|Peak diode recoveryvoltage slope|50|V/ns|
|dv/dt_(4)_|MOSFET dv/dt ruggedness|50||
|VISO|Insulation withstand voltage (RMS) from all three leads to external heat<br>sink (t = 1 s; Tc= 25 °C)|2.5|kV|
|Tstg|Storage temperature|-55 to<br>150|°C|
|Tj|Operating junction temperature|||



## **Notes:** 

- (1) Limited by maximum junction temperature. 

(2) Pulse width is limited by safe operating area. 

(3) ISD ≤ 28 A, di/dt=900 A/μs; VDS peak < V(BR)DSS,VDD = 400 V 

- (4) VDS ≤ 480 V. 

## **Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|3.1|°C/W|
|Rthj-amb|Thermal resistancejunction-amb|62.5||



## **Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not repetitive|6|A|
|EAS<br>_(1)_|Singlepulse avalanche energy|650|mJ|



## **Notes:** 

(1) starting Tj = 25 °C, ID = IAR, VDD = 50 V. 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 5: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 600 V|||10|µA|
|||VGS= 0 V, VDS= 600 V,<br>Tcase= 125 °C|||100||
|IGSS|Gate-body leakage<br>current|VDS= 0 V, VGS= ±25 V|||±5|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|3|4|5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 14 A||0.094|0.11|Ω|



**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input<br>capacitance|VDS= 100 V, f = 1 MHz, VGS= 0 V|-|2400|-|pF|
|Coss|Output<br>capacitance||-|110|-||
|Crss|Reverse transfer<br>capacitance||-|2.8|-||
|Coss eq.<br>_(1)_|Equivalent<br>output<br>capacitance|VDS= 0 to 480 V, VGS= 0 V|-|190|-|pF|
|RG|Intrinsic gate<br>resistance|f = 1 MHz, ID= 0 A|-|4.3|-|Ω|
|Qg|Total gate<br>charge|VDD= 480 V, ID= 28 A, VGS= 10 V (see<br>_Figure 15: "Test circuit for gate charge_<br>_behavior"_)|-|54|-|nC|
|Qgs|Gate-source<br>charge||-|14.6|-||
|Qgd|Gate-drain<br>charge||-|24.2|-||



## **Notes:** 

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

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**Electrical characteristics** 

**Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on<br>delaytime|VDD= 300 V, ID= 14 A RG= 4.7 Ω,<br>VGS= 10 V (see_Figure 14: "Test circuit for_<br>_resistive load switching times"_and_Figure 19:_<br>_"Switching time waveform"_)|-|21.2|-|ns|
|tr|Rise time||-|17|-||
|td(off)|Turn-off<br>delaytime||-|68|-||
|tf|Fall time||-|10.7|-||



**Table 8: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain<br>current||-||28|A|
|ISDM<br>_(1)_|Source-drain<br>current<br>(pulsed)||-||112|A|
|VSD<br>_(2)_|Forward on<br>voltage|VGS= 0 V, ISD= 28 A|-||1.6|V|
|trr|Reverse<br>recoverytime|ISD= 28 A, di/dt = 100 A/µs, VDD= 60 V<br>(see_Figure 16: "Test circuit for inductive_<br>_load switching and diode recovery times"_)|-|120||ns|
|Qrr|Reverse<br>recovery<br>charge||-|572||nC|
|IRRM|Reverse<br>recovery<br>current||-|10.2||A|
|trr|Reverse<br>recoverytime|ISD= 28 A, di/dt = 100 A/µs, VDD= 60 V,<br>Tj= 150 °C (see_Figure 16: "Test circuit for_<br>_inductive load switching and diode_<br>_recovery times"_)|-|215||ns|
|Qrr|Reverse<br>recovery<br>charge||-|1.89||µC|
|IRRM|Reverse<br>recovery<br>current||-|17.7||A|



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. 

**Table 9: Gate-source Zener diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)GSO|Gate-source breakdown voltage|IGS= ±250µA, ID= 0 A|±30|-|-|V|



The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**==> picture [390 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>ID GIPG150920151223SA<br>(A)<br>10 2<br>10 1 10µs<br>100µs<br>10 [0] 1ms<br>10ms<br>10 [-1]<br>Tj=150°C<br>Tc=25°C<br>Single pulse<br>10 [-2]<br>10 -1 10 0 10 1 10 2 VDS(V)<br>limited by RDS(on)<br>Operation in this area is<br>**----- End of picture text -----**<br>


**==> picture [386 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 4: Output characteristics  Figure 5: Transfer characteristics<br>**----- End of picture text -----**<br>


**==> picture [409 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6: Gate charge vs gate-source voltage  Figure 7: Static drain-source on-resistance<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [389 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9: Normalized gate threshold voltage<br>Figure 8: Capacitance variations<br>vs temperature<br>**----- End of picture text -----**<br>


**==> picture [398 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs  Figure 11: Normalized V(BR)DSS vs<br>temperature  temperature<br>**----- End of picture text -----**<br>


**==> picture [408 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Source-drain diode forward<br>Figure 12: Output capacitance stored energy<br>characteristics<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 580] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14: Test circuit for resistive load  Figure 15: Test circuit for gate charge<br>switching times  behavior<br>Figure 16: Test circuit for inductive load<br>switching and diode recovery times  Figure 17: Unclamped inductive load test<br>circuit<br>Figure 19: Switching time waveform<br>Figure 18: Unclamped inductive waveform<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**Package information** 

## **4.1 TO-220FP package information** 

**Figure 20: TO-220FP package outline** 

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**Package information** 

**Table 10: TO-220FP package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.4||4.6|
|B|2.5||2.7|
|D|2.5||2.75|
|E|0.45||0.7|
|F|0.75||1|
|F1|1.15||1.70|
|F2|1.15||1.70|
|G|4.95||5.2|
|G1|2.4||2.7|
|H|10||10.4|
|L2||16||
|L3|28.6||30.6|
|L4|9.8||10.6|
|L5|2.9||3.6|
|L6|15.9||16.4|
|L7|9||9.3|
|Dia|3||3.2|



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**Revision history** 

## **5 Revision history** 

**Table 11: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|15-Sep-2015|1|Initial version|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2015 STMicroelectronics – All rights reserved 

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