# Power MOSFET, N Channel, 400 V, 6 A, 0.59 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2729659RL/)

**URL**: https://novapart.co/products/STD9N40M2/power-mosfet-n-channel-400-v-6-a-059-ohm-to-252
**SKU**: STD9N40M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2930
**Stock**: 10+
**Lead Time**: 98 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:6A; Drain Source Voltage Vds:400V; On Resistance Rds(on):0.59ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 60W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 400V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 6A |
| Drain Source On State Resistance | 0.59ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2729659RL/)

**STD9N40M2** 

Datasheet 

N-channel 400 V, 0.59 Ω typ., 6 A MDmesh™ M2 Power MOSFET in a DPAK package 

## **Features** 

**==> picture [55 x 50] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>2 3<br>&.<br>1<br>DPAK<br>**----- End of picture text -----**<br>


|**Order code**|**VDS @ TJmax**|**RDS(on)max.**|**ID**|
|---|---|---|---|
|STD9N40M2|450 V|0.8 Ω|6 A|



- Extremely low gate charge 

- Excellent output capacitance (COSS) profile 

- 100% avalanche tested 

**==> picture [117 x 100] intentionally omitted <==**

**----- Start of picture text -----**<br>
D (2 ,  TAB)<br>G ( 1 )<br>S ( 3 ) AM15572V1<br>**----- End of picture text -----**<br>


- Zener-protected 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. 

## **Product status** ~~ea~~ 

|**Product summary**<br>~~Saas~~|**Product summary**<br>~~Saas~~|
|---|---|
|**Order code**|STD9N40M2|
|**Marking**|9N40M2|
|**Package**|DPAK|
|**Packing**|Tape and reel|



**DS10114** - **Rev 3** - **August 2018** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STD9N40M2 Electrical ratings** 

**1** 

## **Electrical ratings** 

**Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|400|V|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|6|A|
|ID|Drain current (continuous) at TC= 100 °C|3.8|A|
|IDM (1)|Drain current (pulsed)|24|A|
|PTOT|Total dissipation at TC= 25 °C|60|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|dv/dt(3)|MOSFET dv/dt ruggedness|50|V/ns|
|Tj|Operating junction temperature range|-55 to 150|°C|
|Tstg|Storage temperature range|||



_1. Pulse width limited by safe operating area._ 

_2. ISD ≤ 6 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD = 320 V._ 

_3. VDS ≤ 320 V._ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|2.08|°C/W|
|Rthj-pcb(1)|Thermal resistance junction-pcb|50|°C/W|



_1. When mounted on 1 inch² FR-4, 2 Oz copper board._ 

**Table 3. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not-repetitive<br>(pulse width limited by Tjmax)|2.5|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25 °C, ID= IAR, VDD= 50 V)|148|mJ|



**DS10114** - **Rev 3** 

**page 2/18** 

**STD9N40M2 Electrical characteristics** 

**2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 4. On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|ID= 1 mA, VGS= 0 V|400|||V|
|IDSS|Zero gate voltage drain<br>current|VDS= 400 V, VGS= 0 V|||1|µA|
|||VDS= 400 V, VGS= 0 V, TC= 125 °C<br>(1)|||100|µA|
|IGSS|Gate body leakage current|VDS= 0 V, VGS= ±25 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2|3|4|V|
|RDS(on)|Static drain-source on<br>resistance|VGS= 10 V, ID= 3 A||0.59|0.8|Ω|



_1. Defined by design, not subject to production test._ 

**Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz, VGS= 0 V|-|270|-|pF|
|Coss|Output capacitance|||22|||
|Crss|Reverse transfer capacitance|||0.7|||
|Coss eq.(1)|Equivalent output<br>capacitance|VGS= 0 V, VDS= 0 to 320 V|-|94|-|pF|
|Rg|Gate input resistance|f = 1 MHz open drain|-|7.1|-|Ω|
|Qg|Total gate charge|VDD= 320 V, ID= 6 A,<br>VGS= 0 to 10 V(seeFigure 14. Test<br>circuit for gate charge behavior)|-|8.8|-|nC|
|Qgs|Gate-source charge|||1.7|||
|Qgd|Gate-drain charge|||4.8|||



_1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS._ 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 200 V, ID= 3 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(seeFigure 13. Test circuit for<br>resistive load switching timesand<br>Figure 18. Switching time waveform)|-|10.5|-|ns|
|tr|Rise time|||9|||
|td(off)|Turn-off delay time|||7.5|||
|tf|Fall time|||21|||



**DS10114** - **Rev 3** 

**page 3/18** 

**STD9N40M2 Electrical characteristics** 

## **Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||6|A|
|ISDM (1)|Source-drain current (pulsed)||||24||
|VSD (2)|Forward on voltage|ISD= 6 A, VGS= 0 V|-||1.6|V|
|trr|Reverse recovery time|ISD= 6 A, di/dt = 100 A/µs<br>VDD= 60 V (seeFigure 15. Test<br>circuit for inductive load switching and<br>diode recovery times)|-|208||ns|
|Qrr|Reverse recovery charge|||1.2||μC|
|IRRM|Reverse recovery current|||11.5||A|
|trr|Reverse recovery time|ISD= 6 A, di/dt = 100 A/µs<br>VDD= 60 V, Tj= 150 °C (seeFigure<br>15. Test circuit for inductive load<br>switching and diode recovery times)|-|264||ns|
|Qrr|Reverse recovery charge|||1.6||μC|
|IRRM|Reverse recovery current|||12.5||A|



_1. Pulse width limited by safe operating area._ 

_2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%._ 

**DS10114** - **Rev 3** 

**page 4/18** 

**STD9N40M2 Electrical characteristics curves** 

## **2.1 Electrical characteristics curves** 

**Figure 2. Thermal impedance** 

**Figure 1. Safe operating area** 

**==> picture [167 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID GIPG050620141120SA<br>(A)<br>10 10µs<br>100µs<br>1<br>1ms<br>Tj=150°C 10ms<br>Tc=25 ° C<br>Single pulse<br>0.1<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 3. Output characterisics** 

**==> picture [166 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
GIPG050620141141SA<br>ID(A)<br>VGS=8, 9, 10V<br>7V<br>10<br>6V<br>8<br>6 5V<br>4<br>2<br>4V<br>0<br>0 4 8 12 16 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 5. Gate charge vs gate-source voltage** 

**==> picture [163 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS GIPG050620141149SAVDS<br>(V) (V)<br>12 VDS VDDID=320V=6A 300<br>10 250<br>8 200<br>6 150<br>4 100<br>2 50<br>0 0<br>0 2 4 6 8 Qg(nC)<br>**----- End of picture text -----**<br>


**==> picture [155 x 157] intentionally omitted <==**

**Figure 4. Transfer characteristics** 

**==> picture [159 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
GIPG050620141144SA<br>ID<br>(A)<br>VDS=14V<br>10<br>8<br>6<br>4<br>2<br>0<br>0 2 4 6 8 10 VGS(V)<br>**----- End of picture text -----**<br>


**Figure 6. Static drain-source on-resistance** 

**==> picture [170 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) GIPG050620141203SA<br>(Ω)<br>VGS=10V<br>0.62<br>0.61<br>0.60<br>0.59<br>0.58<br>0.57<br>1 2 3 4 5 ID(A)<br>**----- End of picture text -----**<br>


**DS10114** - **Rev 3** 

**page 5/18** 

**STD9N40M2 Electrical characteristics curves** 

**Figure 7. Capacitance variations** 

**==> picture [166 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
C GIPG050620141211SA<br>(pF)<br>1000<br>Ciss<br>100<br>Coss<br>10<br>1<br>Crss<br>0.1<br>0.1 1 10 100 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 9. Normalized gate threshold voltage vs temperature** 

**==> picture [167 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) GIPG090620140915SA<br>(norm)<br>ID=250µA<br>1.1<br>1.0<br>0.9<br>0.8<br>0.7<br>0.6<br>-75 -25 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 11. Normalized V(BR)DSS vs temperature** 

**==> picture [174 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS GIPG090620141002SA<br>(norm)<br>ID=1mA<br>1.08<br>1.04<br>1.00<br>0.96<br>0.92<br>0.88<br>-75 -25 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 8. Output capacitance stored energy** 

**==> picture [162 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
Eoss GIPG090620140910SA<br>(µJ)<br>1.2<br>0.8<br>0.4<br>0<br>0 100 200 300 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10.  Normalized on-resistance vs temperature** 

**==> picture [171 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) GIPG090620140921SA<br>(norm)<br>VGS=10V<br>2.2<br>1.8<br>1.4<br>1<br>0.6<br>0.2<br>-75 -25 25 75 125 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

**==> picture [168 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
GIPG090620141010SA<br>VSD(V)<br>TJ=-50°C<br>1<br>0.9 TJ=25°C<br>0.8<br>0.7 TJ=150°C<br>0.6<br>0.5<br>1 2 3 4 5 ISD(A)<br>**----- End of picture text -----**<br>


**DS10114** - **Rev 3** 

**page 6/18** 

**STD9N40M2 Test circuits** 

**3 Test circuits** 

**==> picture [513 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width 2200 + 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 184] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Test circuit for inductive load switching and<br>Figure 16. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Switching time waveform<br>Figure 17. Unclamped inductive waveform<br>ton toff<br>V(BR)DSS<br>td(on) tr td(off) tf<br>VD<br>90% 90%<br>IDM<br>ID 0 10% VDS 10%<br>VDD VDD VGS 90%<br>AM01472v1 0 10%<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS10114** - **Rev 3** 

**page 7/18** 

**STD9N40M2 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

**DS10114** - **Rev 3** 

**page 8/18** 

**STD9N40M2 DPAK (TO-252) type A package information** 

## **4.1 DPAK (TO-252) type A package information** 

**Figure 19. DPAK (TO-252) type A package outline** 

**==> picture [34 x 40] intentionally omitted <==**

**==> picture [57 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_A_25<br>**----- End of picture text -----**<br>


**DS10114** - **Rev 3** 

**page 9/18** 

**STD9N40M2 DPAK (TO-252) type A package information** 

**Table 8. DPAK (TO-252) type A mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|4.60|4.70|4.80|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|(L1)|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS10114** - **Rev 3** 

**page 10/18** 

**STD9N40M2 DPAK (TO-252) type C package information** 

## **4.2 DPAK (TO-252) type C package information** 

**Figure 20. DPAK (TO-252) type C package outline** 

**==> picture [36 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_C_25<br>**----- End of picture text -----**<br>


**DS10114** - **Rev 3** 

**page 11/18** 

**STD9N40M2 DPAK (TO-252) type C package information** 

**Table 9. DPAK (TO-252) type C mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20|2.30|2.38|
|A1|0.90|1.01|1.10|
|A2|0.00||0.10|
|b|0.72||0.85|
|b4|5.13|5.33|5.46|
|c|0.47||0.60|
|c2|0.47||0.60|
|D|6.00|6.10|6.20|
|D1|5.25|||
|E|6.50|6.60|6.70|
|E1|4.70|||
|e|2.186|2.286|2.386|
|H|9.80|10.10|10.40|
|L|1.40|1.50|1.70|
|L1|2.90 REF|||
|L2|0.90||1.25|
|L3|0.51 BSC|||
|L4|0.60|0.80|1.00|
|L6|1.80 BSC|||
|θ1|5°|7°|9°|
|θ2|5°|7°|9°|
|V2|0°||8°|



**DS10114** - **Rev 3** 

**page 12/18** 

**STD9N40M2 DPAK (TO-252) type C package information** 

**Figure 21. DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [102 x 181] intentionally omitted <==**

FP_0068772_25_C 

**DS10114** - **Rev 3** 

**page 13/18** 

**STD9N40M2 DPAK (TO-252) packing information** ~~To~~ 

## **4.3** 

## **DPAK (TO-252) packing information** 

## **Figure 22. DPAK (TO-252) tape outline** 

**==> picture [398 x 316] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>B1 J) K0 B0 paeg e s W<br>I<br>f f  PEREllos oe oes:<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>User direction of feed<br>R<br>—— Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


**DS10114** - **Rev 3** 

**page 14/18** 

**STD9N40M2 DPAK (TO-252) packing information** 

**Figure 23. DPAK (TO-252) reel outline** 

**==> picture [363 x 208] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D<br>C<br>N<br>A<br>Tape slot  G measured<br>in core for  at hub<br>Full radius  tape start<br>2.5mm min.width<br>**----- End of picture text -----**<br>


AM06038v1 

**Table 10. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



**DS10114** - **Rev 3** 

**page 15/18** 

**STD9N40M2** 

## **Revision history** 

**Table 11. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|09-Jan-2014|1|First release.|
|18-Jun-2014|2|– Modified: title<br>– Modified: values in_Table 4_<br>– Modified: RDS(on)and IDSS(test conditions) in_Table 5_<br>– Modified: the entire typical values in_Table 6_,_7_and_8_<br>– Added:_Table 8_<br>– Added:_Section 2.1: Electrical characteristics (curves)_<br>– Updated:_Section 4: Package mechanical data_<br>– Minor text changes|
|20-Aug-2018|3|The document status is production data.<br>AddedSection 4.2 DPAK (TO-252) type C package information.<br>Minor text changes.|



**DS10114** - **Rev 3** 

**page 16/18** 

**STD9N40M2 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**||
||**2.1**|Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test**|**circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**||
||**4.1**|DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
||**4.2**|DPAK (TO-252) type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10|
||**4.3**|DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13|
|**Revision**||**history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16**|



**DS10114** - **Rev 3** 

**page 17/18** 

**STD9N40M2** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2018 STMicroelectronics – All rights reserved 

**DS10114** - **Rev 3** 

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## Links

- [View this product on Novapart](https://novapart.co/products/STD9N40M2/power-mosfet-n-channel-400-v-6-a-059-ohm-to-252)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/std9n40m2/power-mosfet-n-channel-6a-to-252/dp/2729659RL)
---

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> [Request a quote](https://novapart.co/quote/) — it's free and there's no
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