# Power MOSFET, N Channel, 100 V, 70 A, 8500 µohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3129813/)

**URL**: https://novapart.co/products/STD85N10F7AG/power-mosfet-n-channel-100-v-70-a-8500-ohm-to-252
**SKU**: STD85N10F7AG
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.6460
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:70A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.0085ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vg

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | STripFET F7 |
| Qualification | AEC-Q101 |
| Power Dissipation | 85W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 70A |
| Drain Source On State Resistance | 8500µohm |
| Gate Source Threshold Voltage Max | 3.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3129813/)

## **STD85N10F7AG** 

Automotive-grade N-channel 100 V, 0.0085 Ω typ., 70 A STripFET™ F7 Power MOSFET in a DPAK package 

**Datasheet** - **production data** 

## **Features** 

**==> picture [62 x 57] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>3<br>1<br>DPAK<br>**----- End of picture text -----**<br>


|**Features**|||||
|---|---|---|---|---|
|**Order code**|**VDS**|**RDS(on)**<br>**max**|**ID**|**PTOT**|
|STD85N10F7AG|100 V|0.010Ω|70 A|85 W|



- Designed for automotive applications and AEC-Q101 qualified 

- Among the lowest RDS(on) on the market 

- Excellent figure of merit (FoM) 

- Low Crss/Ciss ratio for EMI immunity 

- High avalanche ruggedness 

## **Applications** 

## **Figure 1. Internal schematic diagram** 

- Switching applications 

## **Description** 

This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STD85N10F7AG|85N10F7|DPAK|Tape and reel|



_www.st.com_ 

May 2015 

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This is information on a product in full production. 

**Contents** 

**STD85N10F7AG** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
||4.1<br>DPAK (TO-252) type A2 package information  . . . . . . . . . . . . . . . . . . . . . 10|
||4.2<br>Packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13|
|**5**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

||**Table 2. Absolute maximum ratings**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VDS|Drain-source voltage|100|V|
|VGS|Gate-source voltage|± 20|V|
|ID|Drain current (continuous) at TC= 25 °C|70|A|
||Drain current (continuous) at TC= 100 °C|48||
|IDM<br>(1)|Drain current (pulsed)|280|A|
|PTOT|Total dissipation at TC= 25 °C|85|W|
|Tstg|Storage temperature|- 55 to 175|°C|
|Tj|Max. operating junction temperature|||



1. Pulse width limited by safe operating area. 

**Table 3. Thermal data** 

||**Table 3. Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-pcb|Thermal resistance junction-pcb max|50|°C/W|
|Rthj-case|Thermal resistance junction-case max|1.76||



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 4. Static** 

|||**Table 4. Static**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 250µA, VGS= 0|100|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 100 V|||1|µA|
|||VDS= 100 V, TC=125 °C|||100||
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= 20 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2.5|3.5|4.5|V|
|RDS(on)|Static drain-source<br>on-resistance|ID= 40 A, VGS=10 V||0.0085|0.010|Ω|



**Table 5. Dynamic** 

|||**Table 5. Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 50 V, f = 1 MHz,<br>VGS= 0|-|3100|-|pF|
|Coss|Output capacitance||-|700|-||
|Crss|Reverse transfer<br>capacitance||-|45|-||
|Qg|Total gate charge|VDD= 50 V, ID= 70 A,<br>VGS= 10 V<br>(see_Figure 14_)|-|45|-|nC|
|Qgs|Gate-source charge||-|18|-||
|Qgd|Gate-drain charge||-|13|-||



**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 50 V, ID= 40 A,<br>RG= 4.7Ω,VGS= 10 V<br>(see_Figure 15_and_Figure 18_)|-|19|-|ns|
|tr|Rise time||-|32|-||
|td(off)|Turn-off delay time||-|36|-||
|tf|Fall time||-|13|-||



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**Electrical characteristics** 

**Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||70|A|
|ISDM (1)|Source-drain current (pulsed)||-||280|A|
|VSD (2)|Forward on voltage|ISD= 70 A, VGS= 0|-||1.1|V|
|trr|Reverse recovery time|ISD= 70 A, di/dt = 100 A/µs<br>VDD= 80 V, Tj=150 °C<br>(see_Figure 18_)|-|70||ns|
|Qrr|Reverse recovery charge||-|125||nC|
|IRRM|Reverse recovery current||-|3.6||A|



1. Pulse width limited by safe operating area. 

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

## **Figure 2. Safe operating area** 

## **Figure 3. Thermal impedance** 

**==> picture [462 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
GIPD220720131539FSR AM18025v1<br>ID K<br>(A) δ=0.5<br>100 0.2<br>0.1<br>100µs 0 .05<br>10 10 [-1] 0.02<br>0.01 c<br>1 Tj=175°C 1ms<br>Tc=25°C Single pulse<br>10ms<br>Sinlge<br>pulse<br>0.1 10 [-2]<br>0.1 1 10 VDS(V) 10 [-5] 10-4 10 [-3] 10 [-2] 10 [-1] 10 [0] tp(s)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4. Output characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15971v1<br>ID(A)<br>VGS=10 V<br>300<br>9V<br>250<br>8V<br>200<br>7V<br>150<br>100 6V<br>50<br>5V<br>0<br>0 2 4 6 8 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 5. Transfer characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM15972v1<br>ID (A)<br>300 V DS =9V<br>250<br>200<br>150<br>100<br>50<br>0<br>2 4 6 8 10 VGS(V)<br>**----- End of picture text -----**<br>


**Figure 6. Static drain-source on-resistance** 

**Figure 7. Gate charge vs gate-source voltage** 

**==> picture [462 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) AM18070v1 VGS AM15974v1<br>(mΩ) VGS=10V (V)<br>VDD=50V<br>12 ID=70A<br>9.1<br>8.9 10<br>8.7<br>8<br>8.5<br>6<br>8.3<br>8.1 4<br>7.9<br>2<br>7.7<br>7.5 0<br>0 20 40 60 80 ID(A) 0 10 20 30 40 50 Qg(nC)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 8. Capacitance variations** 

**Figure 9. Normalized gate threshold voltage vs temperature** 

**==> picture [462 x 178] intentionally omitted <==**

**----- Start of picture text -----**<br>
C AM15975v1 VGS(th) AM15976v1<br>(pF) (norm)<br>3500 1.2 ID=250µA<br>3000 Ciss<br>1<br>2500<br>0.8<br>2000<br>0.6<br>1500<br>0.4<br>1000<br>0.2<br>500<br>Coss<br>0 Crss 0<br>0 20 40 60 80 VDS(V) -55 -30 -5 20 45 70 95 120 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized on-resistance vs temperature** 

**Figure 11. Source-drain diode forward characteristics** 

**==> picture [462 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) AM15977v1 VSD AM15978v1<br>(norm) (V)<br>ID=40A<br>1.1<br>2 VGS=10V TJ=-55°C<br>1<br>1.5<br>0.9<br>0.8 TJ=25°C<br>1<br>0.7<br>TJ=150°C<br>0.5<br>0.6<br>0 0.5<br>-55 -30 -5 20 45 70 95 120 TJ(°C) 0 20 40 60 80 ISD(A)<br>**----- End of picture text -----**<br>


**Figure 12. Normalized VDS vs temperature** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS AM15979v1<br>(norm)<br>ID=1mA<br>1.04<br>1.03<br>1.02<br>1.01<br>1<br>0.99<br>0.98<br>0.97<br>0.96<br>-55 -30 -5 20 45 70 95 120 TJ(°C)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 13. Switching times test circuit for resistive load** 

**Figure 14. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 346] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform<br>V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**Package information** 

## **4.1 DPAK (TO-252) type A2 package information** 

**==> picture [238 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 19. DPAK (TO-252) type A2 package outline<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 8. DPAK (TO-252) type A2 mechanical data** 

||**Table 8. DPAK(TO-252) type A2 mechanical data**|**Table 8. DPAK(TO-252) type A2 mechanical data**|**Table 8. DPAK(TO-252) type A2 mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.16|2.28|2.40|
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



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**Package information** 

## **Figure 20. DPAK (TO-252) recommended footprint[(a)]** 

**==> picture [405 x 350] intentionally omitted <==**

**----- Start of picture text -----**<br>
��������������<br>**----- End of picture text -----**<br>


- a. All dimensions are in millimeters 

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**Package information** 

## **4.2 Packing information** 

## **Figure 21. Tape outline** 

**==> picture [399 x 316] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>K0 W<br>B1 B0<br>A) | Tl IRIE Co<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>S$ User direction of feed ><br>R<br>ol eh tal alfalta<br>|» Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


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**Package information** 

## **Figure 22. Reel outline** 

**==> picture [405 x 256] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>REEL DIMENSIONS<br>40mm min.<br>Access hole<br>At slot location<br>B<br>D<br>C<br>N<br>A<br>Full radius Tape slot  G measured at hub<br>in core for<br>tape start 25 mm min.<br>width<br>AM08851v2<br>**----- End of picture text -----**<br>


**Table 9. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1||Base qty.|2500|
|P1|7.9|8.1||Bulk qty.|2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



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**Revision history** 

## **5 Revision history** 

**Table 10. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|21-Oct-2014|1|First release.|
|26-May-2015|2|Text and formatting edits throughout document.<br>Promoted document from “preliminary data” to “production data”<br>Updated device package information.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

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## Links

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- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/std85n10f7ag/mosfet-aecq101-n-ch-100v-70a-to/dp/3129813)
---

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