# Power MOSFET, N Channel, 30 V, 80 A, 4000 µohm, TO-252 (DPAK), Surface Mount
**URL**: https://novapart.co/products/STD80N3LL/power-mosfet-n-channel-30-v-80-a-4000-ohm-to-252
**SKU**: STD80N3LL
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2960
**Stock**: 1000+
**Lead Time**: 2 days (indicative)
## Specifications
| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 75W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 80A |
| Drain Source On State Resistance | 4000µohm |
| Gate Source Threshold Voltage Max | 2.5V |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:4036303RL/)
## **STD80N3LL**
## N-channel 30 V, 4 mΩ typ., 80 A Power MOSFET in a DPAK package
Datasheet - production data
## **Features**
|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STD80N3LL|30 V|5.2 mΩ|80 A|75 W|
- Very low on-resistance
- Very low gate charge
- High avalanche ruggedness
- Low gate drive power loss
**Figure 1: Internal schematic diagram**
## **Applications**
- Switching applications
**==> picture [473 x 197] intentionally omitted <==**
**----- Start of picture text -----**
D(2, TAB)
Description
This device is an N-channel Power MOSFET with
very low RDS(on) in all packages.
G(1)
S(3)
AM01475v1_Tab
Table 1: Device summary
Order code Marking Package Packaging
a STD80N3LL 80N3LL DPAK Tape and reel
**----- End of picture text -----**
This is information on a product in full production.
_www.st.com_
December 2016
DocID029591 Rev 2
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|**Contents**
**STD80N3LL**|**Contents**
**STD80N3LL**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1
Electrical characteristics (curves) ...................................................... 5|
|**3**|**Test circuits ..................................................................................... 7**|
|**4**|**Package information ....................................................................... 8**|
||4.1
DPAK package information ............................................................... 9|
||4.2
DPAK (TO-252) packing information ............................................... 12|
|**5**|**Revision history ............................................................................ 14**|
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**Electrical ratings**
## **1 Electrical ratings**
**Table 2: Absolute maximum ratings**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|30|V|
|VGS|Gate-source voltage|±20|V|
|ID_(1)_|Drain current (continuous) at TC= 25 °C|80|A|
|ID_(1)_|Drain current (continuous) at TC= 100 °C|60|A|
|IDM_(1)(2)_|Drain current (pulsed)|320|A|
|PTOT_(1)_|Total dissipation at TC= 25 °C|75|W|
|Tj|Operating junction temperature range|-55 to 175|°C|
|Tstg|Storage temperature range|||
## **Notes:**
- (1)This value is limited by package
- (2)Pulse width limited by safe operating area
**Table 3: Thermal data**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-pcb_(1)_|Thermal resistancejunction-pcb max.|50|°C/W|
|Rthj-case|Thermal resistancejunction-case max.|2|°C/W|
## **Notes:**
- (1)When mounted on FR-4 board of 1 inch², 2oz Cu
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**STD80N3LL**
**Electrical characteristics**
## **2 Electrical characteristics**
(TC = 25 °C unless otherwise specified)
**Table 4: On/off states**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|ID= 1 mA, VGS= 0 V|30|||V|
|IDSS|Zero gate voltage
drain current|VGS= 0 V
VDS= 30 V|||1|µA|
|IGSS|Gate-body leakage
current|VGS= 20 V, VDS= 0 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 μA|1||2.5|V|
|RDS(on)|Static drain-source
on-resistance|VGS= 10 V, ID= 40 A||4|5.2|mΩ|
|||VGS= 4.5 V, ID= 40 A||5.5|6.5|mΩ|
**Table 5: Dynamic**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz,
VGS= 0 V|-|1640|-|pF|
|Coss|Output capacitance||-|207|-||
|Crss|Reverse transfer capacitance||-|160|-||
|Qg|Totalgate charge|VDD= 15 V, ID= 80 A,
VGS= 4.5 V (see_Figure_
_14: "Test circuit for gate_
_charge behavior"_)|-|18|-|nC|
|Qgs|Gate-source charge||-|5.3|-||
|Qgd|Gate-drain charge||-|8.8|-||
**Table 6: Switching times**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 15 V, ID= 40 A,
RG= 4.7 Ω, VGS= 10 V
(see_Figure 13: "Test_
_circuit for resistive load_
_switching times"_)|-|6.4|-|ns|
|tr|Rise time||-|8|-|ns|
|td(off)|Turn-off delay time||-|36|-|ns|
|tf|Fall time||-|12|-|ns|
## **Table 7: Source-drain diode**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD_(1)_|Forward on voltage|ISD= 80 A, VGS= 0 V|-||1.2|V|
|trr|Reverse recoverytime|ID= 80 A, di/dt = 100 A/µs
VDD= 24 V (see_Figure 15:_
_"Test circuit for inductive_
_load switching and diode_
_recovery times"_)|-|21||ns|
|Qrr|Reverse recovery charge||-|14||nC|
|IRRM|Reverse recovery current||-|1.3||A|
## **Notes:**
(1)Pulsed: pulse duration = 300 µs, duty cycle 1.5%
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**Electrical characteristics**
## **2.1 Electrical characteristics (curves)**
**Figure 2: Safe operating area**
**==> picture [195 x 163] intentionally omitted <==**
**==> picture [128 x 10] intentionally omitted <==**
**----- Start of picture text -----**
Figure 3: Thermal impedance
**----- End of picture text -----**
**==> picture [170 x 164] intentionally omitted <==**
**Figure 4: Output characteristics**
**==> picture [179 x 164] intentionally omitted <==**
**Figure 5: Transfer characteristics**
**==> picture [183 x 163] intentionally omitted <==**
**Figure 6: Gate charge vs gate-source voltage**
**==> picture [183 x 163] intentionally omitted <==**
**Figure 7: Static drain-source on-resistance**
**==> picture [184 x 164] intentionally omitted <==**
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## **Electrical characteristics**
**==> picture [438 x 200] intentionally omitted <==**
**----- Start of picture text -----**
Figure 9: Normalized gate threshold voltage vs
Figure 8: Capacitance variations
temperature
**----- End of picture text -----**
**Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature**
**==> picture [189 x 163] intentionally omitted <==**
**==> picture [193 x 163] intentionally omitted <==**
**Figure 12: Source-drain diode forward characteristics**
**==> picture [181 x 166] intentionally omitted <==**
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**Test circuits**
## **3 Test circuits**
**==> picture [416 x 578] intentionally omitted <==**
**----- Start of picture text -----**
Figure 13: Test circuit for resistive load Figure 14: Test circuit for gate charge
switching times behavior
Figure 15: Test circuit for inductive load
Figure 16: Unclamped inductive load test
switching and diode recovery times circuit
Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform
**----- End of picture text -----**
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**Package information**
## **4 Package information**
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark.
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**Package information**
## **4.1 DPAK package information**
**==> picture [219 x 9] intentionally omitted <==**
**----- Start of picture text -----**
Figure 19: DPAK (TO-252) type A2 package outline
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**==> picture [406 x 561] intentionally omitted <==**
**----- Start of picture text -----**
0068772_type-A2_rev21
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**Package information**
**Table 8: DPAK (TO-252) type A2 mechanical data**
|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.16|2.28|2.40|
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|
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**Package information**
**Figure 20: DPAK (TO-252) type A2 recommended footprint (dimensions are in mm)**
**==> picture [407 x 273] intentionally omitted <==**
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**Package information**
## **4.2 DPAK (TO-252) packing information**
**Figure 21: DPAK (TO-252) tape outline**
~~©~~ 12/15 DocID029591 Rev 2
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**Package information**
**Figure 22: DPAK (TO-252) reel outline**
**Table 9: DPAK (TO-252) tape and reel mechanical data**
|**Tape**|**Tape**|**Tape**|**Reel**|**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Baseqty.||2500|
|P1|7.9|8.1|Bulkqty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||
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**Revision history**
## **5 Revision history**
**Table 10: Document revision history**
|**Date**|**Revision**|**Changes**|
|---|---|---|
|26-Jul-2016|1|First release.|
|06-Dec-2016|2|Document status promoted from preliminary to production data.
Updated_Section 2: "Electrical characteristics"_and added_Section_
_2.1: "Electrical characteristics (curves)"_.
Minor text changes.|
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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY**
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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## Links
- [View this product on Novapart](https://novapart.co/products/STD80N3LL/power-mosfet-n-channel-30-v-80-a-4000-ohm-to-252)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/std80n3ll/mosfet-n-ch-30v-80a-to-252/dp/4036303RL)
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