# Power MOSFET, N Channel, 55 V, 32 A, 6.5 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:1752050/)

**URL**: https://novapart.co/products/STD65N55F3/power-mosfet-n-channel-55-v-32-a-65-ohm-to-252
**SKU**: STD65N55F3
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.8870
**Stock**: 500+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:32A; Drain Source Voltage Vds:55V; On Resistance Rds(on):6.5ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power Diss

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | AEC-Q101 |
| Power Dissipation | 110W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 55V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 32A |
| Drain Source On State Resistance | 6.5ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1752050/)

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## **STD65N55F3** N-channel 55V - 6.5mΩ - 80A - DPAK STripFET™ Power MOSFET 

## **Features** 

|**Type**|**VDSS**|**RDS(on)**|**ID**|**Pw**|
|---|---|---|---|---|
|STD65N55F3|55V|<8.5mΩ|80A|110W|



- Standard threshold drive 

- 100% avalanche tested 

## **Description** 

This n-channel enhancement mode Power MOSFET is the latest refinement of STMicroelectronics' unique “Single Feature Size™“ strip-based process, which has decreased the critical alignment steps, offering remarkable manufacturing reproducibility. The outcome is a transistor with extremely high packing density for low onresistance, rugged avalanche characteristics and low gate charge. 

## **Applications** 

- Switching application 

   - Automotive 

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3<br>1<br>DPAK<br>**----- End of picture text -----**<br>


## **Internal schematic diagram** 

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## **Order code** 

|**Part number**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STD65N55F3|65N55F3|DPAK|Tape & reel|



1/13 

May 2007 

Rev 3 

_www.st.com_ 

**Contents** 

**STD65N55F3** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)       . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuit   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Packaging mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12**|



2/13 

**STD65N55F3** 

**Electrical ratings** 

## **1 Electrical ratings** 

## **Table 1. Absolute maximum ratings** 

|**Table 1.**|**Absolute maximum ratings**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VDS|Drain-source voltage (VGS=0)|55|V|
|VGS|Gate-Source voltage|± 20|V|
|ID|Drain current (continuous) at TC= 25°C|80|A|
|ID|Drain current (continuous) at TC= 100°C|56|A|
|IDM<br>(1)|Drain current (pulsed)|320|A|
|PTOT|Total dissipation at TC= 25°C|110|W|
||Derating factor|0.73|W/°C|
|dv/dt(2)|Peak diode recovery voltage slope|11|V/ns|
|EAS<br>(3)|Single pulse avalanche energy|390|mJ|
|Tj<br>Tstg|Operating junction temperature<br>Storage temperature|-55 to 175|°C|



1. Pulse width limited by safe operating area 

2. ISD ≤ 65A, di/dt ≤ 300A/µs, VDD < V(BR)DSS. Tj < Tjmax 

3. Starting Tj = 25°C, Id = 32A, Vdd = 25V 

|**Table 2.**<br>**Thermal resistance**|**Table 2.**<br>**Thermal resistance**|**Table 2.**<br>**Thermal resistance**|**Table 2.**<br>**Thermal resistance**|
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-case|Thermal resistance junction-case max|1.36|°C/W|
|Rthj-pcb(1)|Thermal resistance junction-pcb max|50|°C/W|



1. When mounted on FR-4 board of 1inch², 2oz Cu. 

3/13 

**STD65N55F3** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TCASE=25°C unless otherwise specified) 

## **Table 3. Static** 

|**Table 3.**|**Static**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source breakdown<br>Voltage|ID= 250µA, VGS= 0|55|||V|
|IDSS|Zero gate voltage drain<br>current (VGS= 0)|VDS= Max rating,<br>VDS= Max rating,Tc = 125°C|||10<br>100|µA<br>µA|
|IGSS|Gate body leakage current<br>(VDS= 0)|VGS= ±20V|||±200|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2||4|V|
|RDS(on)|Static drain-source on<br>resistance|VGS= 10V, ID= 32A||6.5|8.5|mΩ|



## **Table 4. Dynamic** 

|**Table 4.**|**Dynamic**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min**|**Typ.**|**Max.**|**Unit**|
|gfs<br>(1)|Forward transconductance|VDS=25V,   ID=32A||50||S|
|Ciss<br>Coss<br>Crss|Input capacitance<br>Output capacitance<br>Reverse transfer capacitance|VDS=25V, f=1MHz, VGS=0||2200<br>500<br>25||pF<br>pF<br>pF|
|Qg<br>Qgs<br>Qgd|Total gate charge<br>Gate-source charge<br>Gate-drain charge|VDD=27V, ID= 65A<br>VGS=10V<br>_(see Figure 15)_||33.5<br>12.5<br>9.5|45|nC<br>nC<br>nC|



1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 

4/13 

**STD65N55F3** 

**Electrical characteristics** 

## **Table 5. Switching on/off (inductive load)** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)<br>tr|Turn-on delay time<br>Rise time|VDD=27V, ID= 32A,<br>RG=4.7Ω,VGS=10V<br>_(see Figure 14)_||20<br>50||ns<br>ns|
|td(off)<br>tf|Turn-off delay time<br>Fall time|VDD=27V, ID= 32A,<br>RG=4.7Ω,VGS=10V<br>_(see Figure 14)_||35<br>11.5||ns<br>ns|



## **Table 6. Source drain diode** 

|**Table 6.**|**Source drain diode**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|ISD<br>ISDM|Source-drain current<br>Source-drain current (pulsed)(1)||||80<br>320|A<br>A|
|VSD|Forward on voltage|ISD=65A, VGS=0|||1.5|V|
|trr<br>Qrr<br>IRRM|Reverse recovery time<br>Reverse recovery charge<br>Reverse recovery current|ISD=65A, di/dt =100A/µs,<br>VDD=25V, Tj=150°C<br>_(see Figure 16)_||47<br>87<br>3.7||ns<br>nC<br>A|



1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 

5/13 

**STD65N55F3** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 1. Safe operating area** 

**Figure 2. Thermal impedance** 

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**Figure 3. Output characteristics** 

**Figure 4. Transfer characteristics** 

**==> picture [181 x 169] intentionally omitted <==**

**==> picture [174 x 169] intentionally omitted <==**

**Figure 5. Normalized BVDSS vs temperature** 

**Figure 6. Static drain-source on resistance** 

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6/13 

**STD65N55F3** 

**Electrical characteristics** 

## **Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations** 

**==> picture [195 x 169] intentionally omitted <==**

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**Figure 9. Normalized gate threshold voltage vs temperature** 

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**Figure 10. Normalized on resistance vs temperature** 

**==> picture [183 x 169] intentionally omitted <==**

## **Figure 11. Source-drain diode forward characteristics** 

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7/13 

**STD65N55F3** 

**Test circuit** 

## **3 Test circuit** 

**Figure 12. Unclamped inductive load test Figure 13. Unclamped inductive waveform circuit** 

**==> picture [215 x 143] intentionally omitted <==**

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**Figure 14. Switching times test circuit for resistive load** 

**Figure 15. Gate charge test circuit** 

**==> picture [445 x 141] intentionally omitted <==**

**Figure 16. Test circuit for inductive load Figure 17. Switching time waveform switching and diode recovery times** 

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8/13 

**STD65N55F3** 

**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: _www.st.com_ 

9/13 

**STD65N55F3** 

**Package mechanical data** 

**==> picture [405 x 596] intentionally omitted <==**

**----- Start of picture text -----**<br>
DPAK MECHANICAL DATA<br>mm. inch<br>DIM.<br>MIN. TYP MAX. MIN. TYP. MAX.<br>A 2.2 2.4 0.086 0.094<br>A1 0.9 1.1 0.035 0.043<br>A2 0.03 0.23 0.001 0.009<br>B 0.64 0.9 0.025 0.035<br>b4 5.2 5.4 0.204 0.212<br>C 0.45 0.6 0.017 0.023<br>C2 0.48 0.6 0.019 0.023<br>D 6 6.2 0.236 0.244<br>D1 5.1 0.200<br>E 6.4 6.6 0.252 0.260<br>E1 4.7 0.185<br>e 2.28 0.090<br>e1 4.4 4.6 0.173 0.181<br>H 9.35 10.1 0.368 0.397<br>L 1 0.039<br>(L1) 2.8 0.110<br>L2 0.8 0.031<br>L4 0.6 1 0.023 0.039<br>R 0.2 0.008<br>V2 0 ° 8 ° 0 ° 8 °<br>0068772-F<br>**----- End of picture text -----**<br>


10/13 

**STD65N55F3** 

**Packaging mechanical data** 

## **5 Packaging mechanical data** 

## **DPAK FOOTPRINT** 

All dimensions are in millimeters 

## **TAPE AND REEL SHIPMENT** 

|40mm min.<br>Access hole<br>at slot location||_|.|**DIM.**<br>**mm**<br>**inch**<br>REEL MECHANICAL DATA<br>. T|**DIM.**<br>**mm**<br>**inch**<br>REEL MECHANICAL DATA<br>. T|**DIM.**<br>**mm**<br>**inch**<br>REEL MECHANICAL DATA<br>. T|
|---|---|---|---|---|---|---|
|||||**MIN.**<br>**MAX.**<br>**MIN.**||**MAX.**|
|| 8<br>tiaAtQ<br>c<br>A<br>d { AN +}<br>PO<br>Fullradius<br>apeslot||A<br>330<br>B<br>1.5<br>0.059<br>C<br>12.8<br>13.2<br>0.504<br>D<br>20.2<br>0.795<br>G<br>16.4<br>18.4<br>0.645<br>N<br>50<br>1.968<br>i<br>'<br>N<br>a7<br>-<br>G measured<br>at hub||||12.992<br>0.520<br>0.724|
|tape start<br>25mm min.||||T<br>22.4||0.881|
|—<br>width|||||||
|**DIM.**<br>**mm**<br>**inch**<br>**MIN.**<br>**MAX.**<br>**MIN.**<br>**MAX.**<br>A0<br>6.8<br>7<br>0.267<br>0.275<br>TAPE MECHANICAL DATA<br>~~——— =~~||||**BASE QTY**<br>2500<br>~~—~~|**BULK QTY**<br>2500||
|B0<br>10.4<br>10.6<br>0.409<br>0.417|||||||
|B1<br>12.1<br>0.476|||||||
|D<br>1.5<br>1.6<br>0.059<br>0.063<br>D1<br>1.5<br>0.059<br>E<br>1.65<br>1.85<br>0.065<br>0.073<br>F<br>7.4<br>7.6<br>0.291<br>0.299<br>K0<br>2.55<br>2.75<br>0.100<br>0.108<br>P0<br>3.9<br>4.1<br>0.153<br>0.161<br>P1<br>7.9<br>8.1<br>0.311<br>0.319<br>~~SSE~~<br>ERE<br>~~Ce~~ee<br>~~re~~<br>Forponies<br>|<br>Ao,<br>|<br>Le |<br>ctontty<br>~~r~~<br>~~|~~<br>~~|~~<br>~~ff] ~~“ora<br>UserDirection<br>ofFeed<br>~~ee ee eee~~<br>ue|||||||
|P2<br>1.9<br>2.1<br>0.075<br>0.082|||||||
|R<br>40<br>1.574<br>W<br>15.7<br>16.3<br>0.618<br>0.641<br>~~a~~<br>~~ee~~<br>~~a aee~~|||FEEDDIRECTION,<br>Bendingradius||||



11/13 

**STD65N55F3** 

**Revision history** 

## **6 Revision history** 

## **Table 7. Revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|08-Feb-2007|1|First release|
|22-Feb-2007|2|Description has been changed|
|11-May-2007|3|Improved current values|



12/13 

**STD65N55F3** 

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13/13 



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