# Power MOSFET, N Channel, 620 V, 3.8 A, 1.7 ohm, TO-252 (DPAK), Surface Mount
**URL**: https://novapart.co/products/STD4N62K3/power-mosfet-n-channel-620-v-38-a-17-ohm-to-252
**SKU**: STD4N62K3
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.6410
**Stock**: 10+
## Description
Transistor Polarity:N Channel; Continuous Drain Current Id:3.8A; Drain Source Voltage Vds:620V; On Resistance Rds(on):1.7ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3.75V; Pow
## Specifications
| Parameter | Value |
|---|---|
| Msl | MSL 3 - 168 hours |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 70W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 620V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 3.8A |
| Drain Source On State Resistance | 1.7ohm |
| Gate Source Threshold Voltage Max | 3.75V |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:2098173/)
**STD4N62K3**
Datasheet
N-channel 620 V, 1.7 Ω typ., 3.8 A MDmesh™ K3 Power MOSFET in DPAK package
## **Features**
**==> picture [55 x 91] intentionally omitted <==**
**----- Start of picture text -----**
TAB
2 3
&.
1
DPAK
D(2, TAB)
**----- End of picture text -----**
|**Order codes**
~~SS~~|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STD4N62K3
~~SS~~|620 V|2 Ω|3.8 A|70 W|
- Extremely high dv/dt capability
- Very low intrinsic capacitance
- Improved diode reverse recovery characteristics
- Zener-protected
**==> picture [106 x 56] intentionally omitted <==**
**----- Start of picture text -----**
G(1)
S(3) AM01475V1
**----- End of picture text -----**
## **Applications**
- Switching applications
## **Description**
This MDmesh™ K3 Power MOSFET is the result of improvements applied to STMicroelectronics’ MDmesh™ technology, combined with a new optimized vertical structure. This device boasts an extremely low on-resistance, superior dynamic performance and high avalanche capability, rendering it suitable for the most demanding applications.
## **Product status link** ~~ea~~
|**Product summary**
~~Saas~~|**Product summary**
~~Saas~~|
|---|---|
|**Order code**|STD4N62K3|
|**Marking**|4N62K3|
|**Package**|DPAK|
|**Packing**|Tape and reel|
**DS7065** - **Rev 4** - **August 2018** For further information contact your local STMicroelectronics sales office.
www.st.com
**STD4N62K3 Electrical ratings**
**1**
## **Electrical ratings**
**Table 1. Absolute maximum ratings**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|620|V|
|VGS|Gate- source voltage|± 30|V|
|ID|Drain current (continuous) at TC= 25 °C|3.8|A|
|ID|Drain current (continuous) at TC= 100 °C|2|A|
|IDM(1)|Drain current (pulsed)|15.2|A|
|PTOT|Total dissipation at TC= 25 °C|70|W|
|IAR|Avalanche current, repetitive or not-repetitive|3.8|A|
|EAS(2)|Single pulse avalanche energy|115|mJ|
|ESD|Gate-source human body model (R = 1.5 kΩ, C = 100 pF)|2.5|kV|
|dv/dt(3)|Peak diode recovery voltage slope|12|V/ns|
|Tstg|Storage temperature range|-55 to 150|°C|
|Tj|Operating junction temperature range|||
_1. Pulse width limited by safe operating area._
_2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V._
_3. ISD ≤ 3.8 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS, VDS peak ≤ V(BR)DSS._
## **Table 2. Thermal data**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|1.79|°C/W|
|Rthj-pcb (1)|Thermal resistance junction-pcb|50|°C/W|
_1. When mounted on 1inch² FR-4 board, 2 oz Cu._
**DS7065** - **Rev 4**
**page 2/20**
**STD4N62K3 Electrical characteristics**
**2**
## **Electrical characteristics**
(TC = 25 °C unless otherwise specified)
**Table 3. On /off states**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown
voltage|ID= 1 mA, VGS= 0 V|620|||V|
|IDSS|Zero gate voltage drain
current|VGS= 0 V, VDS= 620 V|||1|µA|
|||VGS= 0 V, VDS= 620 V
TC= 125 °C(1)|||50|µA|
|IGSS|Gate body leakage current|VGS= ±20 V, VDS= 0 V|||± 10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 50 µA|3|3.75|4.5|V|
|RDS(on)|Static drain-source on
resistance|VGS= 10 V, ID= 1.9 A||1.7|2|Ω|
_1. Defined by design, not subject to production test._
**Table 4. Dynamic**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 50 V, f = 1 MHz,
VGS= 0 V|-|550|-|pF|
|Coss|Output capacitance|||42|||
|Crss|Reverse transfer capacitance|||7|||
|Coss eq. (1)|Equivalent output capacitance|VGS= 0 V,
VDS= 0 to 496 V||27||pF|
|RG|Intrinsic gate resistance|f = 1 MHz open drain|2|5|10|Ω|
|Qg|Total gate charge|VDD= 496 V, ID= 3.8 A,
VGS= 0 to 10 V
(seeFigure 15. Test circuit for
gate charge behavior)|-|22|-|nC|
|Qgs|Gate-source charge|||4|||
|Qgd|Gate-drain charge|||13|||
_1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS._
**Table 5. Switching times**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 300 V, ID= 1.9 A,
RG= 4.7 Ω, VGS= 10 V
(seeFigure 14. Test circuit for
resistive load switching times
andFigure 19. Switching time
waveform)|-|10|-|ns|
|tr|Rise time|||9|||
|td(off)|Turn-off delay time|||29|||
|tf|Fall time|||19|||
**DS7065** - **Rev 4**
**page 3/20**
**STD4N62K3 Electrical characteristics**
## **Table 6. Source drain diode**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||3.8|A|
|ISDM (1)|Source-drain current (pulsed)||||15.2||
|VSD (2)|Forward on voltage|ISD= 3.8 A, VGS= 0 V|-||1.6|V|
|trr|Reverse recovery time|ISD= 3.8 A, di/dt = 100 A/µs
VDD= 60 V (seeFigure
16. Test circuit for inductive
load switching and diode
recovery times)|-|220||ns|
|Qrr|Reverse recovery charge|||1.4||μC|
|IRRM|Reverse recovery current|||13||A|
|trr|Reverse recovery time|ISD= 3.8 A, di/dt = 100 A/µs
VDD= 60 V, Tj= 150 °C
(seeFigure 16. Test circuit for
inductive load switching and
diode recovery times)|-|270||ns|
|Qrr|Reverse recovery charge|||1.9||μC|
|IRRM|Reverse recovery current|||14||A|
_1. Pulse width limited by safe operating area._
_2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%._
**Table 7. Gate-source Zener diode**
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)GSO|Gate-source breakdown
voltage|ID= 0 A, IGS= ±1 mA|±30|-||V|
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
**DS7065** - **Rev 4**
**page 4/20**
**STD4N62K3 Electrical characteristics curves**
## **2.1 Electrical characteristics curves**
**Figure 1. Safe operating area**
**==> picture [184 x 150] intentionally omitted <==**
**----- Start of picture text -----**
ID AM07173v1
(A)
10 10µs
100µs
1
1ms
10ms
0.1 Tj=150°C
Tc=25°C
Single pulse
0.01
0.1 1 10 100 VDS(V)
DS(on)
Operation in this area is
Limited by max R
**----- End of picture text -----**
## **Figure 2. Thermal impedance**
**==> picture [158 x 148] intentionally omitted <==**
**----- Start of picture text -----**
K GC20460
10 [0]
10 [-1]
10 [-2]
10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s)
**----- End of picture text -----**
**==> picture [513 x 375] intentionally omitted <==**
**----- Start of picture text -----**
Figure 3. Output characteristics Figure 4. Transfer characteristics
AM07175v1 AM07176v1
ID(A) ID
(A) VDS=15V
8 V GS =10V
6
7V
7
5
6
5 4
4
3
6V
3
2
2
1
1
5V
0 0
0 5 10 15 20 25 VDS(V) 0 2 4 6 8 VGS(V)
Figure 5. Gate charge vs gate-source voltage Figure 6. Static drain-source on resistance
AM07178v1
VGS DS [(V)] RDS(on)
(V) DS VDD=496V (Ω)
VGS=10V
ID
1.9
10
8 1.8
6
1.7
4
1.6
2
0 1.5
0 5 10 15 20 Qg(nC) 0 1 2 3 ID(A)
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**page 5/20**
**STD4N62K3 Electrical characteristics curves**
**==> picture [513 x 195] intentionally omitted <==**
**----- Start of picture text -----**
Figure 7. Capacitance variations Figure 8. Output capacitance stored energy
C AM07179v1 Eoss AM07180v1
(pF) (µJ)
3.0
1000
2.5
Ciss
2.0
100
1.5
Coss 1.0
10
Crss
0.5
1 0
0.1 1 10 100 VDS(V) 0 100 200 300 400 500 600 VDS(V)
**----- End of picture text -----**
**==> picture [513 x 206] intentionally omitted <==**
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Figure 9. Normalized gate threshold voltage vs
Figure 10. Normalized on resistance vs temperature
temperature
VGS(th)(norm) AM07181v1 (norm) RDS(on) AM07182v1
1.10 2.5
1.00 ID = 1 mA 2.0 VGS = 10 V
ID = 1.9 A
1.5
0.90
1.0
0.80 0.5
0.0
0.70 -75 -25 25 75 125 TJ(°C)
-75 -25 25 75 125 TJ(°C)
**----- End of picture text -----**
**==> picture [513 x 196] intentionally omitted <==**
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Figure 11. Normalized V(BR)DSS vs temperature Figure 12. Source-drain diode forward characteristics
V(BR)DSS AM07183v1 VSD(V) AM08888v1
(norm)
1.10 TJ=25°C
1.05 0.7
TJ=150°C
0.6
1.00 0.5
0.4
0.95 0.3
0.2
0.90 0.1
-75 -25 25 75 125 TJ(°C) 0 1 2 3 4 5 ISD(A)
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**DS7065** - **Rev 4**
**page 6/20**
**STD4N62K3 Electrical characteristics curves**
**==> picture [233 x 185] intentionally omitted <==**
**----- Start of picture text -----**
Figure 13. Maximum avalanche energy vs temperature
EAS AM07184v1
(mJ)
120 ID=3.8 A
110 VDD=50 V
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 TJ(°C)
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**DS7065** - **Rev 4**
**page 7/20**
**STD4N62K3 Test circuits**
**3 Test circuits**
**==> picture [513 x 173] intentionally omitted <==**
**----- Start of picture text -----**
Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior
VDD
12 V 47 kΩ
1 kΩ
100 nF
RL 2200 3.3
+ μF μF VDD
VD VGS IG= CONST 100 Ω D.U.T.
VGS RG D.U.T. pulse width 2200 + 2.7 kΩ VG
pulse width μF
47 kΩ
1 kΩ
AM01468v1 AM01469v1
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**==> picture [513 x 184] intentionally omitted <==**
**----- Start of picture text -----**
Figure 16. Test circuit for inductive load switching and
Figure 17. Unclamped inductive load test circuit
diode recovery times
A A A L
G D D.U.T. fastdiode 100 µH VD 2200 3.3
25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD
G D.U.T.
+ RG S Vi D.U.T.
_ pulse width
AM01471v1
AM01470v1
**----- End of picture text -----**
**==> picture [513 x 172] intentionally omitted <==**
**----- Start of picture text -----**
Figure 19. Switching time waveform
Figure 18. Unclamped inductive waveform
ton toff
V(BR)DSS
td(on) tr td(off) tf
VD
90% 90%
IDM
ID 0 10% VDS 10%
VDD VDD VGS 90%
AM01472v1 0 10%
AM01473v1
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**DS7065** - **Rev 4**
**page 8/20**
**STD4N62K3 Package information**
**4 Package information**
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark.
**DS7065** - **Rev 4**
**page 9/20**
**STD4N62K3 DPAK (TO-252) type A2 package information**
## **4.1 DPAK (TO-252) type A2 package information**
**Figure 20. DPAK (TO-252) type A2 package outline**
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**==> picture [66 x 7] intentionally omitted <==**
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0068772_type-A2_rev25
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**DS7065** - **Rev 4**
**page 10/20**
**STD4N62K3 DPAK (TO-252) type A2 package information**
**Table 8. DPAK (TO-252) type A2 mechanical data**
|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|
**DS7065** - **Rev 4**
**page 11/20**
**STD4N62K3 DPAK (TO-252) type C2 package information**
## **4.2 DPAK (TO-252) type C2 package information**
**Figure 21. DPAK (TO-252) type C2 package outline**
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**==> picture [33 x 34] intentionally omitted <==**
**==> picture [44 x 142] intentionally omitted <==**
**==> picture [54 x 44] intentionally omitted <==**
**==> picture [45 x 7] intentionally omitted <==**
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0068772_C2_25
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**DS7065** - **Rev 4**
**page 12/20**
**STD4N62K3 DPAK (TO-252) type C2 package information**
**Table 9. DPAK (TO-252) type C2 mechanical data**
|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20|2.30|2.38|
|A1|0.90|1.01|1.10|
|A2|0.00||0.10|
|b|0.72||0.85|
|b4|5.13|5.33|5.46|
|c|0.47||0.60|
|c2|0.47||0.60|
|D|6.00|6.10|6.20|
|D1|5.10||5.60|
|E|6.50|6.60|6.70|
|E1|5.20||5.50|
|e|2.186|2.286|2.386|
|H|9.80|10.10|10.40|
|L|1.40|1.50|1.70|
|L1|2.90 REF|||
|L2|0.90||1.25|
|L3|0.51 BSC|||
|L4|0.60|0.80|1.00|
|L6|1.80 BSC|||
|θ1|5°|7°|9°|
|θ2|5°|7°|9°|
|V2|0°||8°|
**DS7065** - **Rev 4**
**page 13/20**
**STD4N62K3 DPAK (TO-252) type E package information**
- **4.3 DPAK (TO-252) type E package information**
**Figure 22. DPAK (TO-252) type E package outline**
**==> picture [81 x 73] intentionally omitted <==**
**==> picture [59 x 67] intentionally omitted <==**
**==> picture [81 x 73] intentionally omitted <==**
**==> picture [180 x 180] intentionally omitted <==**
0068772_type-E_rev.25
**DS7065** - **Rev 4**
**page 14/20**
**STD4N62K3 DPAK (TO-252) type E package information**
**Table 10. DPAK (TO-252) type E mechanical data**
|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.18||2.39|
|A2|||0.13|
|b|0.65||0.884|
|b4|4.95||5.46|
|c|0.46||0.61|
|c2|0.46||0.60|
|D|5.97||6.22|
|D1|5.21|||
|E|6.35||6.73|
|E1|4.32|||
|e||2.286||
|e1||4.572||
|H|9.94||10.34|
|L|1.50||1.78|
|L1||2.74||
|L2|0.89||1.27|
|L4|||1.02|
**Figure 23. DPAK (TO-252) recommended footprint (dimensions are in mm)**
**==> picture [111 x 197] intentionally omitted <==**
**==> picture [37 x 6] intentionally omitted <==**
**----- Start of picture text -----**
FP_0068772_25
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**DS7065** - **Rev 4**
**page 15/20**
**STD4N62K3 DPAK (TO-252) packing information** ~~To~~
## **4.4**
## **DPAK (TO-252) packing information**
## **Figure 24. DPAK (TO-252) tape outline**
**==> picture [398 x 316] intentionally omitted <==**
**----- Start of picture text -----**
10 pitches cumulative
tolerance on tape +/- 0.2 mm
Top cover P0 D P2
T tape
E
F
B1 J) K0 B0 paeg e s W
I
f f PEREllos oe oes:
For machine ref. only A0 P1 D1
including draft and
radii concentric around B0
User direction of feed
R
—— Bending radius
User direction of feed
AM08852v1
**----- End of picture text -----**
**DS7065** - **Rev 4**
**page 16/20**
**STD4N62K3 DPAK (TO-252) packing information**
**Figure 25. DPAK (TO-252) reel outline**
**==> picture [363 x 208] intentionally omitted <==**
**----- Start of picture text -----**
T
40mm min.
access hole
at slot location
B
D
C
N
A
Tape slot G measured
in core for at hub
Full radius tape start
2.5mm min.width
**----- End of picture text -----**
AM06038v1
**Table 11. DPAK (TO-252) tape and reel mechanical data**
||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||
**DS7065** - **Rev 4**
**page 17/20**
**STD4N62K3**
## **Revision history**
**Table 12. Document revision history**
|**Date**|**Revision**|**Changes**|
|---|---|---|
|16-Dec-2010|1|First release.|
|26-Apr-2012|2|Added min and max values for RG in Table 5: Dynamic and
Section 5: Packaging mechanical data.
Updated Section 4: Package mechanical data.
Minor text changes.|
|09-Sep-2013|3|– Updated: Section 4: Package mechanical data
– Minor text changes|
|03-Aug-2018|4|The part number STB4N62K3 has been moved to a separate datasheet.
Removed maturity status indication from cover page. The document status is production data.
Updated title and features in cover page.
UpdatedSection 1 Electrical ratings,Section 2 Electrical characteristicsandSection
4 Package information.
Minor text changes.|
**DS7065** - **Rev 4**
**page 18/20**
**STD4N62K3 Contents**
## **Contents**
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**||
||**2.1**|Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test**|**circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9**||
||**4.1**|DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
||**4.2**|DPAK (TO-252) type C2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
||**4.3**|DPAK (TO-252) type E package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13|
||**4.4**|DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15|
|**Revision**||**history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18**|
**DS7065** - **Rev 4**
**page 19/20**
**STD4N62K3**
## **IMPORTANT NOTICE – PLEASE READ CAREFULLY**
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
**DS7065** - **Rev 4**
**page 20/20**
## Links
- [View this product on Novapart](https://novapart.co/products/STD4N62K3/power-mosfet-n-channel-620-v-38-a-17-ohm-to-252)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/std4n62k3/mosfet-n-ch-620v-3-8a-dpak/dp/2098173)
---
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