# Power MOSFET, N Channel, 600 V, 3.3 A, 1.6 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3129994RL/)

**URL**: https://novapart.co/products/STD3NM60N/power-mosfet-n-channel-600-v-33-a-16-ohm-to-252
**SKU**: STD3NM60N
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3750
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:3.3A; Drain Source Voltage Vds:600V; On Resistance Rds(on):1.6ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh II |
| Qualification | - |
| Power Dissipation | 50W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 50W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 1.6ohm |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 3.3A |
| Drain Source On State Resistance | 1.6ohm |
| Automotive Qualification Standard | - |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3129994RL/)

**==> picture [61 x 39] intentionally omitted <==**

## **STD3NM60N** 

## N-channel 600 V, 1.6 Ω, 3.3 A, MDmesh™ II Power MOSFET in DPAK package 

## **Datasheet — preliminary data** 

## **Features** 

|**Order codes**|**VDSS**<br>**@TJmax**|**RDS(on)**<br>**max.**|**ID**|
|---|---|---|---|
|STD3NM60N|650 V|< 1.8Ω|3.3 A|



- 100% avalanche tested 

- Low input capacitance and gate charge 

**==> picture [48 x 45] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>3<br>1<br>DPAK<br>**----- End of picture text -----**<br>


- Low gate input resistance 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. 

## **Figure 1. Internal schematic diagram** 

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**Table 1. Device summary** 

|**Order codes**|**Marking**|**Package**|**Packaging**|
|---|---|---|---|
|STD3NM60N|3NM60N|DPAK|Tape and reel|



May 2012 

_www.st.com_ 

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This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 

**Contents** 

**STD3NM60N** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)         . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Packaging mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14**|



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**Electrical ratings** 

## **1 Electrical ratings** 

## **Table 2. Absolute maximum ratings** 

|**Table 2.**|**Absolute maximum ratings**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VGS|Gate- source voltage|± 25|V|
|ID|Drain current (continuous) at TC= 25 °C|3.3|A|
|ID|Drain current (continuous) at TC= 100 °C|2.5|A|
|IDM<br>(1)|Drain current (pulsed)|13|A|
|PTOT|Total dissipation at TC= 25 °C|50|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|TJ<br>Tstg|Operating junction temperature<br>Storage temperature|- 55 to 150|°C|



1. Pulse width limited by safe operating area. 

2. ISD ≤  3.3 A, di/dt  ≤  400 A/µs,  VDS peak  ≤  V(BR)DSS, VDD = 80% V(BR)DSS. 

## **Table 3. Thermal data** 

|**Table 3.**|**Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-case|Thermal resistance junction-case max|2.5|°C/W|
|Rthj-pcb|Thermal resistance junction-pcb max|50|°C/W|



## **Table 4. Avalanche characteristics** 

|**Table 4.**|**Avalanche characteristics**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|IAR|Avalanche current, repetitive or not-<br>repetitive (pulse width limited by Tj max)|1|A|
|EAS|Single pulse avalanche energy (starting<br>TJ=25 °C, ID=IAR, VDD=50 V)|86|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase =25 °C unless otherwise specified) 

## **Table 5. On /off states** 

|**Table 5.**|**On /off states**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 1 mA, VGS= 0|600|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 600 V<br>VDS= 600 V, TC=125 °C|||1<br>100|µA<br>µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 25 V; VDS=0|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2|3|4|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 1.65A||1.6|1.8|Ω|



## **Table 6. Dynamic** 

|**Table 6.**|**Dynamic**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss<br>Coss<br>Crss|Input capacitance<br>Output capacitance<br>Reverse transfer<br>capacitance|VDS= 50 V, f = 1 MHz,<br>VGS= 0|-|188<br>12.8<br>1.1|-|pF<br>pF<br>pF|
|Coss(tr)<br>(1)|Output capacitance<br>time related|VDS= 0, VGS= 0|-|96.8|-|pF|
|Rg|Gate input resistance|f=1 MHz open drain|-|6|-|Ω|
|Qg<br>Qgs<br>Qgd|Total gate charge<br>Gate-source charge<br>Gate-drain charge|VDD= 480 V, ID= 3.3A,<br>VGS= 10 V<br>_(see Figure 15)_|-|9.5<br>2<br>5|-|nC<br>nC<br>nC|



1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

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**Electrical characteristics** 

## **Table 7. Switching times** 

|**Table 7.**|**Switching times**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|td(on)<br>tr<br>td(off)<br>tf|Turn-on delay time<br>Rise time<br>Turn-off-delay time<br>Fall time|VDD= 300 V, ID= 1.65 A,<br>RG= 4.7Ω,VGS= 10 V<br>_(see Figure 14)_|-|6<br>9.5<br>23<br>31|-|ns<br>ns<br>ns<br>ns|



## **Table 8. Source drain diode** 

|**Table 8.**|**Source drain diode**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|ISD<br>ISDM<br>(1)|Source-drain current<br>Source-drain current (pulsed)||-||3.3<br>13.2|A<br>A|
|VSD<br>(2)|Forward on voltage|ISD= 3.3 A, VGS= 0|-||1.6|V|
|trr<br>Qrr<br>IRRM|Reverse recovery time<br>Reverse recovery charge<br>Reverse recovery current|ISD= 3.3 A, di/dt = 100 A/µs<br>VDD= 60 V<br>_(see Figure 16)_|-|200<br>910<br>9.1||ns<br>nC<br>A|
|trr<br>Qrr<br>IRRM|Reverse recovery time<br>Reverse recovery charge<br>Reverse recovery current|ISD= 3.3 A, di/dt = 100 A/µs<br>VDD= 60 V TJ= 150 °C<br>_(see Figure 16)_|-|236<br>1073<br>9.1||ns<br>nC<br>A|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**STD3NM60N** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2. Safe operating area** 

**Figure 3. Thermal impedance** 

**==> picture [462 x 374] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM11293v1<br>(A) Tj=150°C<br>Tc=25°C<br>Single pulse<br>10<br>10µs<br>1 100µs<br>1ms<br>0.1 10ms<br>0.01<br>0.1 1 10 100 VDS(V)<br>Figure 4. Output characteristics Figure 5. Transfer characteristics<br>AM11294v1 AM11295v1<br>ID ID<br>(A) VGS=10V (A)<br>VGS=20V<br>5 5<br>4 4<br>6V<br>3 3<br>2<br>2<br>1 5V 1<br>0 0<br>0 4 8 12 16 20 VDS(V) 0 2 4 6 8 VGS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


## **Figure 6. Gate charge vs gate-source voltage Figure 7.** 

## **Static drain-source on-resistance** 

**==> picture [462 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM11296v1VDS RDS(on) AM11297v1<br>(V) (Ω)<br>VDD=480V (V) VGS=10V<br>12 VDS<br>ID=3.3A 500<br>1.66<br>10<br>400<br>1.62<br>8<br>300<br>6<br>1.58<br>200<br>4<br>1.54<br>100<br>2<br>0 0 1.50<br>0 2 4 6 8 10 Qg(nC) 0 0.5 1 1.5 2 2.5 3 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

## **Figure 8. Capacitance variations** 

**==> picture [228 x 171] intentionally omitted <==**

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C AM11298v1<br>(pF)<br>1000<br>Ciss<br>100<br>10 Coss<br>1 Crss<br>0.1 1 10 100 VDS(V)<br>**----- End of picture text -----**<br>


## **Figure 9. Output capacitance stored energy** 

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**----- Start of picture text -----**<br>
Eoss AM11299v1<br>(µJ)<br>1.6<br>1.2<br>0.8<br>0.4<br>0<br>0 100 200 300 400 500 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Normalized gate threshold voltage Figure 11. Normalized on-resistance vs. vs. temperature temperature** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS(th) AM11300v1<br>(norm) ID=250µA<br>1.02<br>0.94<br>0.86<br>0.78<br>0.70<br>-50 0 50 100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

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**----- Start of picture text -----**<br>
VSD AM11303v1<br>(V) TJ=-50°C<br>1.2<br>TJ=25°C<br>1.1<br>1.0<br>TJ=150°C<br>0.9<br>0.8<br>0.7<br>0.6<br>0.5<br>0 0.5 1 1.5 2 2.5 3 ISD(A)<br>**----- End of picture text -----**<br>


**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
RDS(on) AM11301v1<br>(norm) ID=1.65A<br>2.0<br>1.6<br>1.2<br>0.8<br>0.4<br>-50 0 50 100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 13. Normalized VDS vs. temperature** 

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**----- Start of picture text -----**<br>
VDS AM09028v1<br>(norm)<br>ID=1mA<br>1.10<br>1.08<br>1.06<br>1.04<br>1.02<br>1.00<br>0.98<br>0.96<br>0.94<br>0.92<br>-50 -25 0 25 50 75 100 TJ(°C)<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**Figure 14. Switching times test circuit for Figure 15. Gate charge test circuit resistive load** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 16. Test circuit for inductive load switching and diode recovery times** 

**Figure 17. Unclamped inductive load test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>G D.U.T. FASTDIODE L=100μH VD 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>**----- End of picture text -----**<br>


## **Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

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**Package mechanical data** 

**Table 9. DPAK (TO-252) mechanical data** 

|**Dim.**|**mm**|**mm**|**mm**|
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1||5.10||
|E|6.40||6.60|
|E1||4.70||
|e||2.28||
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1||1.50|
|L1||2.80||
|L2||0.80||
|L4|0.60||1|
|R||0.20||
|V2|0°||8°|



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**Package mechanical data** 

**==> picture [169 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20. DPAK (TO-252) drawing<br>**----- End of picture text -----**<br>


**==> picture [405 x 284] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_I<br>**----- End of picture text -----**<br>


## **Figure 21. DPAK footprint[(a)]** 

**==> picture [405 x 151] intentionally omitted <==**

**----- Start of picture text -----**<br>
6.7 1.8 3<br>1.6<br>2.3<br>6.7<br>2.3<br>1.6<br>AM08850v1<br>**----- End of picture text -----**<br>


a. All dimensions are in millimeters 

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**Packaging mechanical data** 

## **5 Packaging mechanical data** 

**Table 10. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1||Base qty.|2500|
|P1|7.9|8.1||Bulk qty.|2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



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**Packaging mechanical data** 

**==> picture [395 x 327] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 22. Tape for DPAK (TO-252)<br>10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>o i e ; —4 |<br>| / O0O0 G8G 0CO0 8 G00 E<br>F<br>K0 W<br>B1 B0<br>on e |||| e |] ®]]<br>ena olo l o i a i c te<br>| Tl LT<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0 —_—><br>User direction of feed<br>R<br>S e ca l e alice<br>a Bending radius<br>ad<br>User direction of feed<br>**----- End of picture text -----**<br>


**==> picture [39 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM08852v1<br>**----- End of picture text -----**<br>


## **Figure 23. Reel for DPAK (TO-252)** 

**==> picture [377 x 249] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>REEL DIMENSIONS<br>40mm min.<br>Access hole<br>At sl ot location<br>B<br>D<br>C<br>N<br>A<br>Full radius Tape slot  G measured at hub<br>in core for<br>tape start 25 mm min.<br>width<br>AM08851v2<br>**----- End of picture text -----**<br>


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**Revision history** 

## **6 Revision history** 

**Table 11.** 12 **Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|10-May-2012|1|First release|



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## Links

- [View this product on Novapart](https://novapart.co/products/STD3NM60N/power-mosfet-n-channel-600-v-33-a-16-ohm-to-252)
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- [Supplier page](https://es.farnell.com/stmicroelectronics/std3nm60n/mosfet-n-ch-600v-3-3a-50w-to-252/dp/3129994RL)
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