# Power MOSFET, N Channel, 60 V, 24 A, 0.019 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2807189/)

**URL**: https://novapart.co/products/STD30N6LF6AG/power-mosfet-n-channel-60-v-24-a-0019-ohm-to-252
**SKU**: STD30N6LF6AG
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3110
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:24A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.019ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.5V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | STripFET F6 |
| Qualification | AEC-Q101 |
| Power Dissipation | 40W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 24A |
| Drain Source On State Resistance | 0.019ohm |
| Gate Source Threshold Voltage Max | 2.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807189/)

## **STD30N6LF6AG** 

Automotive-grade N-channel 60 V, 19 mΩ typ., 24 A STripFET™ F6 Power MOSFET in a DPAK package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STD30N6LF6AG|60 V|25 mΩ|24 A|40 W|



- Designed for automotive applications and AEC-Q101 qualified 

- Very low on-resistance 

- Very low gate charge 

- High avalanche ruggedness 

**Figure 1: Internal schematic diagram** 

- Low gate drive power loss 

## **Applications** 

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D(2, TAB)<br>•<br>G(1)<br>packages.<br>S(3)<br>AM01475v1_Tab<br>Table 1: Device summary<br>**----- End of picture text -----**<br>


- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

**Order code Marking Package Packing** ~~ee~~ STD30N6LF6AG 30N6LF6 DPAK Tape and Reel 

This is information on a product in full production. 

_www.st.com_ 

June 2015 

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|**Contents**<br>**STD30N6LF6AG**|**Contents**<br>**STD30N6LF6AG**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>DPAK (TO-252) type A package information..................................... 9|
||4.2<br>DPAK (TO-252) packing information ............................................... 12|
|**5**|**Revision history ............................................................................ 14**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|60|V|
|VGS|Gate-source voltage|±20|V|
|ID|Drain current (continuous) at Tcase= 25 °C|24|A|
||Drain current (continuous) at Tcase= 100 °C|17||
|IDM<br>_(1)_|Drain current (pulsed)|96|A|
|PTOT|Total dissipation at Tcase= 25 °C|40|W|
|EAS<br>_(2)_|Singlepulse avalanche energy|130|mJ|
|Tstg|Storage temperature|-55 to 175|°C|
|Tj|Operating junction temperature|||



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) starting Tj = 25 °C, ID = 24 A, VDD = 43.5 V. 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|3.75|°C/W|
|Rthj-pcb<br>_(1)_|Thermal resistancejunction-pcb|35||



## **Notes:** 

(1) When mounted on a 1-inch² FR-4 board, 2 oz Cu. 

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**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 4: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 250 µA|60|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 60 V|||1|µA|
|||VGS= 0 V, VDS= 60 V,<br>Tcase= 125 °C|||100||
|IGSS|Gate-bodyleakage current|VDS= 0 V, VGS= ±20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|1||2.5|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 12 A||19|25|mΩ|
|||VGS= 4.5 V, ID= 12 A||24|30||



## **Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz,<br>VGS= 0 V|-|1320|-|pF|
|Coss|Output capacitance||-|88.5|-||
|Crss|Reverse transfer<br>capacitance||-|58|-||
|Qg|Totalgate charge|VDD= 30 V, ID= 24 A,<br>VGS= 10 V (see_Figure 14:_<br>_"Gate charge test circuit"_)|-|26|-|nC|
|Qgs|Gate-source charge||-|6|-||
|Qgd|Gate-drain charge||-|3.3|-||



**Table 6: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 30 V, ID= 12 A,<br>RG= 4.7 Ω, VGS= 10 V (see<br>_Figure 13: "Switching times_<br>_test circuit for resistive load"_<br>and_Figure 18: "Switching time_<br>_waveform"_)|-|10|-|ns|
|tr|Rise time||-|19|-||
|td(off)|Turn-off delaytime||-|56|-||
|tf|Fall time||-|7|-||



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**Electrical characteristics** 

**Table 7: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||24|A|
|ISDM<br>_(1)_|Source-drain current<br>(pulsed)||-||96|A|
|VSD<br>_(2)_|Forward on voltage|VGS= 0 V, ISD= 24 A|-||1.3|V|
|trr|Reverse recoverytime|ISD= 24 A, di/dt = 100 A/µs,<br>VDD= 48 V, TJ= 150 °C (see<br>_Figure 15: "Test circuit for_<br>_inductive load switching and_<br>_diode recovery times"_)|-|22.4||ns|
|Qrr|Reverse recoverycharge||-|22.2||nC|
|IRRM|Reverse recovery current||-|2||A|



## **Notes:** 

(1) Current is limited by package. 

(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**==> picture [386 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 2: Safe operating area  Figure 3: Thermal impedance<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics Figure 5: Transfer characteristics** 

**==> picture [154 x 141] intentionally omitted <==**

**==> picture [155 x 143] intentionally omitted <==**

**Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance** 

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**Electrical characteristics** 

**==> picture [385 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9: Normalized gate threshold voltage<br>Figure 8: Capacitance variations<br>vs temperature<br>**----- End of picture text -----**<br>


**==> picture [398 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 10: Normalized on-resistance vs  Figure 11: Normalized V(BR)DSS vs<br>temperature  temperature<br>**----- End of picture text -----**<br>


**Figure 12: Source-drain diode forward characteristics** 

**==> picture [155 x 143] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**Figure 13: Switching times test circuit for resistive load** 

**Figure 15: Test circuit for inductive load switching and diode recovery times** 

**Figure 17: Unclamped inductive waveform** 

**==> picture [62 x 33] intentionally omitted <==**

**Figure 14: Gate charge test circuit** 

**Figure 16: Unclamped inductive load test circuit** 

**Figure 18: Switching time waveform** 

**==> picture [87 x 119] intentionally omitted <==**

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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 DPAK (TO-252) type A package information** 

**Figure 19: DPAK (TO-252) type A package outline** 

**==> picture [408 x 403] intentionally omitted <==**

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**Package information** 

**Table 8: DPAK (TO-252) type A mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|4.60|4.70|4.80|
|e|2.16|2.28|2.40|
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1.00||1.50|
|(L1)|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



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**Package information** 

**Figure 20: DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [408 x 281] intentionally omitted <==**

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**Package information** 

## **4.2 DPAK (TO-252) packing information** 

**Figure 21: DPAK (TO-252) tape outline** 

**==> picture [396 x 318] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>K0 W<br>B1 B0<br>P asialniatalct<br>For machineref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>User direction of feed<br>R<br>Zz<br>Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


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**Package information** 

**Figure 22: DPAK (TO-252) reel outline** 

**==> picture [361 x 207] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D<br>C<br>N<br>A<br>Tape slot G measured<br>in core for at hub<br>Full radius tape start<br>2.5mm min.width<br>**----- End of picture text -----**<br>


**==> picture [43 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM06038v1<br>**----- End of picture text -----**<br>


**Table 9: DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|||**Reel**||
|---|---|---|---|---|---|
|**Dim.**|**m**|**m**|**Dim.**|**m**|**m**|
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Baseqty.||2500|
|P1|7.9|8.1|Bulkqty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



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**Revision history** 

## **5 Revision history** 

**Table 10: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|30-Jun-2015|1|First release.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

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No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

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## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/std30n6lf6ag/mosfet-aec-q101-n-ch-60v-to-252/dp/2807189)
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