# Power MOSFET, N Channel, 60 V, 24 A, 0.032 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:9935363RL/)

**URL**: https://novapart.co/products/STD20NF06T4/power-mosfet-n-channel-60-v-24-a-0032-ohm-to-252
**SKU**: STD20NF06T4
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3010
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:24A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.032ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power Dissipation Pd

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | AEC-Q101 |
| Power Dissipation | 60W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 24A |
| Drain Source On State Resistance | 0.032ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:9935363RL/)

**STD20NF06T4** 

## Datasheet 

N-channel 60 V, 32 mΩ typ., 24 A, STripFET II Power MOSFET in a DPAK package 

## **Features** 

**==> picture [87 x 157] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>2 3<br>1<br>DPAK<br>D(2, TAB)<br>G(1)<br>S(3)<br>AM01475v1_noZen<br>**----- End of picture text -----**<br>


|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STD20NF06T4|60 V|40 mΩ|24 A|60 W|



- Exceptional dv/dt capability 

- 100% avalanche tested 

- Low gate charge 

## **Applications** 

- Switching applications 

## **Description** 

This Power MOSFET has been developed using STMicroelectronics' unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements. 

## **Product status link** 

STD20NF06T4 

|**Product summary**|**Product summary**|
|---|---|
|**Order code**|STD20NF06T4|
|**Marking**|D20NF06|
|**Package**|DPAK|
|**Packing**|Tape and reel|



**DS13717** - **Rev 1** - **May 2021** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STD20NF06T4 Electrical ratings** 

## **1 Electrical ratings** 

**Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|60|V|
|VDGR|Drain-gate voltage (RGS= 20 kΩ)|60|V|
|VGS|Gate-source voltage|±20|V|
|ID|Drain current (continuous) at TC= 25 °C|24|A|
||Drain current (continuous) at TC= 100 °C|17||
|IDM(1)|Drain current (pulsed)|96|A|
|PTOT|Total power dissipation at TC= 25 °C|60|W|
|dv/dt(2)|Peak diode recovery voltage slope|10|V/ns|
|EAS(3)|Single pulse avalanche energy|300|mJ|
|Tstg|Storage temperature range|-55 to 175|°C|
|Tj|Operating junction temperature range|||



_1. Pulse width is limited by safe operating area._ 

_2. ISD ≤ 24 A, di/dt ≤ 100 A/ns, VDD = 80% V(BR)DSS_ 

_3. Starting Tj = 25 °C, ID = 10 A, VDD = 45 V._ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|RthJC|Thermal resistance, junction-to-case|2.5|°C/W|
|RthJB(1)|Thermal resistance, junction-to-board|50||



_1. When mounted on a 1-inch² FR-4, 2 Oz copper board._ 

**DS13717** - **Rev 1** 

**page 2/14** 

**STD20NF06T4 Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified). 

## **Table 3. Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|VGS= 0 V, ID= 250 µA|60|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 60 V|||1|µA|
|||VGS= 0 V, VDS= 60 V,<br>TC= 125 °C(1)|||10||
|IGSS|Gate-body leakage current|VDS= 0 V, VGS= ±20 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2||4|V|
|RDS(on)|Static drain-source on-resistance|VGS= 10 V, ID= 12 A||32|40|mΩ|



_1. Defined by design, not subject to production test._ 

**Table 4. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|gfs|Forward transconductance|VDS= 25 V, ID= 12 A|-|15|-|S|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz, VGS= 0 V|-|690|-|pF|
|Coss|Output capacitance||-|170|-|pF|
|Crss|Reverse transfer capacitance||-|68|-|pF|
|td(on)|Turn-on delay time|VDD= 30 V, ID= 10 A, RG= 4.7 Ω,<br>VGS= 10 V (seeFigure 13. Test<br>circuit for resistive load switching<br>times)|-|10|-|ns|
|tr|Rise time||-|30|-|ns|
|td(off)|Turn-off delay time||-|30|-|ns|
|tf|Fall time||-|8|-|ns|
|Qg|Total gate charge|VDD= 30 V, ID= 20 A, VGS= 10 V,<br>RG= 4.7 Ω<br>(seeFigure 14. Test circuit for gate<br>charge behavior)|-|23|-|nC|
|Qgs|Gate-source charge||-|5|-||
|Qgd|Gate-drain charge||-|7.5|-||



**DS13717** - **Rev 1** 

**page 3/14** 

**STD20NF06T4 Electrical characteristics** 

## **Table 5. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||24|A|
|ISDM(1)|Source-drain current (pulsed)||-||96|A|
|VSD(2)|Forward on voltage|VGS= 0 V, ISD= 24 A|-||1.5|V|
|trr|Reverse recovery time|ISD= 20 A, di/dt = 100 A/µs,<br>VDD= 30 V, TJ= 150 °C<br>(seeFigure 15. Test circuit for<br>inductive load switching and diode<br>recovery times)|-|65||ns|
|Qrr|Reverse recovery charge||-|150||nC|
|IRRM|Reverse recovery current||-|4.6||A|



_1. Pulse width is limited by safe operating area._ 

_2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%._ 

**DS13717** - **Rev 1** 

**page 4/14** 

**STD20NF06T4 Electrical characteristics (curves)** 

## **2.1 Electrical characteristics (curves)** 

**Figure 1. Safe operating area** 

**==> picture [137 x 133] intentionally omitted <==**

**Figure 3. Output characteristics** 

**==> picture [137 x 133] intentionally omitted <==**

**Figure 5. Transconductance** 

**==> picture [137 x 130] intentionally omitted <==**

**Figure 2. Thermal impedance** 

**==> picture [137 x 136] intentionally omitted <==**

**Figure 4. Transfer characteristics** 

**==> picture [137 x 133] intentionally omitted <==**

**Figure 6. Static drain-source on-resistance** 

**==> picture [137 x 130] intentionally omitted <==**

**DS13717** - **Rev 1** 

**page 5/14** 

**STD20NF06T4 Electrical characteristics (curves)** 

**Figure 7. Gate charge vs gate-source voltage** 

**==> picture [137 x 125] intentionally omitted <==**

**Figure 9. Normalized gate threshold voltage vs temperature** 

**==> picture [137 x 125] intentionally omitted <==**

**Figure 11. Source-drain diode forward characteristics** 

**==> picture [137 x 128] intentionally omitted <==**

**Figure 8. Capacitance variations** 

**==> picture [137 x 127] intentionally omitted <==**

**Figure 10. Normalized on-resistance vs temperature** 

**==> picture [137 x 125] intentionally omitted <==**

**Figure 12. Normalized V(BR)DSS vs temperature** 

**==> picture [137 x 125] intentionally omitted <==**

**DS13717** - **Rev 1** 

**page 6/14** 

**STD20NF06T4 Test circuits** 

## **3 Test circuits** 

**==> picture [513 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width 2200 + 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Test circuit for inductive load switching and<br>Figure 16. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**Figure 17. Unclamped inductive waveform** 

**==> picture [177 x 123] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS<br>VD<br>IDM<br>ID<br>VDD VDD<br>AM01472v1<br>**----- End of picture text -----**<br>


**Figure 18. Switching time waveform** 

**==> picture [182 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
ton toff<br>td(on) tr td(off) tf<br>90% 90%<br>0 10% VDS 10%<br>VGS 90%<br>0 10%<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS13717** - **Rev 1** 

**page 7/14** 

**STD20NF06T4 Package information** 

## **4** 

## **Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **4.1 DPAK (TO-252) 2 leads SMD package information** 

**Figure 19. DPAK (TO-252) type A die pad package outline** 

**==> picture [89 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_2_leads_SMD_Rev_30<br>**----- End of picture text -----**<br>


**DS13717** - **Rev 1** 

**page 8/14** 

**STD20NF06T4 DPAK (TO-252) 2 leads SMD package information** 

**Table 6. DPAK (TO-252) type A die pad mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|4.60|4.70|4.80|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS13717** - **Rev 1** 

**page 9/14** 

**STD20NF06T4 DPAK (TO-252) 2 leads SMD max die pad package information** 

## **4.2 DPAK (TO-252) 2 leads SMD max die pad package information** 

**Table 7. DPAK (TO-252) type A max die pad mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS13717** - **Rev 1** 

**page 10/14** 

**STD20NF06T4 DPAK (TO-252) 2 leads SMD max die pad package information** 

**Figure 20. DPAK (TO-252) type A recommended footprint (dimensions are in mm)** 

**==> picture [180 x 304] intentionally omitted <==**

**==> picture [90 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_2_leads_SMD_footprint<br>**----- End of picture text -----**<br>


**DS13717** - **Rev 1** 

**page 11/14** 

**STD20NF06T4** 

## **Revision history** 

## **Table 8. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|03-May-2021|1|First release.|



**DS13717** - **Rev 1** 

**page 12/14** 

**STD20NF06T4 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
||**4.1**<br>DPAK (TO-252) 2 leads SMD package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
||**4.2**<br>DPAK (TO-252) 2 leads SMD max die pad package information . . . . . . . . . . . . . . . . . . . . . . 10|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12**||



**DS13717** - **Rev 1** 

**page 13/14** 

**STD20NF06T4** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2021 STMicroelectronics – All rights reserved 

**DS13717** - **Rev 1** 

**page 14/14** 



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