# Power MOSFET, N Channel, 650 V, 15 A, 0.198 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3129752/)

**URL**: https://novapart.co/products/STD18N65M5/power-mosfet-n-channel-650-v-15-a-0198-ohm-to-252
**SKU**: STD18N65M5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.2500
**Stock**: 1000+
**Lead Time**: 113 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:15A; Drain Source Voltage Vds:650V; On Resistance Rds(on):0.198ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M5 |
| Qualification | - |
| Power Dissipation | 110W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 650V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 15A |
| Drain Source On State Resistance | 0.198ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3129752/)

**STB18N65M5, STD18N65M5** 

Datasheet 

N-channel 650 V, 0.198 Ω typ., 15 A, MDmesh™ M5 Power MOSFETs in D²PAK and DPAK packages 

## **Features** 

**==> picture [315 x 193] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>TAB Order codes VDS @ TJmax<br>2 3 STB18N65M5<br>2 1 710 V<br>& 1 3 2]. e STD18N65M5 e<br>D [2] PAK DPAK<br>• Extremely low RDS(on)<br>• Low gate charge and input capacitance<br>D(2, TAB) • Excellent switching performance<br>• 100% avalanche tested<br>Applications<br>G(1)<br>• Switching applications<br>S(3) Description<br>AM01475v1_noZen<br>**----- End of picture text -----**<br>


|**Order codes**<br>~~ee~~|**VDS @ TJmaxDS @ TJmax @ TJmaxJmax**<br>~~e~~|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STB18N65M5<br>~~ee~~|710 V<br>~~e~~|0.220 Ω|15 A|
|STD18N65M5<br> ~~ee~~||||



- Low gate charge and input capacitance 

These devices are N-channel Power MOSFETs based on the MDmesh™ M5 innovative vertical process technology combined with the well-known PowerMESH™ horizontal layout. The resulting products offer extremely low on-resistance, making them particularly suitable for applications requiring high power and superior efficiency. 

|**Product summary**<br>~~_~~|**Product summary**<br>~~_~~|
|---|---|
|**STB18N65M5**<br>~~ee~~||
|**Order code**|STB18N65M5|
|**Marking**|18N65M5|
|**Package**|D2PAK|
|**Packing**|Tape and reel|
|**STD18N65M5**<br>e~~e~~||
|**Order code**|STD18N65M5|
|**Marking**|18N65M5|
|**Package**|DPAK|
|**Packing**|Tape and reel|



**DS9171** - **Rev 2** - **August 2018** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STB18N65M5, STD18N65M5 Electrical ratings** 

**1** 

## **Electrical ratings** 

**Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|15|A|
||Drain current (continuous) at TC= 100 °C|9.4|A|
|IDM(1)|Drain current (pulsed)|60|A|
|PTOT|Total dissipation at TC= 25 °C|110|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|Tj|Operating junction temperature range|-55 to 150|°C|
|T|Storage temperature range|||



_1. Pulse width limited by safe operating area._ 

_2. ISD ≤ 15 A, di/dt ≤ 400 A/μs, VDD = 400 V, VDS(peak) < V(BR)DSS._ 

## **Table 2. Thermal data** 

|**Sbl**|**Sbl**|**P**|**Value**|**Value**|**Ui**|**Ui**|
|---|---|---|---|---|---|---|
|**ymo**||**arameter**|**D2PAK**|**DPAK**|**nt**||
|Rthj-case||Thermal resistance junction-case|1.14||°C/W||
|Rthj-pcb (1)||Thermal resistance junction-pcb|30|50|°C/W||
|_1._<br>_When mounted on an 1 inch² FR-4, 2 Oz copper board._<br>**Table 3.Avalanche characteristics**|||||||
|**Symbol**|**Parameter**|||**Value**||**Unit**|
|IAR|Avalanche current, repetitive or non-repetitive (pulse width limited by Tjmax)|||4||A|
|EAS|Single pulse avalanche energy (starting Tj= 25 °C, ID= IAR, VDD= 50 V)|||210||mJ|



**DS9171** - **Rev 2** 

**page 2/23** 

**STB18N65M5, STD18N65M5 Electrical characteristics** 

## **2** 

## **Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

**Table 4. On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|ID= 1 mA, VGS= 0 V|650|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 650 V|||1|µA|
|||VGS= 0 V, VDS= 650 V,<br>TC= 125 °C(1)|||100|µA|
|IGSS|Gate body leakage current|VDS= 0 V, VGS= ±25 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source on resistance|VGS= 10 V, ID= 7.5 A||0.198|0.220|Ω|



_1. Defined by design, not subject to production test._ 

**Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|1240|-|pF|
|Coss|Output capacitance|||32|||
|Crss|Reverse transfer capacitance|||3.2|||
|Co(tr) (1)|Equivalent capacitance time<br>related|VDS= 0 to 520 V, VGS= 0 V|-|99|-|pF|
|Co(er) (2)|Equivalent capacitance<br>energy related|||30|-||
|Rg|Gate input resistance|f = 1 MHz, ID= 0 A|-|3|-|Ω|
|Qg|Total gate charge|VDD= 520 V, ID= 7.5 A,<br>VGS= 0 to 10 V<br>(seeFigure 17. Test circuit for gate<br>charge behavior)|-|31|-|nC|
|Qgs|Gate-source charge|||8|-||
|Qgd|Gate-drain charge|||14|||



_1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS._ 

_2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS._ 

**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(v)|Voltage delay time|VDD= 400 V, ID= 9.5 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(seeFigure 18. Test circuit for<br>inductive load switching and diode<br>recovery timesandFigure<br>21. Switching time waveform)|-|36|-|ns|
|tr(v)|Voltage rise time|||7|||
|tf(i)|Current fall time|||9|||
|tc(off)|Crossing time|||11|||



**DS9171** - **Rev 2** 

**page 3/23** 

**STB18N65M5, STD18N65M5 Electrical characteristics** 

## **Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||15|A|
|ISDM(1)|Source-drain current (pulsed)||||60||
|VSD(2)|Forward on voltage|ISD= 15 A, VGS= 0 V|-||1.5|V|
|trr|Reverse recovery time|ISD= 15 A, di/dt = 100 A/µs<br>VDD= 100 V<br>(seeFigure 18. Test circuit for<br>inductive load switching and diode<br>recovery times)|-|290||ns|
|Qrr|Reverse recovery charge|||3.4||μC|
|IRRM|Reverse recovery current|||23.5||A|
|trr|Reverse recovery time|ISD= 15 A, di/dt = 100 A/µs<br>VDD= 100 V, Tj= 150 °C<br>(seeFigure 18. Test circuit for<br>inductive load switching and diode<br>recovery times)|-|352||ns|
|Qrr|Reverse recovery charge|||4||μC|
|IRRM|Reverse recovery current|||24||A|



_1. Pulse width limited by safe operating area._ 

_2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%._ 

**DS9171** - **Rev 2** 

**page 4/23** 

**STB18N65M5, STD18N65M5 Electrical characteristics (curves)** 

## **2.1 Electrical characteristics (curves)** 

**Figure 1. Safe operating area for D[2] PAK** 

**==> picture [180 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM12487v1<br>(A)<br>10<br>10µs<br>100µs<br>1ms<br>1 Tj=150°C<br>Tc=25°C<br>10ms<br>Single<br>pulse<br>0.1<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 2. Thermal impedance for D[2] PAK** 

**==> picture [150 x 145] intentionally omitted <==**

**Figure 4. Thermal impedance for DPAK** 

**Figure 3. Safe operating area for DPAK** 

**==> picture [181 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
IDD AM124871v1<br>(A)<br>10µs<br>10<br>100µs<br>1 Tj=150°C=150°C150°C°CC 1ms<br>Tc=25°C=25°C25°C°CC<br>Single 10ms<br>pulse<br>0.1<br>0.1 1 10 100 VDS(V)DS(V)(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
IDD K GC20460<br>(A)<br>10µs<br>10 10 [0]<br>100µs<br>1 Tj=150°C=150°C150°C°CC 1ms 10 [-1]<br>Tc=25°C=25°C25°C°CC<br>Single 10ms<br>pulse<br>0.1 10 [-2]<br>0.1 1 10 100 VDS(V)DS(V)(V) 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s)<br>Figure 5. Output characteristics Figure 6. Transfer characteristics<br>ID AM12472v1 ID AM12486v1<br>(A)  (A)<br>V GS= 9, 10 V<br>35 35 VDS= 25 V<br>30 30<br>V GS= 8 V<br>25  25<br>20  20<br>15  V GS= 7 V  15<br>10  10<br>V GS= 6 V<br>5  5<br>0  0<br>0  5  10  15  20  VDS(V)  3 4 5 6 7 8 9 VGS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 5/23** 

**STB18N65M5, STD18N65M5 Electrical characteristics (curves)** 

**Figure 7. Gate charge vs gate-source voltage** 

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AM12474v1<br>VGS<br>(V) VDS<br>VDD=520V (V)<br>12<br>VDS ID=7.5A 500<br>10<br>400<br>8<br>300<br>6<br>200<br>4<br>100<br>2<br>0 0<br>0 5 10 15 20 25 30 Qg(nC)<br>**----- End of picture text -----**<br>


**Figure 8. Static drain-source on-resistance** 

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**----- Start of picture text -----**<br>
AM12475v1<br>RDS(on)<br>(Ω)<br>0.24<br>VGS=10V<br>0.23<br>0.22<br>0.21<br>0.2<br>0.19<br>0.18<br>0.17<br>0.16<br>0 2 4 6 8 10 12 14 ID(A)<br>**----- End of picture text -----**<br>


**Figure 9. Capacitance variations** 

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**----- Start of picture text -----**<br>
C AM12476v1<br>(pF)<br>10000<br>1000 Ciss<br>100<br>Coss<br>10<br>Crss<br>1<br>0.1 1 10 100 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 10. Output capacitance stored energy** 

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**----- Start of picture text -----**<br>
Eoss AM12484v1<br>(µJ)<br>6<br>5<br>4<br>3<br>2<br>1<br>0<br>0 200 400 600 VDS(V)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 11. Normalized gate threshold voltage vs<br>Figure 12. Normalized on-resistance vs temperature<br>temperature<br>VGS(th) AM12471v1 RDS(on) AM12483v1<br>(norm)<br>(norm)<br>2.1<br>1.10<br>ID = 250 µA 1.9 VID= 7.5 AGS = 10V<br>V DS  = V GS<br>1.7<br>1.00<br>1.5<br>1.3<br>0.90<br>1.1<br>0.9<br>0.80<br>0.7<br>0.5<br>0.70 -50 -25 0 25 50 75 100 TJ(°C)<br>-50 -25 0 25 50 75 100 TJ(°C)<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 6/23** 

**STB18N65M5, STD18N65M5 Electrical characteristics (curves)** 

**==> picture [513 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Source-drain diode forward characteristics Figure 14. Normalized V(BR)DSS vs temperature<br>VSD AM05461v1 V(BR)DSS AM10399v1<br>(V) TJ=-50°C (norm)<br>1.08<br>1.2 ID = 1mA<br>1.06<br>1.0<br>1.04<br>0.8 1.02<br>TJ=25°C<br>1.00<br>0.6<br>TJ=150°C<br>0.98<br>0.4<br>0.96<br>0.2<br>0.94<br>0 0.92<br>0 2 4 6 8 10 ISD(A) -50 -25 0 25 50 75 100 TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 15. Switching losses vs gate resistance** 

**==> picture [175 x 152] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM12485v1<br>E (μJ)<br>VDD=400V<br>160 VGS=10V Eon<br>ID=9.5A<br>140<br>120<br>100<br>80<br>60 Eoff<br>40<br>20<br>0<br>0 10 20 30 40 RG(Ω)<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 7/23** 

**STB18N65M5, STD18N65M5 Test circuits** 

**3 Test circuits** 

**==> picture [513 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 16. Test circuit for resistive load switching times Figure 17. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width + 2.7 kΩ<br>2200 VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 206] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Test circuit for inductive load switching and<br>Figure 19. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S<br>Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform<br>V(BR)DSS Id Concept waveform for Inductive Load Turn-off<br>VD 90%Vds 90%Id<br>Tdelay -off<br>IDM<br>Vgs<br>90%Vgs on<br>ID<br>Vgs(I(t ))<br>VDD VDD 10%Vds 10%Id<br>Vds<br>Trise Tfall<br>AM01472v1 Tcross - over AM05540v2<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 8/23** 

**STB18N65M5, STD18N65M5 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

**DS9171** - **Rev 2** 

**page 9/23** 

**STB18N65M5, STD18N65M5 D²PAK (TO-263) type A package information** 

## **4.1 D²PAK (TO-263) type A package information** 

**Figure 22. D²PAK (TO-263) type A package outline** 

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0079457_25<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 10/23** 

**STB18N65M5, STD18N65M5 D²PAK (TO-263) type A package information** 

**Table 8. D²PAK (TO-263) type A package mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|A1|0.03||0.23|
|b|0.70||0.93|
|b2|1.14||1.70|
|c|0.45||0.60|
|c2|1.23||1.36|
|D|8.95||9.35|
|D1|7.50|7.75|8.00|
|D2|1.10|1.30|1.50|
|E|10.00||10.40|
|E1|8.30|8.50|8.70|
|E2|6.85|7.05|7.25|
|e||2.54||
|e1|4.88||5.28|
|H|15.00||15.85|
|J1|2.49||2.69|
|L|2.29||2.79|
|L1|1.27||1.40|
|L2|1.30||1.75|
|R||0.40||
|V2|0°||8°|



**DS9171** - **Rev 2** 

**page 11/23** 

**STB18N65M5, STD18N65M5 D²PAK (TO-263) type A package information** 

**Figure 23. D²PAK (TO-263) recommended footprint (dimensions are in mm)** 

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**==> picture [24 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
Footprint<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 12/23** 

**STB18N65M5, STD18N65M5 DPAK (TO-252) type A2 package information** 

**4.2 DPAK (TO-252) type A2 package information** 

**Figure 24. DPAK (TO-252) type A2 package outline** 

**==> picture [33 x 37] intentionally omitted <==**

**==> picture [66 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_type-A2_rev25<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 13/23** 

**STB18N65M5, STD18N65M5 DPAK (TO-252) type A2 package information** 

**Table 9. DPAK (TO-252) type A2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS9171** - **Rev 2** 

**page 14/23** 

**STB18N65M5, STD18N65M5 DPAK (TO-252) type C2 package information** 

- **4.3 DPAK (TO-252) type C2 package information** 

**Figure 25. DPAK (TO-252) type C2 package outline** 

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0068772_C2_25<br>**----- End of picture text -----**<br>


**DS9171** - **Rev 2** 

**page 15/23** 

**STB18N65M5, STD18N65M5 DPAK (TO-252) type C2 package information** 

**Table 10. DPAK (TO-252) type C2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20|2.30|2.38|
|A1|0.90|1.01|1.10|
|A2|0.00||0.10|
|b|0.72||0.85|
|b4|5.13|5.33|5.46|
|c|0.47||0.60|
|c2|0.47||0.60|
|D|6.00|6.10|6.20|
|D1|5.10||5.60|
|E|6.50|6.60|6.70|
|E1|5.20||5.50|
|e|2.186|2.286|2.386|
|H|9.80|10.10|10.40|
|L|1.40|1.50|1.70|
|L1|2.90 REF|||
|L2|0.90||1.25|
|L3|0.51 BSC|||
|L4|0.60|0.80|1.00|
|L6|1.80 BSC|||
|θ1|5°|7°|9°|
|θ2|5°|7°|9°|
|V2|0°||8°|



**DS9171** - **Rev 2** 

**page 16/23** 

**STB18N65M5, STD18N65M5 DPAK (TO-252) type C2 package information** 

**Figure 26. DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [111 x 196] intentionally omitted <==**

FP_0068772_25 

**DS9171** - **Rev 2** 

**page 17/23** 

**STB18N65M5, STD18N65M5 D²PAK and DPAK packing information** 

## **4.4 D²PAK and DPAK packing information** 

**Figure 27. Tape outline** 

**DS9171** - **Rev 2** 

**page 18/23** 

**STB18N65M5, STD18N65M5 D²PAK and DPAK packing information** 

**Figure 28. Reel outline** 

**==> picture [363 x 208] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D<br>C<br>N<br>A<br>Tape slot  G measured<br>in core for  at hub<br>Full radius  tape start<br>2.5mm min.width<br>**----- End of picture text -----**<br>


AM06038v1 

**Table 11. D²PAK tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|10.5|10.7|A||330|
|B0|15.7|15.9|B|1.5||
|D|1.5|1.6|C|12.8|13.2|
|D1|1.59|1.61|D|20.2||
|E|1.65|1.85|G|24.4|26.4|
|F|11.4|11.6|N|100||
|K0|4.8|5.0|T||30.4|
|P0|3.9|4.1||||
|P1|11.9|12.1|Base quantity||1000|
|P2|1.9|2.1|Bulk quantity||1000|
|R|50|||||
|T|0.25|0.35||||
|W|23.7|24.3||||



**DS9171** - **Rev 2** 

**page 19/23** 

**STB18N65M5, STD18N65M5 D²PAK and DPAK packing information** 

**Table 12. DPAK tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



**DS9171** - **Rev 2** 

**page 20/23** 

**STB18N65M5, STD18N65M5** 

## **Revision history** 

**Table 13. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|18-Jul-2012|1|First release.|
|09-Aug-2018|2|Removed maturity status indication from cover page. The document status is<br>production data.<br>UpdatedSection 4 Package information.<br>Minor text changes|



**DS9171** - **Rev 2** 

**page 21/23** 

**STB18N65M5, STD18N65M5 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**||
||**2.1**|Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test**|**circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9**||
||**4.1**|D²PAK (TO-263) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
||**4.2**|DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12|
||**4.3**|DPAK (TO-252) type C2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14|
||**4.4**|D²PAK and DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17|
|**Revision**||**history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21**|



**DS9171** - **Rev 2** 

**page 22/23** 

**STB18N65M5, STD18N65M5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2018 STMicroelectronics – All rights reserved 

**DS9171** - **Rev 2** 

**page 23/23** 



## Links

- [View this product on Novapart](https://novapart.co/products/STD18N65M5/power-mosfet-n-channel-650-v-15-a-0198-ohm-to-252)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/std18n65m5/mosfet-n-ch-650v-15a-110w-to-252/dp/3129752)
---

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