# Power MOSFET, N Channel, 650 V, 12 A, 0.23 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2098162/)

**URL**: https://novapart.co/products/STD16N65M5/power-mosfet-n-channel-650-v-12-a-023-ohm-to-252
**SKU**: STD16N65M5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.1400
**Stock**: 1000+
**Lead Time**: 113 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:12A; Drain Source Voltage Vds:650V; On Resistance Rds(on):0.23ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power D

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 90W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 650V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 12A |
| Drain Source On State Resistance | 0.23ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2098162/)

**STD16N65M5** 

Datasheet 

N-channel 650 V, 0.230 Ω typ., 12 A MDmesh™ M5 Power MOSFET in a DPAK package 

## **Features** 

**==> picture [55 x 56] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>2 3<br>&.<br>1<br>DPAK<br>**----- End of picture text -----**<br>


|**Order codes**<br>~~a~~|**VDS at Tjmax.**|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STD16N65M5<br>~~a~~|710 V|0.279 Ω|12 A|



- Low gate charge and input capacitance 

- Excellent switching performance 

**==> picture [127 x 108] intentionally omitted <==**

**----- Start of picture text -----**<br>
D(2, TAB)<br>G(1)<br>S(3)<br>AM01475v1_noZen<br>**----- End of picture text -----**<br>


- 100% avalanche tested 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET based on the MDmesh™ M5 innovative vertical process technology combined with the well-known PowerMESH™ horizontal layout. The resulting product offers extremely low on-resistance, making it particularly suitable for applications requiring high power and superior efficiency. 

|**Product summary**<br>~~Sea~~|**Product summary**<br>~~Sea~~|
|---|---|
|**Order code**|STD16N65M5|
|**Marking**|16N65M5|
|**Package**|DPAK|
|**Packing**|Tape and reel|



**DS7011** - **Rev 3** - **November 2018** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STD16N65M5 Electrical ratings** 

**1** 

## **Electrical ratings** 

## **Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at TC= 25 °C|12|A|
|ID|Drain current (continuous) at TC= 100 °C|7.3|A|
|IDM (1)|Drain current (pulsed)|48|A|
|PTOT|Total power dissipation at TC= 25 °C|90|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|Tj|Operating junction temperature range|-55 to 150|°C|
|Tstg|Storage temperature range|||



_1. Pulse width limited by safe operating area._ 

_2. ISD ≤ 12 A, di/dt ≤ 400 A/μs, VDD = 400 V, VDS(peak) < V(BR)DSS._ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|1.38|°C/W|
|Rthj-pcb (1)|Thermal resistance junction-pcb|50|°C/W|



_1. When mounted on 1inch² FR-4 board, 2 oz Cu._ 

**Table 3. Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not-repetitive (pulse width limited by TjMax)|4|A|
|EAS|Single pulse avalanche energy (starting Tj= 25 °C, ID= IAR, VDD= 50 V)|200|mJ|



**DS7011** - **Rev 3** 

**page 2/19** 

**STD16N65M5 Electrical characteristics** 

**2 Electrical characteristics** 

(TCASE = 25 °C unless otherwise specified) 

## **Table 4. On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source<br>breakdown voltage|ID= 1 mA, VGS= 0 V|650|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 650 V,|||1|µA|
|||VGS= 0 V, VDS= 650 V,<br>TC= 125 °C(1)|||100|µA|
|IGSS|Gate body leakage<br>current|VDS= 0 V, VGS= ±25 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source on<br>resistance|VGS= 10 V, ID= 6 A||0.230|0.279|Ω|



_1. Defined by design, not subject to production test._ 

## **Table 5. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|1250|-|pF|
|Coss|Output capacitance|||30|||
|Crss|Reverse transfer<br>capacitance|||3|||
|Co(tr) (1)|Equivalent capacitance<br>time related|VDS= 0 to 520 V, VGS= 0 V|-|100|-|pF|
|Co(er) (2)|Equivalent capacitance<br>energy related||-|30|-|pF|
|Rg|Gate input resistance|f = 1 MHz open drain|-|2|-|Ω|
|Qg|Total gate charge|VDD= 520 V, ID= 12 A, VGS= 0<br>to 10 V<br>(seeFigure 15. Test circuit for<br>gate charge behavior)|-|31|-|nC|
|Qgs|Gate-source charge|||8|||
|Qgd|Gate-drain charge|||12|||



_1. Co(tr) time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS._ 

_2. Co(er) energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS._ 

**DS7011** - **Rev 3** 

**page 3/19** 

**STD16N65M5 Electrical characteristics** 

## **Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(v)|Voltage delay time|VDD= 400 V, ID= 8 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(seeFigure 16. Test circuit for<br>inductive load switching and<br>diode recovery timesand<br>Figure 19. Switching time<br>waveform)|-|25|-|ns|
|tr(v)|Voltage rise time|||7|||
|tf(i)|Current fall time|||6|||
|tc(off)|Crossing time|||8|||



**Table 7. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||12|A|
|ISDM (1)|Source-drain current<br>(pulsed)||||48||
|VSD (2)|Forward on voltage|ISD= 12 A, VGS= 0 V|-||1.5|V|
|trr|Reverse recovery time|ISD= 12 A, di/dt = 100 A/µs<br>VDD= 100 V (seeFigure 16. Test<br>circuit for inductive load switching<br>and diode recovery times)|-|300||ns|
|Qrr|Reverse recovery charge|||3.5||µC|
|IRRM|Reverse recovery current|||23||A|
|trr|Reverse recovery time|ISD= 12 A, di/dt = 100 A/µs<br>VDD= 100 V (seeFigure 16. Test<br>circuit for inductive load switching<br>and diode recovery times)|-|350||ns|
|Qrr|Reverse recovery charge|||4||µC|
|IRRM|Reverse recovery current|||24||A|



_1. Pulse width limited by safe operating area._ 

_2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%._ 

**DS7011** - **Rev 3** 

**page 4/19** 

**STD16N65M5 Electrical characteristics curves** 

## **2.1 Electrical characteristics curves** 

**Figure 1. Safe operating area** 

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**----- Start of picture text -----**<br>
ID AM08609v1<br>(A)<br>10  10µs<br>100µs<br>1<br>1ms<br>10ms<br>0.1<br>Tj=150°C<br>Tc=25°C<br>Single pulse<br>0.01<br>0.1  1  10  100  VDS(V)<br>is<br>areaDS(on)<br>Operation in thisby max R<br>Limited<br>**----- End of picture text -----**<br>


**Figure 2. Thermal impedance** 

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**----- Start of picture text -----**<br>
K GC20460<br>10 [0]<br>10 [-1]<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 3. Output characterisics Figure 4. Transfer characteristics<br>AM03178v1 AM03179v1<br>ID ID<br>(A)  VGS=10V  (A)  VDS=10V<br>7.5V<br>20  20<br>7V<br>15  15<br>6.5V<br>10<br>10<br>6V<br>5  5<br>5.5V<br>0  0<br>0  2  4  6 8 10 12 14 16 18 VDS(V)  3 4  5  6  7  8 9 VGS(V)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 5. Normalized V(BR)DSS vs temperature Figure 6. Static drain-source on resistance<br>V(BR)DSS AM03187v1 RDS(on) AM03181v1<br>(norm) ID=1mA (Ω)<br>VGS=10V<br>1.07  0.245<br>1.05  0.240<br>1.03 0.235<br>1.01  0.230<br>0.99  0.225<br>0.97  0.220<br>0.95  0.215<br>0.93 0.210<br>-50  -25  0  25  50  75  100  TJ(°C) 0  2  4  6  8 10 12  ID(A)<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 5/19** 

**STD16N65M5 Electrical characteristics curves** 

**==> picture [513 x 209] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 8. Capacitance variations<br>Figure 7. Output capacitance stored energy<br>E(µJ)oss AM03312v1 C  AM03183v1<br>(pF)<br>7<br>6 10000<br>5<br>Ciss<br>1000<br>4<br>3<br>100<br>2<br>Coss<br>10<br>1<br>Crss<br>0<br>0  100  200 300  400  500 600  VDS(V)  1<br>0.1  1  10  100  VDS(V)<br>**----- End of picture text -----**<br>


**Figure 9. Gate charge vs gate-source voltage** 

**==> picture [186 x 166] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM03182v1<br>VDD=520V<br>ID<br>10<br>8<br>3<br>6<br>200<br>4<br>2  100<br>0<br>0  10  25  30 35  Qg<br>**----- End of picture text -----**<br>


**Figure 10. Normalized on resistance vs temperature** 

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**----- Start of picture text -----**<br>
RDS(on) AM03185v1<br>(norm)<br>VGS=10V<br>2.1<br>1.9<br>1.7<br>1.5<br>1.3<br>1.1<br>0.9<br>0.7<br>0.5<br>-50  0  50  100  TJ(°C)<br>**----- End of picture text -----**<br>


**==> picture [205 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 11. Normalized gate threshold voltage vs<br>temperature<br>VGS(th) AM03184v1<br>(norm)<br>ID=250µA<br>1.10<br>1.00<br>0.90<br>0.80<br>0.70<br>-50  0  50  100  TJ(°C)<br>**----- End of picture text -----**<br>


**Figure 12. Source-drain diode forward characteristics** 

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**----- Start of picture text -----**<br>
AM03186v1<br>VSD<br>(V)<br>1.0  TJ=-25°C<br>0.9<br>0.8<br>TJ=25°C<br>0.7  TJ=150°C<br>0.6<br>0.5<br>0.4<br>0  5  10  ISD(A)<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 6/19** 

**STD16N65M5 Electrical characteristics curves** 

**==> picture [211 x 199] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Switching energy vs gate resistance<br>E  AM10359v1<br>( µ J)<br>100<br>Eon<br>80<br>60<br>40  Eoff<br>20<br>0<br>0  10 20  30 40 RG(Ω)<br># Eon including reverse recovery of a SiC diode.<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 7/19** 

**STD16N65M5 Test circuits** 

**3 Test circuits** 

**==> picture [513 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior<br>VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>RL 2200 3.3<br>+ μF μF VDD<br>VD VGS IG= CONST 100 Ω D.U.T.<br>VGS RG D.U.T. pulse width + 2.7 kΩ<br>2200 VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 206] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 16. Test circuit for inductive load switching and<br>Figure 17. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S<br>Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform<br>V(BR)DSS Id Concept waveform for Inductive Load Turn-off<br>VD 90%Vds 90%Id<br>Tdelay -off<br>IDM<br>Vgs<br>90%Vgs on<br>ID<br>Vgs(I(t ))<br>VDD VDD 10%Vds 10%Id<br>Vds<br>Trise Tfall<br>AM01472v1 Tcross - over AM05540v2<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 8/19** 

**STD16N65M5 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

**DS7011** - **Rev 3** 

**page 9/19** 

**STD16N65M5 DPAK (TO-252) type A2 package information** 

## **4.1 DPAK (TO-252) type A2 package information** 

**Figure 20. DPAK (TO-252) type A2 package outline** 

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**==> picture [66 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_type-A2_rev25<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 10/19** 

**STD16N65M5 DPAK (TO-252) type A2 package information** 

**Table 8. DPAK (TO-252) type A2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS7011** - **Rev 3** 

**page 11/19** 

**STD16N65M5 DPAK (TO-252) type C2 package information** 

## **4.2 DPAK (TO-252) type C2 package information** 

**Figure 21. DPAK (TO-252) type C2 package outline** 

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**----- Start of picture text -----**<br>
0068772_C2_25<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 12/19** 

**STD16N65M5 DPAK (TO-252) type C2 package information** 

**Table 9. DPAK (TO-252) type C2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20|2.30|2.38|
|A1|0.90|1.01|1.10|
|A2|0.00||0.10|
|b|0.72||0.85|
|b4|5.13|5.33|5.46|
|c|0.47||0.60|
|c2|0.47||0.60|
|D|6.00|6.10|6.20|
|D1|5.10||5.60|
|E|6.50|6.60|6.70|
|E1|5.20||5.50|
|e|2.186|2.286|2.386|
|H|9.80|10.10|10.40|
|L|1.40|1.50|1.70|
|L1|2.90 REF|||
|L2|0.90||1.25|
|L3|0.51 BSC|||
|L4|0.60|0.80|1.00|
|L6|1.80 BSC|||
|θ1|5°|7°|9°|
|θ2|5°|7°|9°|
|V2|0°||8°|



**DS7011** - **Rev 3** 

**page 13/19** 

**STD16N65M5 DPAK (TO-252) type C2 package information** 

**Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [111 x 196] intentionally omitted <==**

FP_0068772_25 

**DS7011** - **Rev 3** 

**page 14/19** 

**STD16N65M5 DPAK (TO-252) packing information** ~~To~~ 

## **4.3** 

## **DPAK (TO-252) packing information** 

## **Figure 23. DPAK (TO-252) tape outline** 

**==> picture [398 x 316] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>B1 J) K0 B0 paeg e s W<br>I<br>f f  PEREllos oe oes:<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>User direction of feed<br>R<br>—— Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


**DS7011** - **Rev 3** 

**page 15/19** 

**STD16N65M5 DPAK (TO-252) packing information** 

**Figure 24. DPAK (TO-252) reel outline** 

**==> picture [409 x 233] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D<br>C<br>N<br>A<br>Tape slot  G measured<br>in core for  at hub<br>Full radius  tape start<br>2.5mm min.width<br>**----- End of picture text -----**<br>


AM06038v1 

**Table 10. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



**DS7011** - **Rev 3** 

**page 16/19** 

**STD16N65M5** 

## **Revision history** 

## **Table 11. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|09-Nov-2010|1|First release.|
|14-Oct-2011|2|Modified_Section 2.1: Electrical characteristics (curves)_:<br>–_Figure 6, Figure 7, Figure 8, Figure 9, Figure 13_and_Figure 14_<br>– Added_Figure 15_<br>Updated RDS(on)value in coverpage and in_Table 4_<br>Updated values in_Table 6_<br>Updated Section 4: Package mechanical data and_Section 5:_<br>_Packaging mechanical data_.<br>Minor text changes.|
|20-Nov-2018|3|Removed maturity status indication from cover page. The document status is production data.<br>The part number STB16N65M5 has been moved to a separate datasheet.<br>UpdatedSection 4 Package information.<br>Minor text changes.|



**DS7011** - **Rev 3** 

**page 17/19** 

**STD16N65M5 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**||
||**2.1**|Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test**|**circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9**||
||**4.1**|DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9|
||**4.2**|DPAK (TO-252) type C2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
||**4.3**|DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14|
|**Revision**||**history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17**|



**DS7011** - **Rev 3** 

**page 18/19** 

**STD16N65M5** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2018 STMicroelectronics – All rights reserved 

**DS7011** - **Rev 3** 

**page 19/19** 



## Links

- [View this product on Novapart](https://novapart.co/products/STD16N65M5/power-mosfet-n-channel-650-v-12-a-023-ohm-to-252)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/std16n65m5/mosfet-n-ch-650v-12a-dpak/dp/2098162)
---

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