# Power MOSFET, N Channel, 600 V, 12 A, 0.28 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2807238/)

**URL**: https://novapart.co/products/STD16N60M2/power-mosfet-n-channel-600-v-12-a-028-ohm-to-252
**SKU**: STD16N60M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.6340
**Stock**: 1000+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:12A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.28ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M2 |
| Qualification | - |
| Power Dissipation | 110W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 12A |
| Drain Source On State Resistance | 0.28ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2807238/)

## **STD16N60M2** 

## N-channel 600 V, 0.280 Ω typ., 12 A MDmesh™ M2 Power MOSFET in a DPAK package 

Datasheet - production data 

## **Features** 

|**Order code**|**VDS**|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STD16N60M2|600 V|0.320 Ω|12 A|



- Extremely low gate charge 

- Excellent output capacitance (COSS) profile 

- • 100% avalanche tested 

- Zener-protected 

**Figure 1: Internal schematic diagram** 

## **Applications** 

D(2, TAB) • Switching applications **Description** This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. G(1) Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. S(3) AM15572v1_tab **Table 1: Device summary Order code Marking Package Packing** ~~+~~ STD16N60M2 16N60M2 DPAK Tape and reel ~~+~~ 

This is information on a product in full production. 

_www.st.com_ 

March 2015 

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|**Contents**<br>**STD16N60M2**|**Contents**<br>**STD16N60M2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package mechanical data ............................................................... 9**|
||4.1<br>DPAK (TO-252) type A2 package information................................. 10|
||4.2<br>Packing information ......................................................................... 13|
|**5**|**Revision history ............................................................................ 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 25|V|
|ID|Drain current (continuous) at TC= 25 °C|12|A|
|ID|Drain current (continuous) at TC= 100 °C|7.6|A|
|IDM<br>_(1)_|Drain current (pulsed)|48|A|
|PTOT|Total dissipation at TC= 25 °C|110|W|
|dv/dt_(2)_|Peak diode recoveryvoltage slope|15|V/ns|
|dv/dt_(3)_|MOSFET dv/dt ruggedness|50|V/ns|
|Tstg|Storage temperature|- 55 to 150|°C|
|Tj|Max. operating junction temperature|150||



## **Notes:** 

(1) Pulse width limited by safe operating area. 

- (2) ISD ≤ 12 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS. 

- (3) VDS ≤ 480 V. 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case max.|1.14|°C/W|
|Rthj-pcb<br>_(1)_|Thermal resistancejunction-pcb max.|50|°C/W|



## **Notes:** 

- (1) When mounted on a 1-inch² FR-4, 2 oz Cu board 

**Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetetive or not repetetive<br>(pulse width limited byTjmax)|2.9|A|
|EAS|Single pulse avalanche energy (starting<br>Tj= 25 °C, ID= IAR, VDD= 50 V)|130|mJ|



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**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified). 

**Table 5: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|**Drain-source breakdown**<br>**voltage**|VGS= 0 V, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 600 V|||1|µA|
|||VGS= 0 V, VDS= 600 V,<br>TC= 125 °C|||100|µA|
|IGSS|Gate-body leakage current|VDS= 0 V, VGS= ±25 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2|3|4|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 6 A||0.280|0.320|Ω|



**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|700|-|pF|
|Coss|Output capacitance||-|38|-|pF|
|Crss|Reverse transfer<br>capacitance||-|1.2|-|pF|
|Coss eq.<br>_(1)_|Equivalent output<br>capacitance|VDS= 0 V to 480 V,<br>VGS= 0 V|-|140|-|pF|
|RG|Intrinsicgate resistance|f = 1 MHz open drain|-|5.3|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 12 A,<br>VGS= 10 V (see_Figure 15:_<br>_"Gate charge test circuit"_)|-|19|-|nC|
|Qgs|Gate-source charge||-|3.3|-|nC|
|Qgd|Gate-drain charge||-|9.5|-|nC|



## **Notes:** 

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

**Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 6 A<br>RG= 4.7 Ω, VGS= 10 V<br>(see_Figure 14: "Switching_<br>_times test circuit for_<br>_resistive load"_and_Figure_<br>_19: "Switching time_<br>_waveform"_)|-|10.5|-|ns|
|tr|Rise time||-|9.5|-|ns|
|td(off)|Turn-off delaytime||-|58|-|ns|
|tf|Fall time||-|18.5|-|ns|



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**Electrical characteristics** 

**Table 8: Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||12|A|
|ISDM<br>_(1)_|Source-drain current<br>(pulsed)||-||48|A|
|VSD<br>_(2)_|Forward on voltage|VGS= 0 V, ISD= 12 A|-||1.6|V|
|trr|Reverse recoverytime|ISD= 12 A,<br>di/dt = 100 A/µs,<br>VDD= 60 V (see_Figure 16:_<br>_"Test circuit for inductive_<br>_load switching and diode_<br>_recovery times"_)|-|316||ns|
|Qrr|Reverse recoverycharge||-|3.25||µC|
|IRRM|Reverse recovery current||-|20.5||A|
|trr|Reverse recoverytime|ISD= 12 A,<br>di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C<br>(see_Figure 16: "Test_<br>_circuit for inductive load_<br>_switching and diode_<br>_recovery times"_)|-|454||ns|
|Qrr|Reverse recoverycharge||-|4.8||µC|
|IRRM|Reverse recovery current||-|21||A|



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. 

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**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [165 x 147] intentionally omitted <==**

**==> picture [148 x 158] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 3: Thermal impedance<br>GC20460<br>K<br>10 [0]<br>δ = 0.5<br>δ = 0.2<br>δ = 0.1 Zth = KRthj-c<br>δ = t /  Ƭ<br>10 [-1] p<br>δ = 0.05<br>δ = 0.02<br>δ = 0.01 t p Ƭ<br>SINGLE PULSE<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [2] 10 [1] Tp(s)<br>**----- End of picture text -----**<br>


**Figure 4: Output characteristics** 

**==> picture [150 x 143] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [157 x 143] intentionally omitted <==**

**==> picture [406 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6: Normalized gate threshold voltage  Figure 7: Normalized V(BR)DSS vs.<br>vs. temperature  temperature<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [404 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9: Normalized on-resistance vs.<br>Figure 8: Static drain-source on-resistance<br>temperature<br>**----- End of picture text -----**<br>


**Figure 10: Gate charge vs. gate-source Figure 11: Capacitance variations voltage** 

**==> picture [159 x 143] intentionally omitted <==**

**==> picture [157 x 146] intentionally omitted <==**

**Figure 13: Source- drain diode forward Figure 12: Output capacitance stored energy characteristics** 

**==> picture [159 x 142] intentionally omitted <==**

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**Test circuits** 

## **3 Test circuits** 

**Figure 14: Switching times test circuit for resistive load** 

**==> picture [215 x 94] intentionally omitted <==**

**Figure 15: Gate charge test circuit** 

**==> picture [224 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12 V 47 kΩ<br>1 kΩ<br>100 nF<br>I G = CONST<br>Vi ≤ V GS 100 Ω D.U.T.<br>2.7 k Ω VG<br>2200 μ F<br>47 kΩ<br>1 kΩ<br>PW<br>AM01469v1<br>**----- End of picture text -----**<br>


**Figure 16: Test circuit for inductive load switching and diode recovery times** 

**==> picture [221 x 130] intentionally omitted <==**

**----- Start of picture text -----**<br>
A A A<br>D<br>FAST L=100 µH<br>G D.U.T. DIODE<br>S B 3.3 1000<br>25 Ω B B D µF µF VDD<br>G D.U.T.<br>RG S<br>AM01470v1<br>**----- End of picture text -----**<br>


**Figure 17: Unclamped inductive load test circuit** 

**==> picture [216 x 152] intentionally omitted <==**

**==> picture [460 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 19: Switching time waveform<br>Figure 18: Unclamped inductive waveform<br>V t on toff<br>(BR)DSS<br>t d(on) t r t d(off) t f<br>VD<br>90% 90%<br>I DM<br>10%<br>I D 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

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**Package mechanical** data 

## **4.1 DPAK (TO-252) type A2 package information** 

**Figure 20: DPAK (TO-252) type A2 package outline** 

**==> picture [407 x 551] intentionally omitted <==**

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**STD16N60M2 Package mechanical** data 

|**M2**|**Package mechanical** data|**Package mechanical** data|**Package mechanical** data|
|---|---|---|---|
||**Table 9: DPAK(TO-252) type A2 mechanical data**|||
|**Dim.**||**mm**||
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.16|2.28|2.40|
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



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**Package mechanical** data 

**Figure 21: DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [329 x 281] intentionally omitted <==**

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**Package mechanical** data 

**==> picture [459 x 366] intentionally omitted <==**

**----- Start of picture text -----**<br>
4.2  Packing information<br>Figure 22: Tape for DPAK (TO-252)<br>10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>K0 W<br>B1 B0<br>P asialniatalct<br>For machineref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>User direction of feed<br>R<br>Zz<br>Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


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**Package mechanical** data 

**Figure 23: Reel for DPAK (TO-252)** 

**==> picture [406 x 258] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D C<br>N<br>A<br>Tape slot G measured<br>in core for at hub<br>Full radius tape start<br>2.5mm min.width<br>AM06038v1<br>**----- End of picture text -----**<br>


**Table 10: DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|||**Reel**||
|---|---|---|---|---|---|
|**Dim.**|**m**|**m**|**Dim.**|**m**|**m**|
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Baseqty.||2500|
|P1|7.9|8.1|Bulkqty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



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**Revision history** 

## **5 Revision history** 

**Table 11: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|26-Nov-2014|1|First release.|
|24-Mar-2015|2|Text edits throughout document<br>On cover page: updated cover page title description, updated<br>features table.<br>In Section 1, Electrical ratings: updated "Avalanche characteristics"<br>table<br>In Section 2, Electrical characteristics: renamed "On/off states" table<br>to "Static" and updated table<br>In Section 2, Electrical characteristics: updated tables "Dynamic",<br>"Switching times" and "Source-drain diode"<br>Added Section 2.1, Electrical characteristics (curves)<br>Updated 4.1, DPAK (TO-252) type A2 package information|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2015 STMicroelectronics – All rights reserved 

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