# Power MOSFET, N Channel, 600 V, 9 A, 0.39 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3678961RL/)

**URL**: https://novapart.co/products/STD12N60M6/power-mosfet-n-channel-600-v-9-a-039-ohm-to-252
**SKU**: STD12N60M6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.0800
**Stock**: 200+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M6 |
| Qualification | - |
| Power Dissipation | 96W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 96W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.39ohm |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 9A |
| Drain Source On State Resistance | 0.39ohm |
| Automotive Qualification Standard | - |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3678961RL/)

**STD12N60M6** 

## Datasheet 

N-channel 600 V, 390 mΩ typ., 9 A, MDmesh M6 Power MOSFET in a DPAK package 

## **Features** 

**==> picture [106 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>2 3<br>1<br>DPAK<br>D(2, TAB)<br>G(1)<br>S(3) AM01475V1<br>**----- End of picture text -----**<br>


|**Order code**|**VDS**|**RDS(on) max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STD12N60M6|600 V|450 mΩ|9 A|96 W|
|•<br>Reduced switching losses|||||



- Lower RDS(on) per area vs previous generation 

- Low gate input resistance 

- 100% avalanche tested 

- Zener-protected 

## **Applications** 

- Switching applications 

- LLC converters 

- Boost PFC converters 

## **Description** 

The new MDmesh M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent RDS(on) per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency. 

**==> picture [38 x 34] intentionally omitted <==**

## **Product status link** 

STD12N60M6 

|**Product summary**|**Product summary**|
|---|---|
|**Order code**|STD12N60M6|
|**Marking**|12N60M6|
|**Package**|DPAK|
|**Packing**|Tape and reel|



**DS13291** - **Rev 1** - **April 2020** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**STD12N60M6 Electrical ratings** 

**1** 

## **Electrical ratings** 

## **Table 1. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at Tcase= 25 °C|9|A|
||Drain current (continuous) at Tcase= 100 °C|6||
|IDM(1)|Drain current (pulsed)|24|A|
|PTOT|Total power dissipation at Tcase= 25 °C|96|W|
|IAR(2)|Avalanche current, repetitive or not repetitive|1.8|A|
|EAS(3)|Single pulse avalanche energy|130|mJ|
|dv/dt(4)|Peak diode recovery voltage slope|15|V/ns|
|dv/dt(5)|MOSFET dv/dt ruggedness|100||
|Tstg|Storage temperature range|-55 to 150|°C|
|Tj|Operating junction temperature range|||



_1. Pulse width is limited by safe operating area._ 

_2. Pulse width limited by Tjmax._ 

_3. Starting Tj = 25 °C, ID = IAR, VDD = 50 V._ 

_4. ISD ≤ 9 A, di/dt = 400 A/μs, VDS(peak) < V(BR)DSS, VDD = 400 V_ 

_5. VDS ≤ 480 V_ 

## **Table 2. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case|1.3|°C/W|
|Rthj-pcb(1)|Thermal resistance junction-pcb|50||



_1. When mounted on an 1-inch² FR-4, 2 Oz copper board._ 

**DS13291** - **Rev 1** 

**page 2/15** 

**STD12N60M6 Electrical characteristics** 

**2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 3. Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|VGS= 0 V, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage drain current|VGS= 0 V, VDS= 600 V|||1|µA|
|||VGS= 0 V, VDS= 600 V,<br>Tcase= 125 °C(1)|||100||
|IGSS|Gate-body leakage current|VDS= 0 V, VGS= ±25 V|||±5|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3.25|4|4.75|V|
|RDS(on)|Static drain-source on-resistance|VGS= 10 V, ID= 4.5 A||390|450|mΩ|



_1. Defined by design, not subject to production test._ 

**Table 4. Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz, VGS= 0 V|-|452|-|pF|
|Coss|Output capacitance||-|39|-||
|Crss|Reverse transfer capacitance||-|4.5|-||
|Coss eq.(1)|Equivalent output capacitance|VDS= 0 to 480 V, VGS= 0 V|-|85|-|pF|
|RG|Intrinsic gate resistance|f = 1 MHz, ID= 0 A|-|6|-|Ω|
|Qg|Total gate charge|VDD= 480 V, ID= 9 A,<br>VGS= 0 to 10 V<br>(seeFigure 14. Test circuit for gate<br>charge behavior)|-|12.3|-|nC|
|Qgs|Gate-source charge||-|3|-||
|Qgd|Gate-drain charge||-|6.5|-||



_1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS._ 

**Table 5. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 300 V, ID= 4.5 A,<br>RG= 4.7 Ω, VGS= 10 V<br>(seeFigure 13. Test circuit for<br>resistive load switching timesand<br>Figure 18. Switching time<br>waveform)|-|16.6|-|ns|
|tr|Rise time||-|6.4|-||
|td(off)|Turn-off delay time||-|23.9|-||
|tf|Fall time||-|9.9|-||



**DS13291** - **Rev 1** 

**page 3/15** 

**STD12N60M6 Electrical characteristics** 

## **Table 6. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||9|A|
|ISDM (1)|Source-drain current (pulsed)||-||24|A|
|VSD(2)|Forward on voltage|VGS= 0 V, ISD= 9 A|-||1.6|V|
|trr|Reverse recovery time|ISD= 9 A, di/dt = 100 A/µs,<br>VDD= 60 V<br>(seeFigure 15. Test circuit for<br>inductive load switching and diode<br>recovery times)|-|174||ns|
|Qrr|Reverse recovery charge||-|1.27||µC|
|IRRM|Reverse recovery current||-|14.6||A|
|trr|Reverse recovery time|ISD= 9 A, di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C<br>(seeFigure 15. Test circuit for<br>inductive load switching and diode<br>recovery times)|-|241||ns|
|Qrr|Reverse recovery charge||-|1.9||µC|
|IRRM|Reverse recovery current||-|15.6||A|



_1. Pulse width is limited by safe operating area._ 

_2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%._ 

**DS13291** - **Rev 1** 

**page 4/15** 

**STD12N60M6 Electrical characteristics (curves)** 

## **2.1 Electrical characteristics (curves)** 

**Figure 1. Safe operating area** 

**==> picture [188 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID GADG260320201609SOA<br>(A)<br>ae IDM<br>Ra Eee<br>tp =1 µs<br>10  [1 ] SERTTA TCSAU<br>tp =10 µs<br>V(BR)DSS<br>Lr cil R D S(on)  ete  max. tp =100 µs<br>10  [0 ] ‘a Nl<br>-\\| TC = 25 °C tp =1 ms<br>yAAaVA VTGSJ ≤ 150 °C=10 V can\ tp =10 ms<br>10  [-1 ] single pulse II<br>10  AAT [-1 ] 10  [0 ] 10  [1 ] A 10  [2 ] VDS (V)<br>DS(on)<br>Operation in this area<br>is limited by R<br>**----- End of picture text -----**<br>


**Figure 2. Maximum transient thermal impedance** 

**==> picture [170 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
Zthj-c GADG260320201610ZTH<br>(°C/W)<br>Sees eie eesti cena email cena<br>erate<br>duty<br>4<br>10 [0] HHBNS010 3 a<br>Sailliemtn ape altima<br>10 [-1] ee<br>Rthj-c = 1.3  °C/W<br>co ai<br>FriseBi ctl iMot<br>I<br>s<br>10 [-2] Wiatlitern |<br>10 ia [-6] 10 tecal [-5] 10 [-4] a 10 [-3] je tp (s)<br>**----- End of picture text -----**<br>


**Figure 3. Typical output characteristics** 

**==> picture [181 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID GIPG131220181132OCH<br>(A)<br>24 LETT TTT TTT TT ET VGS = 10 V Ty TT VGS = 9 V<br>20 LITTPOSETT TL eeree VGS = 8 V<br>16 i ae<br>PSEA EHH<br>12 LIT TIA TT VGS = 7 V<br>LITT Arr | TT<br>8<br>4 Pere VGS = 6 V<br>fo<br>[fete yt TT<br>0 VGS = 5 V<br>0 VEL 2 iT 4 TT 6 Tee 8 10 12 eee 14 16 18 VDS (V)<br>**----- End of picture text -----**<br>


**Figure 4. Typical transfer characteristics** 

**==> picture [169 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID GIPG131220181133TCH<br>(A)<br>24 HE VDS =20 V<br>PEPE<br>20 LTT TT ETT ETT Ty Y e ryTT<br>16 LTT TT ETT ETT TT AT TT<br>PEECEEEEEEE ETE<br>12 LTT TT ETT ETT TT YT<br>LTT TT ETT ETT TA TT TT<br>8<br>4 /<br>linia Anil<br>LTT TT ETT TAT TT yy TT<br>0<br>1 LPP 2 3 4 ey 5 6 7 8 TT 9 VGS (V)<br>**----- End of picture text -----**<br>


**Figure 5. Typical gate charge characteristics** 

**Figure 6. Typical drain-source on-resistance** 

**==> picture [423 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
(V)VDS VIDDD = 9 A = 480 VGADG230320201125QVGV(V)GS (mΩ)RDS(on) GADG260320201616RID<br>600 12<br>Hse Qg dE 420<br>500 10<br>VDS 410<br>VGS =10 V<br>400 pS Q gs Q gd / 8 PPP yr<br>Stee CH 400 PEPE<br>300 6<br>PN PrP PTA<br>390<br>200 HEHEHE 4 PPT rr<br>100 2 380<br>Fassccuecss CE E EE<br>Pies snnet nn iaue MRE E E<br>0 0 370<br>0 Viti 2 4 i NEP 6 8 epe 10 12 14 Qg (nC) 0 PP 2 ET 4 ET 6 Et 8 ID (A)<br>**----- End of picture text -----**<br>


**DS13291** - **Rev 1** 

**page 5/15** 

**STD12N60M6 Electrical characteristics (curves)** 

**==> picture [513 x 181] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 7. Typical capacitance characteristics Figure 8. Typical output capacitance stored energy<br>C  GIPG131220181130CVR EOSS ADG131220181241EOS<br>(pF)  (µJ)<br>4<br>10  [3 ]<br>CISS<br>3<br>10  [2 ]<br>2<br>f = 1 MHz COSS<br>10  [1 ]<br>CRSS 1<br>10  [0 ] 0<br>10  [-1 ] 10  [0 ] 10  [1 ] 10  [2 ] VDS (V) 0 100 200 300 400 500 VDS (V)<br>**----- End of picture text -----**<br>


**==> picture [513 x 192] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 9. Normalized gate threshold voltage vs<br>Figure 10. Normalized on-resistance vs temperature<br>temperature<br>VGS(th) GIPG131220181031VTH (norm.) RDS(on) GIPG131220181123RON<br>(norm.)<br>VGS = 10 V<br>ID = 250 μA 2.2<br>1.1<br>1.8<br>1.0<br>1.4<br>0.9<br>1.0<br>0.8<br>0.6<br>0.7<br>0.2<br>0.6 -75 -25 25 75 125 TJ (°C)<br>-75 -25 25 75 125 TJ (°C)<br>**----- End of picture text -----**<br>


**Figure 11. Normalized breakdown voltage vs temperature Figure 12. Typical reverse diode forward characteristics** 

**==> picture [435 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS GIPG131220181128BDV VSD GADG230320201128SDF<br>(norm.)  (V)<br>ID = 1 mA 1.1<br>1.08 Tj = -50 °C<br>1.0<br>1.04<br>Tj = 25 °C<br>0.9<br>1.00<br>0.8<br>0.96 0.7 Tj = 150 °C<br>0.92<br>0.6<br>0.88 0.5<br>-75 -25 25 75 125 TJ (°C) 0 2 4 6 8 ISD (A)<br>**----- End of picture text -----**<br>


**DS13291** - **Rev 1** 

**page 6/15** 

**STD12N60M6 Test circuits** 

**3 Test circuits** 

**==> picture [513 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13. Test circuit for resistive load switching times<br>Figure 14. Test circuit for gate charge behavior<br>VDD<br>RL<br>RL 2200 3.3<br>VD + μF μF VDD VGS IG= CONST 100 Ω D.U.T.<br>pulse width +<br>VGS RG D.U.T. 2200 2.7 kΩ VG<br>pulse width μF<br>47 kΩ<br>1 kΩ<br>AM01469v10<br>AM01468v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 189] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15. Test circuit for inductive load switching and<br>Figure 16. Unclamped inductive load test circuit<br>diode recovery times<br>A A A L<br>G D D.U.T. fastdiode 100 µH VD 2200 3.3<br>25 Ω S B B B D µF3.3 + 1000µF VDD ID + µF µF VDD<br>G D.U.T.<br>+ RG S Vi D.U.T.<br>_ pulse width<br>AM01471v1<br>AM01470v1<br>**----- End of picture text -----**<br>


**==> picture [513 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 18. Switching time waveform<br>Figure 17. Unclamped inductive waveform<br>ton toff<br>V(BR)DSS td(on) tr td(off) tf<br>VD<br>90% 90%<br>IDM<br>10% VDS 10%<br>ID 0<br>VDD VDD<br>VGS 90%<br>AM01472v1 0 10%<br>AM01473v1<br>**----- End of picture text -----**<br>


**DS13291** - **Rev 1** 

**page 7/15** 

**STD12N60M6 Package information** 

**4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 

## **4.1 DPAK (TO-252) type A2 package information** 

## **Figure 19. DPAK (TO-252) type A2 package outline** 

**==> picture [52 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
0068772_type-A2_rev27<br>**----- End of picture text -----**<br>


**DS13291** - **Rev 1** 

**page 8/15** 

**STD12N60M6 DPAK (TO-252) type A2 package information** 

**Table 7. DPAK (TO-252) type A2 mechanical data** 

|**Di**|**mm**|**mm**|**mm**|
|---|---|---|---|
|**m.**|**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1|4.95|5.10|5.25|
|E|6.40||6.60|
|E1|5.10|5.20|5.30|
|e|2.159|2.286|2.413|
|e1|4.445|4.572|4.699|
|H|9.35||10.10|
|L|1.00||1.50|
|L1|2.60|2.80|3.00|
|L2|0.65|0.80|0.95|
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



**DS13291** - **Rev 1** 

**page 9/15** 

**STD12N60M6 DPAK (TO-252) type A2 package information** 

**Figure 20. DPAK (TO-252) recommended footprint (dimensions are in mm)** 

**==> picture [152 x 271] intentionally omitted <==**

**==> picture [45 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
FP_0068772_27<br>**----- End of picture text -----**<br>


**DS13291** - **Rev 1** 

**page 10/15** 

**STD12N60M6 DPAK (TO-252) packing information** ~~Go~~ 

## **4.2** 

## **DPAK (TO-252) packing information** 

## **Figure 21. DPAK (TO-252) tape outline** 

**==> picture [398 x 316] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>F<br>B1 J) K0 B0 paeg e s W<br>I<br>f f  PEREllos oe oes:<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0<br>User direction of feed<br>R<br>—— Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


**DS13291** - **Rev 1** 

**page 11/15** 

**STD12N60M6 DPAK (TO-252) packing information** 

**Figure 22. DPAK (TO-252) reel outline** 

**==> picture [409 x 233] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>40mm min.<br>access hole<br>at slot location<br>B<br>D<br>C<br>N<br>A<br>Tape slot  G measured<br>in core for  at hub<br>Full radius  tape start<br>2.5mm min.width<br>**----- End of picture text -----**<br>


AM06038v1 

**Table 8. DPAK (TO-252) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Di**|**mm**||**Di**|**mm**||
|**m.**|**Min.**|**Max.**|**m.**|**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



**DS13291** - **Rev 1** 

**page 12/15** 

**STD12N60M6** 

## **Revision history** 

**Table 9. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|01-Apr-2020|1|First release.|



**DS13291** - **Rev 1** 

**page 13/15** 

**STD12N60M6 Contents** 

## **Contents** 

|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|---|---|
|**2**|**Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
||**2.1**<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5|
|**3**|**Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7**|
|**4**|**Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8**|
||**4.1**<br>DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8|
||**4.2**<br>DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11|
|**Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13**||



**DS13291** - **Rev 1** 

**page 14/15** 

**STD12N60M6** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2020 STMicroelectronics – All rights reserved 

**DS13291** - **Rev 1** 

**page 15/15** 



## Links

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- [Supplier page](https://es.farnell.com/stmicroelectronics/std12n60m6/mosfet-n-ch-600v-9a-to-252/dp/3678961RL)
---

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