# Power MOSFET, N Channel, 80 V, 80 A, 5600 µohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3132718/)

**URL**: https://novapart.co/products/STD110N8F6/power-mosfet-n-channel-80-v-a-5600-ohm-to-252-dpak
**SKU**: STD110N8F6
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5450
**Stock**: 25+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:80A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.0056ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | STripFET F6 |
| Qualification | - |
| Power Dissipation | 167W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 80V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 80A |
| Drain Source On State Resistance | 5600µohm |
| Gate Source Threshold Voltage Max | 4.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3132718/)

## **STD110N8F6** 

N-channel 80 V, 0.0056 Ω typ.,80 A, STripFET™ F6 Power MOSFET in a DPAK package 

**Datasheet** - **production data** 

## **Features** 

|**Features**|||||
|---|---|---|---|---|
|**Order code**|**VDS**|**RDS(on)max**|**ID**|**PTOT**|
|STD110N8F6|80 V|0.0065Ω|80 A|167 W|



- Very low on-resistance 

- Very low gate charge 

- High avalanche ruggedness 

- Low gate drive power loss 

## **Applications** 

## **Figure 1. Internal schematic diagram** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STD110N8F6|110N8F6|DPAK|Tube|



_www.st.com_ 

December 2014 

DocID027274 Rev 1 

1/16 

This is information on a product in full production. 

**Contents** 

**STD110N8F6** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**|
|**4**|**Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**5**|**Packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|80|V|
|VGS|Gate-source voltage|±20|V|
|ID|Drain current (continuous) at TC= 25 °C|80|A|
|ID|Drain current (continuous) at TC= 100 °C|72|A|
|IDM<br>(1)|Drain current (pulsed)|320|A|
|PTOT|Total dissipation at TC= 25 °C|167|W|
|EAS<br>(2)|Single pulse avalanche energy|180|mJ|
|TJ|Operating junction temperature|-55 to 175|°C|
|Tstg|Storage temperature||°C|



1. Pulse width is limited by safe operating area 

2. Starting TJ = 25 °C, ID = 55 A, VDD = 60 V 

**Table 3. Thermal data** 

||**Table 3. Thermal data**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|Rthj-case|Thermal resistance junction-case max.|0.9|°C/W|
|Rthj-pcb<br>(1)|Thermal resistance junction-pcb max.|50|°C/W|



1. When mounted on 1 inch² FR-4, 2 Oz copper board. 

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**STD110N8F6** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 4. On/off-state** 

|||**Table 4. On/off-state**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage|VGS= 0, ID= 1 mA|80|||V|
|IDSS|Zero-gate voltage<br>drain current|VGS= 0, VDS= 80 V|||1|µA|
|||VGS= 0, VDS= 80 V,<br>TC= 125 °C|||100|µA|
|IGSS|Gate-body leakage<br>current|VDS= 0, VGS= +20 V|||100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|2.5||4.5|V|
|RDS(on)|Static drain-source<br>on- resistance|VGS= 10 V, ID= 40 A||0.0056|0.0065|Ω|



**Table 5. Dynamic** 

|||**Table 5. Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 40 V, f = 1 MHz,<br>VGS= 0|-|9130|-|pF|
|Coss|Output capacitance||-|320|-|pF|
|Crss|Reverse transfer<br>capacitance||-|225|-|pF|
|Qg|Total gate charge|VDD= 40 V, ID= 80 A,<br>VGS= 10 V<br>(see_Figure 14_)|-|150|-|nC|
|Qgs|Gate-source charge||-|40|-|nC|
|Qgd|Gate-drain charge||-|30|-|nC|



**Table 6. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delay time|VDD= 40 V, ID= 55 A,<br>RG= 4.7Ω,VGS= 10 V<br>(see_Figure 13_)|-|24|-|ns|
|tr|Rise time||-|61|-|ns|
|td(off)|Turn-off delay time||-|162|-|ns|
|tf|Fall time||-|48|-|ns|



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**Electrical characteristics** 

**Table 7. Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VSD<br>(1)|Forward on voltage|ISD= 80 A, VGS= 0|-||1.2|V|
|trr|Reverse recovery time|ISD= 80 A, di/dt = 100 A/µs<br>VDD= 64 V (see_Figure 15_)|-|30||ns|
|Qrr|Reverse recovery charge||-|34||nC|
|IRRM|Reverse recovery current||-|2.3||A|



1. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**STD110N8F6** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2. Safe operating area** 

**Figure 3. Thermal impedance** 

**Figure 4. Output characteristics** 

**Figure 5. Transfer characteristics** 

**Figure 6. Gate charge vs gate-source** 

**Figure 7. Static drain-source on-resistance** 

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**Electrical characteristics** 

**Figure 8. Capacitance variations** 

**Figure 10. Normalized on-resistance** 

**Figure 9. Normalized gate threshold voltage vs temperature** 

**Figure 11. Normalized V(BR)DSS vs temperature** 

**Figure 12. Drain-source diode forward characteristics** 

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**Test circuits** 

## **3 Test circuits** 

**Figure 13. Switching times test circuit for resistive load** 

**Figure 14. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 346] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform<br>V(BR)DSS ton toff<br>VD tdon tr tdoff tf<br>90% 90%<br>IDM<br>10%<br>ID 0 10% VDS<br>VDD VDD 90%<br>VGS<br>AM01472v1 0 10% AM01473v1<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**Package information** 

## **Figure 19. DPAK (TO-252) type A drawing** 

**==> picture [405 x 558] intentionally omitted <==**

**----- Start of picture text -----**<br>
���������<br>**----- End of picture text -----**<br>


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**Package information** 

**Table 8. DPAK (TO-252) type A mechanical data** 

||**Table 8. DPAK(TO-252) type A mechanical data**|**Table 8. DPAK(TO-252) type A mechanical data**|**Table 8. DPAK(TO-252) type A mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|2.20||2.40|
|A1|0.90||1.10|
|A2|0.03||0.23|
|b|0.64||0.90|
|b4|5.20||5.40|
|c|0.45||0.60|
|c2|0.48||0.60|
|D|6.00||6.20|
|D1||5.10||
|E|6.40||6.60|
|E1||4.70||
|e||2.28||
|e1|4.40||4.60|
|H|9.35||10.10|
|L|1.00||1.50|
|L1||2.80||
|L2||0.80||
|L4|0.60||1.00|
|R||0.20||
|V2|0°||8°|



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**Package information** 

## **Figure 20. DPAK (TO-252) footprint[(a)]** 

**==> picture [405 x 350] intentionally omitted <==**

**----- Start of picture text -----**<br>
�����������<br>**----- End of picture text -----**<br>


- a. All dimensions are in millimeters 

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**Packing information** 

## **5 Packing information** 

## **Figure 21. Tape for DPAK (TO-252)** 

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**Packing information** 

## **Figure 22. Reel for DPAK (TO-252)** 

**Table 9. DPAK (TO-252) tape and reel mechanical data** 

|**Tape**|**Tape**|**Tape**|**Reel**|**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|6.8|7|A||330|
|B0|10.4|10.6|B|1.5||
|B1||12.1|C|12.8|13.2|
|D|1.5|1.6|D|20.2||
|D1|1.5||G|16.4|18.4|
|E|1.65|1.85|N|50||
|F|7.4|7.6|T||22.4|
|K0|2.55|2.75||||
|P0|3.9|4.1|Base qty.||2500|
|P1|7.9|8.1|Bulk qty.||2500|
|P2|1.9|2.1||||
|R|40|||||
|T|0.25|0.35||||
|W|15.7|16.3||||



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**Revision history** 

## **6 Revision history** 

**Table 10. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|15-Dec-2014|1|First release.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved 

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