# Power MOSFET, N Channel, 300 V, 53 A, 0.037 ohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3367007/)

**URL**: https://novapart.co/products/STB46N30M5/power-mosfet-n-channel-300-v-53-a-0037-ohm-to-263
**SKU**: STB46N30M5
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €4.2500
**Stock**: 500+
**Lead Time**: 113 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh V |
| Qualification | AEC-Q101 |
| Power Dissipation | 250W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 300V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 53A |
| Drain Source On State Resistance | 0.037ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3367007/)

## **STB46N30M5** 

Automotive-grade N-channel 300 V, 53 A, 0.037 Ω typ., MDmesh™ V Power MOSFET  in a D[2] PAK package 

**Datasheet** - **production data** 

## **Features** 

**==> picture [66 x 67] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>3<br>1<br>2<br>D PAK<br>**----- End of picture text -----**<br>


|**Order code**|**VDS**|**RDS(on) max.**|**ID**|
|---|---|---|---|
|STB46N30M5|300 V|0.04Ω|53 A|



- Designed for automotive applications and AEC-Q101 qualified 

- Amongst the best RDS(on) * area 

- High dv/dt capability 

- Excellent switching performance 

- Easy to drive 

- 100% avalanche tested 

## **Figure 1.  Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known 

PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. 

**Table 1. Device summary** 

|**Order code**|**Marking**|**Packages**|**Packaging**|
|---|---|---|---|
|STB46N30M5|46N30M5|D2PAK|Tape and reel|



_www.st.com_ 

April 2014 

DocID026126 Rev 2 

1/17 

This is information on a product in full production. 

**Contents** 

**STB46N30M5** 

|**Contents**|**Contents**|
|---|---|
|**1**|**Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3**|
|**2**|**Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4**|
||2.1<br>Electrical characteristics (curves)         . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6|
|**3**|**Test circuits     . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9**|
|**4**|**Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10**|
|**5**|**Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14**|
|**6**|**Revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2. Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|± 25|V|
|ID|Drain current (continuous) at TC= 25 °C|53|A|
|ID|Drain current (continuous) at TC= 100 °C|34|A|
|IDM<br>(1)|Drain current (pulsed)|212|A|
|PTOT|Total dissipation at TC= 25 °C|250|W|
|dv/dt(2)|Peak diode recovery voltage slope|15|V/ns|
|Tstg|Storage temperature|- 55 to 150|°C|
|Tj|Max. operating junction temperature|150|°C|



1. Pulse width limited by safe operating area 

2. ISD ≤ 53 A, di/dt ≤ 400 A/µs, VDS(peak) < V(BR)DSS, VDD=240 V 

**Table 3. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistance junction-case max|0.5|°C/W|
|Rthj-pcb<br>(1)|Thermal resistance junction-pcb max|30|°C/W|



1. When mounted on 1 inch² FR-4, 2 Oz copper board 

**Table 4. Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR|Avalanche current, repetitive or not-<br>repetitive (pulse width limited by Tjmax)|16|A|
|EAS|Single pulse avalanche energy<br>(starting Tj= 25°C, ID= IAR, VDD= 50 V)|550|mJ|



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**STB46N30M5** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified). 

**Table 5. On /off states** 

|||**Table 5. On /off states**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|V(BR)DSS|Drain-source<br>breakdown voltage<br>(VGS= 0)|ID= 1 mA|300|||V|
|IDSS|Zero gate voltage<br>drain current (VGS= 0)|VDS= 300 V|||1|µA|
|||VDS= 300 V, TC=125 °C|||100|µA|
|IGSS|Gate-body leakage<br>current (VDS= 0)|VGS= ± 25 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250 µA|3|4|5|V|
|RDS(on)|Static drain-source<br>on-resistance|VGS= 10 V, ID= 26.5 A||0.037|0.04|Ω|



**Table 6. Dynamic** 

|||**Table 6. Dynamic**|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0|-|4240|-|pF|
|Coss|Output capacitance||-|205|-|pF|
|Crss|Reverse transfer<br>capacitance||-|9.5|-|pF|
|Co(tr)<br>(1)|Equivalent<br>capacitance time<br>related|VDS= 0 to 240 V, VGS= 0|-|373|-|pF|
|Co(er)<br>(2)|Equivalent<br>capacitance energy<br>related||-|202|-|pF|
|Rg|Gate input resistance|f = 1 MHz, gate DC<br>Bias = 0,<br>test signal level = 20 mV,<br>ID= 0|-|1.4|-|Ω|
|Qg|Total gate charge|VDD= 240 V, ID= 24 A,<br>VGS= 10 V<br>(see_Figure 16_)|-|95|-|nC|
|Qgs|Gate-source charge||-|23|-|nC|
|Qgd|Gate-drain charge||-|37|-|nC|



1. Co(tr) is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS. 

2. Co(er) is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS. 

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**Electrical characteristics** 

**Table 7. Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|td(v)|Voltage delay time|VDD= 240 V, ID= 32 A,<br>RG= 4.7Ω,VGS= 10 V<br>(see_Figure 15_)|-|66|-|ns|
|tr(v)|Voltage rise time||-|15|-|ns|
|tf(i)|Current fall time||-|24|-|ns|
|tc(off)|Crossing time||-|22.5|-|ns|



**Table 8. Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||53|A|
|ISDM (1)|Source-drain current (pulsed)||-||212|A|
|VSD (2)|Forward on voltage|ISD= 53 A, VGS= 0|-||1.5|V|
|trr|Reverse recovery time|ISD= 48 A, di/dt = 100 A/µs<br>VDD= 60 V (see_Figure 20_)|-|223||ns|
|Qrr|Reverse recovery charge||-|2.5||μC|
|IRRM|Reverse recovery current||-|23||A|
|trr|Reverse recovery time|ISD= 48 A, di/dt = 100 A/µs<br>VDD= 60 V, Tj= 150 °C<br>(see_Figure 20_)|-|280||ns|
|Qrr|Reverse recovery charge||-|3.9||μC|
|IRRM|Reverse recovery current||-|28||A|



1. Pulse width limited by safe operating area 

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 

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**STB46N30M5** 

**Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2. Safe operating area** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
ID AM18133v1<br>(A)<br>100<br>10µs<br>100µs<br>10 1ms<br>10ms<br>1<br>Tj=150°C<br>Tc=25°C<br>Single pulse<br>0.1<br>0.1 1 10 100 VDS(V)<br>DS(on)<br>Operation in this area is<br>Limited by max R<br>**----- End of picture text -----**<br>


**Figure 4. Output characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM18134v1<br>ID(A)<br>VGS=10V<br>140<br>9V<br>8V<br>120<br>100<br>80<br>7V<br>60<br>40<br>20<br>6V<br>0<br>0 5 10 15 20 VDS(V)<br>**----- End of picture text -----**<br>


**Figure 6. Gate charge vs gate-source voltage** 

**==> picture [228 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
VGS AM18136v1 VDS<br>(V) (V)<br>VDD=240V<br>12<br>VDS ID=24A 250<br>10<br>200<br>8<br>150<br>6<br>100<br>4<br>50<br>2<br>0 0<br>0 20 40 60 80 100 Qg(nC)<br>**----- End of picture text -----**<br>


## **Figure 3. Thermal impedance** 

**==> picture [173 x 167] intentionally omitted <==**

## **Figure 5. Transfer characteristics** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM18135v1<br>ID<br>(A)<br>VDS=25V<br>140<br>120<br>100<br>80<br>60<br>40<br>20<br>0<br>3 4 5 6 7 8 9 VGS(V)<br>**----- End of picture text -----**<br>


**Figure 7. Static drain-source on-resistance** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM18137v1<br>RDS(on)<br>(Ω)<br>VGS=10V<br>0.04<br>0.038<br>0.036<br>0.034<br>0.032<br>0.03<br>0 10 20 30 40 50 ID(A)<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**==> picture [459 x 221] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 8. Capacitance variations Figure 9. Output capacitance stored energy<br>C AM18138v1 Eoss AM18139v1<br>(pF) (µJ)<br>10<br>10000<br>Ciss<br>8<br>1000<br>6<br>Coss<br>100<br>4<br>10 Crss<br>2<br>1 0<br>BS] 0.1 1 10 100 VDS(V) 0 50 100 150 200 250 300 VDS(V)<br>Figure 10. Normalized gate threshold voltage vs  Figure 11. Normalized on-resistance vs<br>temperature temperature<br>**----- End of picture text -----**<br>


**Figure 12. Normalized V(BR)DSS vs temperature** 

**Figure 13. Source-drain diode forward characteristics** 

**==> picture [415 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS AM10399v1<br>(norm)<br>1.08 TTTIIIT<br>ID = 1mA<br>1.06<br>ptf ttYA esbhLoo<br>1.04<br>pe e mc”<br>1.02<br>| fe<br>1.00 PEE YET eZ0.8 |oe<br>0.98<br>0.96<br>a “TLL<br>0.94 PEEALLELE | 02 Sere<br>0.92 4 nnm iit<br>-50 -25 0 25 50 75 100 TJ(°C) 0) 10 20 30| ft40 ~ ft50<br>**----- End of picture text -----**<br>


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**Electrical characteristics** 

**Figure 14. Switching losses vs gate resistance[(1)]** 

**==> picture [228 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM18140v1<br>E(µJ)<br>Eon<br>VDD=240V<br>VGS=10V<br>1000<br>ID=32A<br>800<br>600<br>Eoff<br>400<br>200<br>0<br>0 10 20 30 40 RG(Ω)<br>**----- End of picture text -----**<br>


1. Eon including reverse recovery of a SiC diode 

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**Test circuits** 

## **3 Test circuits** 

**Figure 15. Switching times test circuit for resistive load** 

**Figure 16. Gate charge test circuit** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>12V 47kΩ<br>1kΩ<br>100nF<br>RL 2200 3.3<br>μF μF<br>VDD IG=CONST<br>VD Vi=20V=VGMAX 100Ω D.U.T.<br>VGS<br>2200<br>RG D.U.T. μF 2.7kΩ VG<br>PW<br>47kΩ<br>1kΩ<br>PW<br>AM01468v1 AM01469v1<br>**----- End of picture text -----**<br>


**Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test circuit switching and diode recovery times** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>A A A<br>D<br>FAST L=100μH VD<br>G D.U.T. DIODE 2200 3.3<br>S B 3.3 1000 μF μF VDD<br>25 Ω B B D μF μF VDD ID<br>G<br>RG S<br>Vi D.U.T.<br>Pw<br>AM01470v1 AM01471v1<br>**----- End of picture text -----**<br>


## **Figure 19. Unclamped inductive waveform** 

## **Figure 20. Switching time waveform** 

**==> picture [462 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS Id Concept waveform for Inductive Load Turn-off<br>VD<br>90%Vds 90%Id<br>Tdelay -off<br>IDM<br>Vgs<br>90%Vgs on<br>ID<br>Vgs(I(t ))<br>VDD VDD 10%Vds 10%Id<br>Vds<br>Trise Tfall<br>AM01472v1 Tcross - over AM05540v1<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

## **4 Package mechanical data** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com_ . ECOPACK[®] is an ST trademark. 

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**Package mechanical data** 

**==> picture [166 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 21. D²PAK (TO-263) drawing<br>**----- End of picture text -----**<br>


**==> picture [405 x 320] intentionally omitted <==**

**----- Start of picture text -----**<br>
0079457_T<br>**----- End of picture text -----**<br>


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**Package mechanical data** 

**Table 9. D²PAK (TO-263) mechanical data** 

||**Table 9. D²PAK(TO-263) mechanical data**|**Table 9. D²PAK(TO-263) mechanical data**|**Table 9. D²PAK(TO-263) mechanical data**|
|---|---|---|---|
|**Dim.**|**mm**|||
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|A1|0.03||0.23|
|b|0.70||0.93|
|b2|1.14||1.70|
|c|0.45||0.60|
|c2|1.23||1.36|
|D|8.95||9.35|
|D1|7.50|||
|E|10||10.40|
|E1|8.50|||
|e||2.54||
|e1|4.88||5.28|
|H|15||15.85|
|J1|2.49||2.69|
|L|2.29||2.79|
|L1|1.27||1.40|
|L2|1.30||1.75|
|R||0.4||
|V2|0°||8°|



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**Package mechanical data** 

**==> picture [405 x 245] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 22. D²PAK footprint [(a)]<br>16.90<br>12.20 5.08<br>1.60<br>3.50<br>9.75<br>Footprint<br>**----- End of picture text -----**<br>


- a. All dimension are in millimeters 

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**Packaging mechanical data** 

## **5 Packaging mechanical data** 

## **Figure 23. Tape** 

**==> picture [399 x 317] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 pitches cumulative<br>tolerance on tape +/- 0.2 mm<br>Top cover P0 D P2<br>T tape<br>E<br>iw So0 00 00 51 6 ome<br>F<br>K0 W<br>B1 B0<br>A E I RI RI B IE,<br>For machine ref. only A0 P1 D1<br>including draft and<br>radii concentric around B0 ——<br>User direction of feed<br>R<br>sogtees<br>[Se EEE EE<br>—— Bending radius<br>User direction of feed<br>AM08852v1<br>**----- End of picture text -----**<br>


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**Packaging mechanical data** 

## **Figure 24. Reel** 

**==> picture [405 x 256] intentionally omitted <==**

**----- Start of picture text -----**<br>
T<br>REEL DIMENSIONS<br>40mm min.<br>Access hole<br>At slot location<br>B<br>D<br>C<br>N<br>A<br>Full radius Tape slot  G measured at hub<br>in core for<br>tape start 25 mm min.<br>width<br>AM08851v2<br>**----- End of picture text -----**<br>


**Table 10. D²PAK (TO-263) tape and reel mechanical data** 

||**Tape**|**Tape**||**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|10.5|10.7|A||330|
|B0|15.7|15.9|B|1.5||
|D|1.5|1.6|C|12.8|13.2|
|D1|1.59|1.61|D|20.2||
|E|1.65|1.85|G|24.4|26.4|
|F|11.4|11.6|N|100||
|K0|4.8|5.0|T||30.4|
|P0|3.9|4.1||||
|P1|11.9|12.1||Base qty|1000|
|P2|1.9|2.1||Bulk qty|1000|
|R|50|||||
|T|0.25|0.35||||
|W|23.7|24.3||||



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**Revision history** 

## **6 Revision history** 

**Table 11. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|24-Mar-2014|1|Initial release.|
|11-Apr-2014|2|– Document status promoted from preliminary data to production<br>data<br>– Minor text changes|



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## Links

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