# Power MOSFET, N Channel, 600 V, 20 A, 0.14 ohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3132712/)

**URL**: https://novapart.co/products/STB26N60M2/power-mosfet-n-channel-600-v-20-a-014-ohm-to-263
**SKU**: STB26N60M2
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.3600
**Stock**: 200+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:20A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.14ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | MDmesh M2 |
| Qualification | - |
| Power Dissipation | 169W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 20A |
| Drain Source On State Resistance | 0.14ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3132712/)

## **STB26N60M2** 

## N-channel 600 V, 0.14 Ω typ., 20 A MDmesh™ M2 Power MOSFET in a D²PAK package 

Datasheet - production data 

## **Features** 

**==> picture [79 x 100] intentionally omitted <==**

**----- Start of picture text -----**<br>
TAB<br>2<br>3<br>1<br>D²PAK<br>**----- End of picture text -----**<br>


|**Order code**|**VDS @**<br>**TJmax**|**RDS(on)**<br>**max.**|**ID**|**PTOT**|
|---|---|---|---|---|
|STB26N60M2|650 V|0.165 Ω|20<br>A|169<br>W|



- Extremely low gate charge 

- Excellent output capacitance (COSS) profile 

- 100% avalanche tested 

- Zener-protected 

**Figure 1: Internal schematic diagram** 

## **Applications** 

- Switching applications 

## **Description** 

This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. 

**Table 1: Device summary** 

|**Order code**|**Marking**|**Package**|**Packing**|
|---|---|---|---|
|STB26N60M2|26N60M2|D²PAK|Tape and reel|



March 2017 

DocID030419 Rev 1 

1/15 

This is information on a product in full production. 

_www.st.com_ 

|**Contents**<br>**STB26N60M2**|**Contents**<br>**STB26N60M2**|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Test circuits ..................................................................................... 8**|
|**4**|**Package information ....................................................................... 9**|
||4.1<br>D²PAK package information .............................................................. 9|
||4.2<br>D²PAK packing information ............................................................. 12|
|**5**|**Revision history ............................................................................ 14**|



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**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VGS|Gate-source voltage|±25|V|
|ID|Drain current (continuous) at Tcase= 25 °C|20|A|
||Drain current (continuous) at Tcase= 100 °C|13||
|IDM_(1)_|Drain current (pulsed)|80|A|
|PTOT|Total dissipation at Tcase= 25 °C|169|W|
|dv/dt_(2)_|Peak diode recoveryvoltage slope|15|V/ns|
|dv/dt_(3)_|MOSFET dv/dt ruggedness|50||
|Tstg|Storage temperature range|-55 to 150|°C|
|Tj|Operating junction temperature range|||



## **Notes:** 

- (1) Pulse width is limited by safe operating area. 

- (2) ISD ≤ 20 A, di/dt=400 A/μs; VDS(peak) < V(BR)DSS, VDD = 80% V(BR)DSS. (3) VDS ≤ 480 V. 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|Rthj-case|Thermal resistancejunction-case|0.74|°C/W|
|Rthj-pcb_(1)_|Thermal resistancejunction-pcb|30||



## **Notes:** 

- (1)When mounted on a 1-inch² FR-4, 2 Oz copper board. 

**Table 4: Avalanche characteristics** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|IAR_(1)_|Avalanche current, repetitive or not repetitive|3.8|A|
|EAS_(2)_|Singlepulse avalanche energy|250|mJ|



## **Notes:** 

- (1) Pulse width limited by Tjmax. 

- (2) starting Tj = 25 °C, ID = IAR, VDD = 50 V. 

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**STB26N60M2** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(Tcase = 25 °C unless otherwise specified) 

**Table 5: Static** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown<br>voltage|VGS= 0 V, ID= 1 mA|600|||V|
|IDSS|Zero gate voltage drain<br>current|VGS= 0 V, VDS= 600 V|||1|µA|
|||VGS= 0 V, VDS= 600 V,<br>Tcase= 125 °C_(1)_|||100||
|IGSS|Gate-body leakage<br>current|VDS= 0 V, VGS= ±25 V|||±10|µA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2|3|4|V|
|RDS(on)|Static drain-source on-<br>resistance|VGS= 10 V, ID= 10 A||0.14|0.165|Ω|



## **Notes:** 

(1)Defined by design, not subject to production test. 

**Table 6: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 100 V, f = 1 MHz,<br>VGS= 0 V|-|1360|-|pF|
|Coss|Output capacitance||-|88|-||
|Crss|Reverse transfer<br>capacitance||-|2|-||
|Coss eq._(1)_|Equivalent output<br>capacitance|VDS= 0 to 480 V, VGS= 0 V|-|124|-|pF|
|RG|Intrinsicgate resistance|f = 1 MHz, ID= 0 A|-|4|-|Ω|
|Qg|Totalgate charge|VDD= 480 V, ID= 20 A, VGS= 0<br>to 10 V (see_Figure 15: "Test_<br>_circuit for gate charge_<br>_behavior"_)|-|34|-|nC|
|Qgs|Gate-source charge||-|5.6|-||
|Qgd|Gate-drain charge||-|16.3|-||



## **Notes:** 

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 

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**Electrical characteristics** 

## **Table 7: Switching times** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|td(on)|Turn-on delaytime|VDD= 300 V, ID= 10 A RG= 4.7 Ω,<br>VGS= 10 V (see_Figure 14: "Test_<br>_circuit for resistive load switching_<br>_times"_and_Figure 19: "Switching_<br>_time waveform"_)|-|20.2|-|ns|
|tr|Rise time||-|8|-||
|td(off)|Turn-off delaytime||-|66|-||
|tf|Fall time||-|10|-||



**Table 8: Source-drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||20|A|
|ISDM_(1)_|Source-drain current<br>(pulsed)||-||80|A|
|VSD_(2)_|Forward on voltage|VGS= 0 V, ISD= 20 A|-||1.6|V|
|trr|Reverse recovery<br>time|ISD= 20 A, di/dt = 100 A/µs,<br>VDD= 60 V (see_Figure 16: "Test_<br>_circuit for inductive load switching_<br>_and diode recovery times"_)|-|360||ns|
|Qrr|Reverse recovery<br>charge||-|5||µC|
|IRRM|Reverse recovery<br>current||-|27||A|
|trr|Reverse recovery<br>time|ISD= 20 A, di/dt = 100 A/µs,<br>VDD= 60 V, Tj= 150 °C (see_Figure_<br>_16: "Test circuit for inductive load_<br>_switching and diode recovery times"_)|-|556||ns|
|Qrr|Reverse recovery<br>charge||-|8||µC|
|IRRM|Reverse recovery<br>current||-|29||A|



## **Notes:** 

(1) Pulse width is limited by safe operating area. 

(2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. 

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## **Electrical characteristics** 

## **2.1 Electrical characteristics (curves)** 

**Figure 2: Safe operating area** 

**==> picture [185 x 163] intentionally omitted <==**

**Figure 3: Thermal impedance** 

**==> picture [161 x 155] intentionally omitted <==**

**Figure 4: Output characteristics** 

**==> picture [179 x 164] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [179 x 164] intentionally omitted <==**

**Figure 6: Gate charge vs gate-source voltage** 

**==> picture [183 x 163] intentionally omitted <==**

**Figure 7: Static drain-source on-resistance** 

**==> picture [184 x 164] intentionally omitted <==**

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**Electrical characteristics** 

**Figure 8: Capacitance variations** 

**==> picture [181 x 164] intentionally omitted <==**

**Figure 9: Normalized gate threshold voltage vs temperature** 

**==> picture [189 x 163] intentionally omitted <==**

**Figure 10: Normalized on-resistance vs temperature** 

**==> picture [189 x 163] intentionally omitted <==**

**Figure 11: Normalized V(BR)DSS vs temperature** 

**==> picture [193 x 163] intentionally omitted <==**

**==> picture [450 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 13: Source-drain diode forward<br>Figure 12: Output capacitance stored energy<br>characteristics<br>**----- End of picture text -----**<br>


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**Test circuits** 

## **3 Test circuits** 

**==> picture [416 x 622] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 14: Test circuit for resistive load  Figure 15: Test circuit for gate charge<br>switching times  behavior<br>Figure 16: Test circuit for inductive load<br>switching and diode recovery times  Figure 17: Unclamped inductive load test<br>circuit<br>Figure 19: Switching time waveform<br>Figure 18: Unclamped inductive waveform<br>DocID030419 Rev 1<br>**----- End of picture text -----**<br>


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**Package information** 

## **4 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **4.1 D²PAK package information** 

**Figure 20: D²PAK (TO-263) type A package outline** 

**==> picture [408 x 360] intentionally omitted <==**

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**Package information** 

**Table 9: D²PAK (TO-263) type A package mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|A1|0.03||0.23|
|b|0.70||0.93|
|b2|1.14||1.70|
|c|0.45||0.60|
|c2|1.23||1.36|
|D|8.95||9.35|
|D1|7.50|7.75|8.00|
|D2|1.10|1.30|1.50|
|E|10.00||10.40|
|E1|8.50|8.70|8.90|
|E2|6.85|7.05|7.25|
|e||2.54||
|e1|4.88||5.28|
|H|15.00||15.85|
|J1|2.49||2.69|
|L|2.29||2.79|
|L1|1.27||1.40|
|L2|1.30||1.75|
|R||0.40||
|V2|0°||8°|



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**Package information** 

**Figure 21: D²PAK (TO-263) type A recommended footprint (dimensions are in mm)** 

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**Package information** 

## **4.2 D²PAK packing information** 

**Figure 22: D2PAK type A tape outline** 

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**Package information** 

**Figure 23: D2PAK type A reel outline** 

**Table 10: D²PAK type A tape and reel mechanical data** 

|**Tape**|**Tape**|**Tape**|**Reel**|**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|10.5|10.7|A||330|
|B0|15.7|15.9|B|1.5||
|D|1.5|1.6|C|12.8|13.2|
|D1|1.59|1.61|D|20.2||
|E|1.65|1.85|G|24.4|26.4|
|F|11.4|11.6|N|100||
|K0|4.8|5.0|T||30.4|
|P0|3.9|4.1||||
|P1|11.9|12.1|Basequantity||1000|
|P2|1.9|2.1|Bulkquantity||1000|
|R|50|||||
|T|0.25|0.35||||
|W|23.7|24.3||||



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**STB26N60M2** 

**Revision history** 

## **5 Revision history** 

**Table 11: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|10-Mar-2017|1|First release.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2017 STMicroelectronics – All rights reserved 

DocID030419 Rev 1 

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## Links

- [View this product on Novapart](https://novapart.co/products/STB26N60M2/power-mosfet-n-channel-600-v-20-a-014-ohm-to-263)
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- [Supplier page](https://es.farnell.com/stmicroelectronics/stb26n60m2/mosfet-n-ch-600v-20a-150deg-c/dp/3132712)
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