# Power MOSFET, N Channel, 40 V, 120 A, 4300 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2341725/)

**URL**: https://novapart.co/products/STB100NF04T4/power-mosfet-n-channel-40-v-120-a-4300-ohm-to-263
**SKU**: STB100NF04T4
**Manufacturer**: STMICROELECTRONICS
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.4600
**Stock**: 100+
**Lead Time**: 106 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:120A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0043ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vg

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 300W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 120A |
| Drain Source On State Resistance | 4300µohm |
| Gate Source Threshold Voltage Max | 2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2341725/)

## **STB100NF04T4, STP100NF04** 

Automotive-grade N-channel 40 V, 4.3 mΩ typ., 120 A STripFET™ II Power MOSFET in a D²PAK and TO-220 ~~k~~ Datasheet - production data **Features Order code VDS RDS(on) ID Ptot** TAB **max.** TAB STB100NF04T4 40 V 4.6 mΩ 120 A 300 W STP100NF04 40 V 4.6 mΩ 120 A 300 W ee **D PAK2 TO-220** 3 ~~08~~  AEC-Q101 qualified 1[2]  Exceptional dv/dt capability  100% avalanche tested  Low gate charge **Figure 1: Internal schematic diagram Applications** 

## **Applications** 

- Switching applications 

**==> picture [60 x 114] intentionally omitted <==**

**----- Start of picture text -----**<br>
D(2, TAB)<br>G(1)<br>S(3)<br>**----- End of picture text -----**<br>


## **Description** 

These Power MOSFETs have been developed using STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the devices suitable for use as primary switch in advanced high-efficiency isolated DCDC converters for telecom and computer applications, and applications with low gate charge driving requirements. 

**==> picture [46 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
AM01475v1_Tab<br>**----- End of picture text -----**<br>


**Table 1: Device summary Order code Marking Package Packing** STB100NF04T4 B100NF04 D²PAK Tape and reel STP100NF04 P100NF04 TO-220 Tube ~~—_——_——~~ 

This is information on a product in full production. 

_www.st.com_ 

November 2016 

DocID9969 Rev 7 

1/20 

|**Contents**<br>**STB100NF04T4, STP100NF04 **|**Contents**<br>**STB100NF04T4, STP100NF04 **|
|---|---|
|**Contents**||
|**1**|**Electrical ratings ............................................................................. 3**|
|**2**|**Electrical characteristics ................................................................ 4**|
||2.1<br>Electrical characteristics (curves) ...................................................... 6|
|**3**|**Spice thermal model ..................................................................... 10**|
|**4**|**Test circuits ................................................................................... 11**|
|**5**|**Package information ..................................................................... 12**|
||5.1<br>D²PAK packing information ............................................................. 12|
||5.2<br>D²PAK packing information ............................................................. 15|
||5.3<br>TO-220 package information ........................................................... 17|
|**6**|**Revision history ............................................................................ 19**|



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**STB100NF04T4, STP100NF04** 

**Electrical ratings** 

## **1 Electrical ratings** 

**Table 2: Absolute maximum ratings** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VDS|Drain-source voltage|40|V|
|VGS|Gate- source voltage|±20|V|
|ID_(1)_|Drain current (continuous) at TC= 25°C|120|A|
|ID_(1)_|Drain current (continuous) at TC=100°C|120|A|
|IDM_(2)_|Drain current (pulsed)|480|A|
|PTOT|Total dissipation at TC= 25°C|300|W|
|dv/dt_(3)_|Peak diode recoveryvoltage slope|6|V/ns|
|EAS_(4)_|Singlepulse avalanche energy|1.2|J|
|Tj|Operating junction temperature range|- 55 to 175|°C|
|Tstg|Storage temperature range|||



## **Notes:** 

- (1)Current limited by package 

- (2)Pulse width limited by safe operating area. 

(3)ISD ≤120 A, di/dt ≤300A/μs, VDD =V(BR)DSS, Tj ≤ TJMAX 

(4)Starting Tj = 25 °C, ID = 60 A, VDD = 30 V. 

**Table 3: Thermal data** 

|**Symbol**|**Parameter**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|
|||**D²PAK**|**TO-220**||
|Rthj-case|Thermal resistance junction-case|0.5||°C/W|
|Rthj-pcb_(1)_|Thermal resistancejunction-pcb|35||°C/W|
|Rthj-amb|Thermal resistance junction-ambient||62.5|°C/W|



## **Notes:** 

(1)When mounted on a 1-inch² FR-4 board, 2oz Cu. 

DocID9969 Rev 7 

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**STB100NF04T4, STP100NF04** 

**Electrical characteristics** 

## **2 Electrical characteristics** 

(TC = 25 °C unless otherwise specified) 

**Table 4: On/off states** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-source breakdown voltage|ID= 250µA, VGS= 0 V|40|||V|
|IDSS|Zero gate voltage drain current|VDS= 40 V, VGS= 0 V|||1|µA|
|||VDS= 40 V, VGS= 0 V<br>TC= 125°C_(1)_|||10|µA|
|IGSS|Gate bodyleakage current|VGS= ±20 V, VDS= 0 V|||±100|nA|
|VGS(th)|Gate threshold voltage|VDS= VGS, ID= 250µA|2||4|V|
|RDS(on)|Static drain-source on- resistance|VGS= 10 V, ID= 50 A||4.3|4.6|mΩ|



## **Notes:** 

(1)Defined by design,not subject to production test 

**Table 5: Dynamic** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Ciss|Input capacitance|VDS= 25 V, f = 1 MHz,<br>VGS= 0 V|-|5100||pF|
|Coss|Output capacitance||-|1300||pF|
|Crss|Reverse transfer capacitance||-|160||pF|
|Qg|Totalgate charge|VDD= 32 V, ID= 120 A ,<br>VGS= 10 V<br>(see_Figure 21: "Test_<br>_circuit for gate charge_<br>_behavior"_)|-|110|150|nC|
|Qgs|Gate-source charge||-|35||nC|
|Qgd|Gate-drain charge||-|70||nC|
|td(on)|Turn-on delaytime|VDD= 20 V, ID= 60 A ,<br>RG= 4.7 Ω ,VGS= 10 V<br>(see_Figure 20: "Test_<br>_circuit for resistive load_<br>_switching times"_and<br>_Figure 25: "Switching_<br>_time waveform"_)|-|35||ns|
|tr|Rise time||-|220||ns|
|td(off)|Turn-off delaytime||-|80||ns|
|tf|Fall time||-|50||ns|



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**STB100NF04T4, STP100NF04** 

**Electrical characteristics** 

**Table 6: Source drain diode** 

|**Symbol**|**Parameter**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|ISD|Source-drain current||-||120|A|
|ISDM_(1)_|Source-drain current (pulsed)||-||480|A|
|VSD_(2)_|Forward on voltage|ISD= 120 A, VGS= 0 V|-||1.3|V|
|tr|Reverse recoverytime|ISD= 120 A, VDD= 20 V,<br>di/dt = 100 A/μs V, Tj=<br>150 °C<br>(see_Figure 22: "Test_<br>_circuit for inductive load_<br>_switching and diode_<br>_recovery times"_)|-|75|-|ns|
|td(off)|Reverse recoverycharge||-|185|-|nC|
|tf|Reverse recovery current||-|5|-|A|



## **Notes:** 

(1)Pulse width limited by safe operating area. 

(2)Pulsed: Pulse duration = 300 μs, duty cycle 1.5% 

DocID9969 Rev 7 

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**STB100NF04T4, STP100NF04** 

## **Electrical characteristics** 

**2.1 Electrical characteristics (curves)** 

**Figure 2: Power dissipation vs. temperature** 

**==> picture [186 x 169] intentionally omitted <==**

**Figure 3: Max Id current vs. temperature** 

**==> picture [181 x 169] intentionally omitted <==**

**Figure 4: Output characteristics** 

**==> picture [180 x 169] intentionally omitted <==**

**Figure 5: Transfer characteristics** 

**==> picture [171 x 169] intentionally omitted <==**

**Figure 6: Transconductance** 

**==> picture [175 x 169] intentionally omitted <==**

**Figure 7: Static drain-source on-resistance** 

**==> picture [185 x 170] intentionally omitted <==**

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**----- Start of picture text -----**<br>
STB100NF04T4, STP100NF04  Electrical characteristics<br>**----- End of picture text -----**<br>


**Figure 8: Gate charge vs. gate-source voltage** 

**==> picture [182 x 169] intentionally omitted <==**

**Figure 9: Capacitance variations** 

**==> picture [184 x 170] intentionally omitted <==**

**Figure 10: Normalized gate threshold voltage vs. temperature** 

**==> picture [184 x 169] intentionally omitted <==**

**Figure 11: Normalized on-resistance vs. temperature** 

**==> picture [182 x 170] intentionally omitted <==**

**Figure 12: Source-drain diode forward characteristics** 

**==> picture [189 x 176] intentionally omitted <==**

**Figure 13: Normalized BVDSS vs. temperature** 

**==> picture [181 x 169] intentionally omitted <==**

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## **Electrical characteristics** 

**Figure 14: Thermal resistance Rthj-pcb vs. PCB** 

**copper area** 

**==> picture [134 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 15: Thermal impedance<br>**----- End of picture text -----**<br>


**Figure 16: Max power dissipation vs. PCB copper area** 

**Figure 17: Safe operating area** 

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**STB100NF04T4, STP100NF04** 

**Electrical characteristics** 

**Figure 18: Allowable Iav vs. time in avalanche** 

**==> picture [404 x 376] intentionally omitted <==**

The previous curve give the safe operating area for unclamped inductive loads, single pulse or repetitive, under the following conditions: 

PD(AVE) = 0.5*(1.3*BVDSS*IAV) 

EAS(AR)= PD(AVE)*TAV 

Where: 

IAV is the allowable current in avalanche 

PD(AVE) is the average power dissipation in avalnche(single pulse) 

tAV is the time in avalanche 

To de rate above 25°C, at fixed IAV, the following equation must be applied: 

IAV= 2*(Tjmax-TCASE)/(1.3*BVDSS*Zth) 

Where: 

Zth= K*Rth is the value coming from normalized thermal response at fixed pulse width equal to TAV 

DocID9969 Rev 7 

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**Spice thermal** model 

**STB100NF04T4, STP100NF04** 

## **3 Spice thermal model** 

**Figure 19: Spice model schematic** 

**==> picture [406 x 370] intentionally omitted <==**

**Table 7: Spice parameter** 

|**Parameter**|**Node**|**Value**|
|---|---|---|
|CTHERM1|5 - 4|0.011|
|CTHERM1|4 - 3|0.0012|
|CTHERM3|3 - 2|0.05|
|CTHERM4|2 - 1|0.1|
|RTHERM1|5 - 4|0.09|
|RTHERM2|4 - 3|0.02|
|RTHERM3|3 - 2|0.11|
|RTHERM4|2 - 1|0.17|



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**Test circuits** 

## **4 Test circuits** 

**==> picture [416 x 587] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 20: Test circuit for resistive load  Figure 21: Test circuit for gate charge<br>switching times  behavior<br>Figure 22: Test circuit for inductive load<br>Figure 23: Unclamped inductive load test<br>switching and diode recovery times  circuit<br>Figure 25: Switching time waveform<br>Figure 24: Unclamped inductive waveform<br>**----- End of picture text -----**<br>


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11/20<br>**----- End of picture text -----**<br>


**STB100NF04T4, STP100NF04** 

**Package information** 

## **5 Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _**www.st.com**_ . ECOPACK[®] is an ST trademark. 

## **5.1 D²PAK packing information** 

**Figure 26: D²PAK (TO-263) type A package outline** 

**==> picture [407 x 497] intentionally omitted <==**

**----- Start of picture text -----**<br>
0079457_A_rev22<br>**----- End of picture text -----**<br>


12/20 

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**Package information** 

|**04T4, STP100NF04 **<br>**Package information**|**04T4, STP100NF04 **<br>**Package information**|**04T4, STP100NF04 **<br>**Package information**|**04T4, STP100NF04 **<br>**Package information**|
|---|---|---|---|
|**Table 8: D²PAK(TO-263) type Apackage mechanical data**||||
|**Dim.**||**mm**||
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|A1|0.03||0.23|
|b|0.70||0.93|
|b2|1.14||1.70|
|c|0.45||0.60|
|c2|1.23||1.36|
|D|8.95||9.35|
|D1|7.50|7.75|8.00|
|D2|1.10|1.30|1.50|
|E|10||10.40|
|E1|8.50|8.70|8.90|
|E2|6.85|7.05|7.25|
|e||2.54||
|e1|4.88||5.28|
|H|15||15.85|
|J1|2.49||2.69|
|L|2.29||2.79|
|L1|1.27||1.40|
|L2|1.30||1.75|
|R||0.4||
|V2|0°||8°|



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**STB100NF04T4, STP100NF04** 

**Package information** 

**Figure 27: D²PAK (TO-263) recommended footprint (dimensions are in mm)** 

14/20 

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**Package information** 

## **5.2 D²PAK packing information** 

**Figure 28: Tape outline** 

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**STB100NF04T4, STP100NF04** 

**Package information** 

**Figure 29: Reel outline** 

**Table 9: D²PAK tape and reel mechanical data** 

|**Tape**|**Tape**|**Tape**|**Reel**|**Reel**|**Reel**|
|---|---|---|---|---|---|
|**Dim.**|**mm**||**Dim.**|**mm**||
||**Min.**|**Max.**||**Min.**|**Max.**|
|A0|10.5|10.7|A||330|
|B0|15.7|15.9|B|1.5||
|D|1.5|1.6|C|12.8|13.2|
|D1|1.59|1.61|D|20.2||
|E|1.65|1.85|G|24.4|26.4|
|F|11.4|11.6|N|100||
|K0|4.8|5.0|T||30.4|
|P0|3.9|4.1||||
|P1|11.9|12.1|Basequantity||1000|
|P2|1.9|2.1|Bulkquantity||1000|
|R|50|||||
|T|0.25|0.35||||
|W|23.7|24.3||||



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**Package information** 

## **5.3 TO-220 package information** 

**Figure 30: TO-220 type A package outline** 

DocID9969 Rev 7 17/20 ~~a~~ 

**Package information STB100NF04T4, STP100NF04** 

**Table 11: TO-220 type A mechanical data** 

|**Dim.**||**mm**||
|---|---|---|---|
||**Min.**|**Typ.**|**Max.**|
|A|4.40||4.60|
|b|0.61||0.88|
|b1|1.14||1.55|
|c|0.48||0.70|
|D|15.25||15.75|
|D1||1.27||
|E|10.00||10.40|
|e|2.40||2.70|
|e1|4.95||5.15|
|F|1.23||1.32|
|H1|6.20||6.60|
|J1|2.40||2.72|
|L|13.00||14.00|
|L1|3.50||3.93|
|L20||16.40||
|L30||28.90||
|øP|3.75||3.85|
|Q|2.65||2.95|



18/20 

DocID9969 Rev 7 

**STB100NF04T4, STP100NF04** 

**Revision history** 

## **6 Revision history** 

**Table 12: Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|23-Mar-2005|2|New template|
|01-Mar-2006|3|Removed I²PAK and inserted D²PAK.|
|04-Sep-2006|4|New template,no content change|
|20-Feb-2007|5|Typo mistake onpage 1|
|16-Mar-2013|6|Minor text changes – Modified:_Figure 17_– Updated: Section 4:<br>_Package mechanical data_and Section 5:_Packaging mechanical data_|
|21-Nov-2016|7|Updated title in cover page.<br>Updated_Section 2: "Electrical characteristics"_.<br>Minor text changes.|



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## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

- © 2016 STMicroelectronics – All rights reserved 

20/20 

DocID9969 Rev 7 



## Links

- [View this product on Novapart](https://novapart.co/products/STB100NF04T4/power-mosfet-n-channel-40-v-120-a-4300-ohm-to-263)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/stb100nf04t4/mosfet-n-ch-40v-120a-0r0043-to263/dp/2341725)
---

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