# Power MOSFET, N Channel, 100 V, 3.5 A, 0.069 ohm, SOT-23F, Surface Mount ![Product image](https://novapart.co/image/farnell:4415921RL/) **URL**: https://novapart.co/products/SSM3K361R,LXHF(T/power-mosfet-n-channel-100-v-35-a-0069-ohm-sot-23f **SKU**: SSM3K361R,LXHF(T **Manufacturer**: TOSHIBA **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.2040 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 3Pins | | Power Dissipation | 1.2W | | Rds(On) Test Voltage | 10V | | Drain Source Voltage Vds | 100V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 3.5A | | Drain Source On State Resistance | 0.069ohm | | Gate Source Threshold Voltage Max | 2.5V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:4415921RL/) SSM3K361R MOSFETs Silicon N-channel MOS (U-MOS -H) ## SSM3K361R ## 1. Applications - Power Management Switches - DC-DC Converters ## 2. Features - (1) AEC-Q101 qualified (Please see the orderable part number list) - (2) 175 MOSFET - (3) 4.5 V drive - (4) Low drain-source on-resistance - : RDS(ON) = 65 mΩ (typ.) (@VGS = 4.5 V) - RDS(ON) = 51 mΩ (typ.) (@VGS = 10 V) ## 3. Packaging and Pin Assignment **==> picture [36 x 27] intentionally omitted <==** **----- Start of picture text -----**
1: Gate
2: Source
3: Drain
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**==> picture [38 x 7] intentionally omitted <==** **----- Start of picture text -----**
SOT-23F
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## 4. Orderable part number |Orderable part number|AEC-Q101|Note| |---|---|---| |SSM3K361R,LF||General Use| |SSM3K361R,LXGF|YES
(Note 1)|Unintended Use
(Note 1)| |SSM3K361R,LXHF|YES|Automotive Use| Note 1: For more information, please contact our sales or use the inquiry form on our website. Start of commercial production 2016-02 ©2016-2024 Toshiba Electronic Devices & Storage Corporation 2024-04-16 Rev.10.0 1 SSM3K361R 5. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 °C ) |Characteristics
~~ee~~|Symbol
~~ee~~
~~es~~|Rating
~~ee~~
~~ee~~|Unit
~~ee~~| |---|---|---|---| |Drain-source voltage
~~es~~|VDSS
~~es~~
~~es~~|100
~~ee~~
~~es~~|V
~~es~~| |Gate-source voltage
~~es~~
~~a~~|VGSS
~~es~~
~~a~~
~~ee~~|±20
~~es~~
~~a~~|| |Drain current (DC)
(Note 1)
~~es~~|ID
~~es~~
~~ee~~|3.5
~~es~~|A
~~es~~| |Drain current (pulsed)
(Note 1), (Note 2)
~~es~~
~~a~~|IDP
~~es~~
~~ee~~
~~a~~
~~ee~~|14
~~es~~
~~a~~
~~ee~~|| |Power dissipation
(Note 3)
~~ee~~|PD
~~ee~~
~~ee~~
~~ee~~|1.2
~~ee~~
~~ee~~|W
~~ee~~
~~a~~| |Power dissipation
(t = 10 s)
(Note 3)
~~ee~~
~~a~~|PD
~~ee~~
~~ee~~
~~a~~|2.4
~~ee~~
~~ee~~
~~a~~|| |Single-pulse avalanche energy
(Note 4)
~~a~~|EAS
~~ee ~~
~~a~~|9.1
~~ee~~
~~a~~|mJ
~~a~~| |Avalanche current
~~a~~|IAR
~~a~~
~~ee~~|3.5
~~a~~
~~eee~~|A
~~a~~| |Channel temperature
(Note 5)
~~ee~~|Tch
~~ee~~
~~ee~~|175
~~ee~~
~~eee~~|~~ee~~| |Storage temperature
(Note 5)
~~ee~~
~~a~~|Tstg
~~ee~~
~~ee~~
~~a~~|-55 to 175
~~ee~~
~~eee~~
~~a~~|| - Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). - Note 1: Ensure that the channel temperature does not exceed 175 . Note 2: Pulse width ≤ 10 ms, Duty ≤ 1 % Note 3: Device mounted on a 25.4 mm × 25.4 mm × 1.6 mm FR4 glass epoxy board (Cu pad: 645 mm[2] ) Note 4: VDD = 25 V, Tch = 25 (Initial state), L = 1 mH, RG = 25 Ω Note 5: The definitions of the absolute maximum channel and storage temperatures are qualified per AEC-Q101. Note: This transistor is sensitive to electrostatic discharge and should be handled with care. Note: The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables, operators, soldering irons and other objects should be protected against anti-static discharge. - Note: The channel-to-ambient thermal resistance, Rth(ch-a), and the drain power dissipation, PD, vary according to the board material, board area, board thickness and pad area. When using this device, be sure to take heat dissipation fully into account. ©2016-2024 Toshiba Electronic Devices & Storage Corporation 2024-04-16 Rev.10.0 2 SSM3K361R ## 6. Electrical Characteristics ## 6.1. Static Characteristics (Unless otherwise specified, Ta = 25 °C ) |Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit| |---| |Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Drain-source breakdown voltage
Gate threshold voltage
Drain-source on-resistance
(Note 1)
(Note 2)
(Note 3)
IGSS
IDSS
V(BR)DSS
V(BR)DSX
Vth
RDS(ON)
VDS= 0 V, VGS=±16 V
VDS= 100 V, VGS= 0 V
ID= 10 mA, VGS= 0 V
ID= 10 mA, VGS= -20 V
VDS= 10 V, ID= 0.1 mA
ID= 1 A, VGS= 4.5 V
ID= 2 A, VGS= 10 V
100
80
1.5
65
51
±10
10
2.5
92
69
µA
V
V
mΩ
~~ee~~
~~ee~~
~~ee ees~~
~~GG~~
~~es~~
~~ee~~
~~pO~~
~~=~~
~~GG~~
~~Gn~~
~~i~~
~~ee~~
~~ee~~| |Note 1: If a reverse bias is applied between gate and source, this device enters V(BR)DSXmode. Note that the drain-| |source breakdown voltage is lowered in this mode.| |Note 2: Let Vthbe the voltage applied between gate and source that causes the drain current (ID) to below (0.1 mA for| |this device). Then, for normal switching operation, VGS(ON)must be higher than Vth, and VGS(OFF)must be| |lower than Vth. This relationship can be expressed as: VGS(OFF)< Vth< VGS(ON).| |Take this into consideration when using the device.| Note 3: Pulse measurement. ## 6.2. Dynamic Characteristics (Unless otherwise specified, Ta = 25 ## ) **==> picture [453 x 114] intentionally omitted <==** **----- Start of picture text -----**
Characteristics Symbol Test Condition Min Typ. Max Unit
Input capacitance Ciss VDS = 15 V, VGS = 0 V, 430 pF
ee f = 1 MHz | - | | -|
Reverse transfer capacitance Crss 22
ee |- |
Output capacitance Coss 160
ee |[-|
Switching time (rise time) tr VDD = 30 V, ID = 1.0 A, 9 ns
ee Switching time (turn-on time) ton VGS = 0 to 4.5 V, RG = 50 Ω |} | 21 | -|
ee Duty ≤ 1 %,Input: tr, tf < 5 ns, | }-- | | -|
Switching time (fall time) tf Common source, 7
es |[-|
Switching time (turn-off time) toff See Chapter 6.3 16
ee ee }-f}-[| | {-|-|
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## 6.3. Switching Time Test Circuit Fig. 6.3.1 Switching Time Test Circuit Fig. 6.3.2 Input Waveform/Output Waveform ## 6.4. Gate Charge Characteristics (Unless otherwise specified, Ta = 25 °C ) |Characteristics
~~ee~~|Symbol|Test Condition
~~|~~|Min
~~|-|~~|Typ.
~~|~~
~~|~~|Max
~~-|~~|Unit
~~|~~| |---|---|---|---|---|---|---| |Total gate charge (gate-source plus gate-drain)
~~ee~~
~~ee~~|Qg|VDD= 50 V, ID= 2.0 A,
VGS= 4.5 V
~~|~~
~~|~~
~~f-~~|~~|-|~~
~~|-|~~|3.2
~~|~~
~~|~~
~~|~~|~~-|~~
|nC
~~|~~
~~|~~| |Gate-source charge 1
~~ee~~
~~ee~~
~~ee~~|Qgs1||~~| - |~~
~~|-|~~
~~f-|~~|1.1
~~|~~
~~| ~~
~~||[-|~~
~~|~~
~~|~~|~~- |~~
~~|[-|~~
~~-|~~|| |Gate-drain charge
~~ee~~
~~ee~~|Qgd||~~| - |~~
~~f-|~~|1.5
~~||[-|~~
~~|~~
~~|~~|~~|[-|~~
~~-|~~|| ©2016-2024 Toshiba Electronic Devices & Storage Corporation 2024-04-16 Rev.10.0 3 SSM3K361R ## 6.5. Source-Drain Characteristics (Unless otherwise specified, Ta = 25 ## ) |Characteristics|Symbol|Test Condition|Min|Typ.|Max|Unit| |---|---|---|---|---|---|---| |Diode forward voltage
(Note 1)|VDSF|ID= -3.5 A, VGS= 0 V||-0.9|-1.5|V| Note 1: Pulse measurement. ## 7. Marking Fig. 7.1 Marking ©2016-2024 Toshiba Electronic Devices & Storage Corporation 2024-04-16 Rev.10.0 4 SSM3K361R ## 8. Characteristics Curves (Note) **==> picture [82 x 10] intentionally omitted <==** **----- Start of picture text -----**
Fig. 8.1 ID - VDS
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**==> picture [110 x 11] intentionally omitted <==** **----- Start of picture text -----**
Fig. 8.3 RDS(ON) - VGS
**----- End of picture text -----**
**==> picture [102 x 11] intentionally omitted <==** **----- Start of picture text -----**
Fig. 8.5 RDS(ON) - Ta
**----- End of picture text -----**
Fig. 8.2 ID - VGS **==> picture [101 x 11] intentionally omitted <==** **----- Start of picture text -----**
Fig. 8.4 RDS(ON) - ID
**----- End of picture text -----**
**==> picture [80 x 10] intentionally omitted <==** **----- Start of picture text -----**
Fig. 8.6 Vth - Ta
**----- End of picture text -----**
©2016-2024 Toshiba Electronic Devices & Storage Corporation 2024-04-16 5 Rev.10.0 SSM3K361R Fig. 8.7 IDR - VDS Fig. 8.8 C - VDS Fig. 8.9 t - ID Fig. 8.10 Dynamic Input Characteristics Fig. 8.11 PD - Ta Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2016-2024 2024-04-16 6 Toshiba Electronic Devices & Storage Corporation Rev.10.0 SSM3K361R ## Package Dimensions Unit: mm ## Weight: 0.011 g (typ.) |||Package Name(s)| |---|---|---| |TOSHIBA: 2-3Z1S|TOSHIBA: 2-3Z1S|| |Nickname: SOT-23F|Nickname: SOT-23F|| ©2016-2024 Toshiba Electronic Devices & Storage Corporation 2024-04-16 Rev.10.0 7 SSM3K361R ## RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as "TOSHIBA". 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