# TVS Diode, Transil SMP100LC Series, Bidirectional, 180 V, SMD, 2 Pins

![Product image](https://novapart.co/image/farnell:9907181/)

**URL**: https://novapart.co/products/SMP100LC-200/tvs-diode-transil-smp100lc-series-bidirectional
**SKU**: SMP100LC-200
**Manufacturer**: STMICROELECTRONICS
**Category**: Circuit Protection || TVS - Transient Voltage Suppressors || TVS Diodes
**Price**: €0.2820
**Stock**: 100+
**Lead Time**: 120 days (indicative)

## Description

Product Range:Transil SMP100LC Series; TVS Polarity:Bidirectional; Reverse Stand-Off Voltage Vrwm:180V; Clamping Voltage Vc Max:-; Diode Case Style:SMD; No. of Pins:2Pins; Breakdown Voltage Min:200

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 2Pins |
| Tvs Polarity | Bidirectional |
| Product Range | Transil SMP100LC Series |
| Qualification | - |
| Diode Mounting | Surface Mount |
| Diode Case Style | SMD |
| Clamping Voltage Max | - |
| Reverse Standoff Voltage | 180V |
| Maximum Breakdown Voltage | 200V |
| Minimum Breakdown Voltage | 200V |
| Operating Temperature Max | 150°C |
| Peak Pulse Power Dissipation | - |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:9907181/)

**SMP100LC** 

Trisil™ for telecom equipment protection 

**==> picture [61 x 39] intentionally omitted <==**

## **Features** 

- Bidirectional crowbar protection 

- Voltage range from 8 V to 400 V 

- Low capacitance from 20 pF to 45 pF @ 2 V 

- Low leakage current: IR = 2 µA max 

- Holding current: IH = 150 mA min. 

- Repetitive peak pulse current: IPP = 100 A (10/1000 µs) 

## **Benefits** 

- Trisils are not subject to ageing and provide a fail safe mode in short circuit for better protection. 

- Helps equipment meet main standards such as UL60950, IEC 950 / CSA C22.2 and UL1459. 

- Epoxy meets UL94, V0. 

- Package is JEDEC registered (DO-214AA). 

## **Complies with the following standards** 

- GR-1089 Core 

- ITU-T-K20/K21 

- IEC 61000-4-5 

- IEC 61000-4-2 level 4 

- TIA/EIA IS-968 

- UL497B recognized, UL file E136224 

## **Applications** 

Any sensitive equipment requiring protection against lightning strikes and AC power faults. These devices are dedicated to central office protection as they comply with the most stressful standards. Their low capacitances make them suitable for xDSL. 

**==> picture [65 x 55] intentionally omitted <==**

**SMB (JEDEC DO-214AA)** 

**==> picture [66 x 96] intentionally omitted <==**

## **Description** 

The SMP100LC is a series of low capacitance transient surge arrestors designed for the protection of high data rate communication equipment. The low capacitance of the devices avoids any distortion of the signal and is compatible with digital transmission line cards (xDSL, ISDN...). 

SMP100LC series tested and confirmed compatible with Cooper Bussmann Telecom Circuit Protector TCP 1.25A. 

The SMP100LC-xxx with the fuse TCP1.25A or TCP2A is compliant with Telcordia GR1089 (lightning and AC power fault tests), ITU-T K20/K21 (lightning and AC power fault tests), TIA/EIA-IS-968 (formerly FCC Part 68 lightning tests), and UL60950 (AC power fault tests). The use of the TCP1.25A allows the SMP100LC-xxx to be safe for the 2nd level (B criteria) AC power fault tests. 

TM: Trisil is a trademark of STMicroelectronics 

1/13 

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_www.st.com_ 

**Characteristics** 

**SMP100LC** 

## **1 Characteristics** 

**Table 1. In compliance with the following standards** 

|**Standard**|**Peak surge**<br>**voltage**<br>**(V)**|**Waveform**<br>**voltage**|**Required**<br>**peak current**<br>**(A)**|**Current**<br>**waveform**|**Minimum serial**<br>**resistor to meet**<br>**standard (**Ω**)**|
|---|---|---|---|---|---|
|**GR-1089 Core**<br>**First level**|2500<br>1000|2/10 µs<br>10/1000 µs|500<br>100|2/10 µs<br>10/1000 µs|0<br>0|
|**GR-1089 Core**<br>**Second level**|5000|2/10 µs|500|2/10 µs|0|
|**GR-1089 Core**<br>**Intra-building**|1500|2/10 µs|100|2/10 µs|0|
|**ITU-T-K20/K21**|6000<br>1500|10/700 µs|150<br>37.5|5/310 µs|0<br>0|
|**ITU-T-K20**<br>**(IEC61000-4-2)**|8000<br>15000|1/60 ns|ESD contact discharge<br>ESD air discharge||0<br>0|
|**IEC61000-4-5**|4000<br>4000|10/700 µs<br>1.2/50 µs|100<br>100|5/310 µs<br>8/20 µs|0<br>0|
|**TIA/EIA IS-968,**<br>**lightning surge type A**|1500<br>800|10/160 µs<br>10/560 µs|200<br>100|10/160 µs<br>10/560 µs|0<br>0|
|**TIA/EIA IS-968,**<br>**lightning surge type B**|1000|9/720 µs|25|5/320 µs|0|



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**SMP100LC** 

**Characteristics** 

**Table 2. Absolute ratings (Tamb = 25 °C)** 

|**Table 2.**|**Absolute ratings (Tamb = 25 °C)**|**Absolute ratings (Tamb = 25 °C)**|||
|---|---|---|---|---|
|**Symbol**|**Parameter**||**Value**|**Unit**|
|IPP|Repetitive peak pulse current (see_Figure 2_)|10/1000 µs<br>8/20 µs<br>10/560 µs<br>5/310 µs<br>10/160 µs<br>1/20 µs<br>2/10 µs|100<br>400<br>140<br>150<br>200<br>400<br>500|A|
|IFS|Fail-safe mode: maximum current(1)|8/20 µs|5|kA|
|ITSM|Non repetitive surge peak on-state current<br>(sinusoidal)|t = 0.2 s<br>t = 1 s<br>t = 2 s<br>t = 15 mn|24<br>15<br>12<br>4|A|
|I2t|I2t value for fusing|t = 16.6 ms<br>t = 20 ms|20<br>21|A2s|
|Tstg|Storage temperature range||-55 to 150|°C|
|Tj|Operating junction temperature range||-40 to 150||
|TL|Maximum lead temperature for soldering during 10 s.||260|°C|



1. In fail safe mode, the device acts as a short circuit. 

## **Table 3. Thermal resistances** 

**==> picture [406 x 233] intentionally omitted <==**

**----- Start of picture text -----**<br>
Symbol Parameter Value Unit<br>Rth(j-a) Junction to ambient (with recommended footprint) 100  °C/W<br>R Junction to leads 20  °C/W<br>th(j-l)<br>Figure 1. Electrical characteristics - definitions (Tamb = 25 °C)<br>Symbol Parameter IPP I<br>VRM Stand-off voltage<br>VBO Breakover voltage<br>IRM Leakage current<br>IPP Peak pulse current IBO<br>IBO Breakover current IH<br>IH Holding current IRM V<br>VR Continuous reverse voltage<br>IR Leakage current at VR VRM VR VBO<br>C Capacitance<br>**----- End of picture text -----**<br>


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**Characteristics** 

**SMP100LC** 

**Table 4. Electrical characteristics - values (Tamb = 25 °C)** 

|**Order code**|**IRM @ VRM**|**IRM @ VRM**|**IR** **@ VR**|**IR** **@ VR**|**Dynamic**<br>**VBO (1)**|**Static**<br>**VBO@ IBO**<br>**(2)**|**Static**<br>**VBO@ IBO**<br>**(2)**|**IH (3)**|**C(4)**|**C(5)**|
|---|---|---|---|---|---|---|---|---|---|---|
||**max.**||**max.**||**max.**|**max.**<br>**max.**||**min.**|**typ.**|**typ.**|
||**µA**|**V**|**µA**|**V**|**V**|**V**|**mA**|**mA**|**pF**|**pF**|
|SMP100LC-8|2|6|5|8|25|15|800|50<br>(typ.)|NA|75|
|SMP100LC-25||22||25|40|35||150|NA|65|
|SMP100LC-35||32||35|55|55|||NA|55|
|SMP100LC-65||55||65|85|85|||45|90|
|SMP100LC-90||81||90|120|125|||40|80|
|SMP100LC-120||108||120|155|150|||35|75|
|SMP100LC-140||126||140|180|175|||30|65|
|SMP100LC-160||144||160|205|200|||30|65|
|SMP100LC-200||180||200|255|250|||30|60|
|SMP100LC-230||207||230|295|285|||30|60|
|SMP100LC-270||243||270|345|335|||30|60|
|SMP100LC-320||290||320|400|390|||25|50|
|SMP100LC-360||325||360|460|450|||25|50|
|SMP100LC-400||360||400|540|530|||20|45|



1. See _Figure 16: Test circuit 1 for Dynamic IBO and VBO parameters_ 

2. See _Figure 17: Test circuit 2 for IBO and VBO parameters_ 

3. See _Figure 18: Test circuit 3 for dynamic IH parameter_ 

4. VR = 50 V bias, VRMS =1 V, F = 1 MHz 

5. VR = 2V bias, VRMS =1 V, F = 1 MHz 

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**SMP100LC** 

**Characteristics** 

**Figure 2. Pulse waveform** 

## **Figure 3. Non repetitive surge peak on-state current versus overload duration** 

**==> picture [462 x 340] intentionally omitted <==**

**----- Start of picture text -----**<br>
ITSM(A)<br>%IPP Repetitive peak pulse current<br>tr = rise time (µs) 70<br>F=50Hz<br>100 tp = pulse duration time (µs) 60 Tj initial = 25°C<br>50<br>40<br>50 30<br>20<br>10<br>0 t(s)<br>tr tp t 01E-2 1E-1 1E+0 1E+1 1E+2 1E+3<br>Figure 4. On-state voltage versus on-state  Figure 5. Relative variation of holding<br>current (typical values) current versus junction<br>temperature<br>IT(A)<br>100 IH[T ] / Ij H[T =25°C]j<br>2.0<br>Tj initial = 25°C<br>1.8<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>0.4<br>VT(V) 0.2 T (°C)j<br>0.0<br>10 -25 0 25 50 75 100 125<br>0 1 2 3 4 5 6 7 8<br>**----- End of picture text -----**<br>


## **Figure 6. Relative variation of breakover voltage versus junction temperature** 

**Figure 7. Relative variation of leakage current versus junction temperature (typical values)** 

**==> picture [462 x 146] intentionally omitted <==**

**----- Start of picture text -----**<br>
VBO[Tj] / VBO[Tj=25°C] IR[Tj] / IR[Tj=25°C]<br>1.08 2000<br>1000<br>1.06<br>1.04<br>100<br>1.02<br>1.00 10<br>0.98<br>T (°C)j T (°C)j<br>0.96 1<br>-25 0 25 50 75 100 125 25 50 75 100 125<br>**----- End of picture text -----**<br>


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**SMP100LC** 

**Application information** 

## **Figure 8. Variation of thermal impedance Figure 9. Relative variation of junction junction to ambient versus pulse capacitance versus reverse voltage duration applied (typical values)** 

**==> picture [462 x 137] intentionally omitted <==**

**----- Start of picture text -----**<br>
Zth(j-a)/Rth(j-a) C [VR] / C [VR=2V]<br>1 1.4<br>Printed circuit board - FR4, VF =1MHzRMS = 1V<br>copper thickness = 35µm, 1.2 Tj = 25°C<br>recommended pad layout<br>1.0<br>0.8<br>0.1<br>0.6<br>0.4<br>0.2<br>tp(s) VR(V)<br>0.01 0.0<br>1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2 1 2 5 10 20 50 100 300<br>**----- End of picture text -----**<br>


## **2 Application information** 

In wire line applications, analog or digital, both central office and subscriber sides have to be protected. This function is assumed by a combined series / parallel protection stage. 

## **Figure 10. Examples of protection stages for line cards** 

**==> picture [238 x 101] intentionally omitted <==**

**----- Start of picture text -----**<br>
Ring<br>relay<br>Line Line<br>Ex. Analog line card Ex. xDSL line card or terminal<br>Protection stage Protection stage<br>**----- End of picture text -----**<br>


In such a stage, parallel function is assumed by one or several Trisil, and is used to protect against short duration surge (lightning). During this kind of surges the Trisil limits the voltage across the device to be protected at its break over value and then fires. The fuse assumes the series function, and is used to protect the module against long duration or very high current mains disturbances (50/60Hz). It acts by safe circuit opening. Lightning surge and mains disturbance surges are defined by standards like GR1089, TIA/EIA IS-968, ITU-T K20. 

## **Figure 11. Typical circuits** 

**==> picture [269 x 105] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fuse TCP 1.25A<br>Tip L Tip S<br>Fuse TCP 1.25A<br>T1 SMP100LC-xxx<br>SMP100LC-xxx Gnd Gnd<br>T2 SMP100LC-xxx<br>Fuse TCP 1.25A<br>Ring L Ring S<br>Typical circuit for subscriber side Typical circuit for central office side<br>**----- End of picture text -----**<br>


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**SMP100LC** 

**Application information** 

## **Figure 12. Test method of the board with fuse and Trisil** 

**==> picture [229 x 143] intentionally omitted <==**

**----- Start of picture text -----**<br>
I surge<br>Surge Device to be protected<br>Generator Test board<br>Line side<br>V<br>Oscilloscope<br>Current probe Voltage probe<br>**----- End of picture text -----**<br>


These topologies, using SMP100LC from ST and TCP1.25A from Cooper Bussmann, have been functionally validated with a Trisil glued on the PCB. Following example was performed with SMP100LC-270 Trisil. For more information, see Application Note AN2064. 

## **Figure 13. Trisil turns on during lightning strike** 

**==> picture [57 x 79] intentionally omitted <==**

**----- Start of picture text -----**<br>
I surge (100A/div)<br>V (50V/div)<br>**----- End of picture text -----**<br>


## **Test conditions:** 

2/10 µs + and - 2.5 and 5 kV, 500 A (10 pulses of each polarity), Tamb = 25 °C 

## **Test result:** 

Fuse and Trisil OK after test in accordance with GR1089 requirements. 

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**Application information** 

## **Figure 14. Trisil action while fuse remains operational** 

**==> picture [49 x 78] intentionally omitted <==**

**----- Start of picture text -----**<br>
I surge (2A/div)<br>V (100V/div)<br>**----- End of picture text -----**<br>


## **Test conditions:** 

600 V, 3 A, 1.1 s (first level), Tamb = 25 °C 

## **Test result:** 

Fuse and Trisil OK after test in accordance with GR1089 requirements. 

**Figure 15. High current AC power test: the fuse acts like a switch by opening the circuit** 

**==> picture [48 x 70] intentionally omitted <==**

**----- Start of picture text -----**<br>
I surge (10A/div)<br>V (100V/div)<br>**----- End of picture text -----**<br>


## **Test conditions:** 

277 V, 25 A (second level), Tamb = 25 °C 

## **Test result:** 

Fuse safely opened and Trisil OK after test in accordance with GR1089 requirements. 

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**Application information** 

## **Figure 16. Test circuit 1 for Dynamic IBO and VBO parameters** 

**==> picture [153 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 V / µs, di/dt < 10 A / µs, Ipp = 100 A<br>**----- End of picture text -----**<br>


**==> picture [328 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
2 Ω 45 Ω 83 Ω 46 µH<br>U 10 µF 66 Ω 470 Ω 0.36 nF<br>KeyTek 'System 2' generator with PN246I module<br>1 kV / µs, di/dt < 10 A / µs, Ipp = 10 A<br>26 µH 250 Ω 47 Ω 46 µH<br>U 60 µF 12 Ω<br>KeyTek 'System 2' generator with PN246I module<br>**----- End of picture text -----**<br>


## **Figure 17. Test circuit 2 for IBO and VBO parameters** 

**==> picture [324 x 225] intentionally omitted <==**

**----- Start of picture text -----**<br>
K<br>ton = 20ms R1 = 140 Ω<br>R2 = 240 Ω<br>220V 50Hz Vout DUT measurementVBO<br>1/4<br>IBO<br>measurement<br>TEST PROCEDURE<br>Pulse test duration (tp = 20ms):<br>● for Bidirectional devices = Switch K is closed<br>● for Unidirectional devices = Switch K is open<br>VOUT selection:<br>● Device with VBO < 200V ➔ VOUT = 250 VRMS, R1 = 140Ω<br>● Device with VBO ≥ 200V ➔ VOUT = 480 VRMS, R2 = 240Ω<br>**----- End of picture text -----**<br>


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**Ordering information scheme** 

**SMP100LC** 

## **Figure 18. Test circuit 3 for dynamic IH parameter** 

**==> picture [312 x 211] intentionally omitted <==**

**----- Start of picture text -----**<br>
R<br>Surge generator<br>VBAT = - 48 V D.U.T<br>This is a GO-NOGO test which allows to confirm the holding current (IH) level in a<br>functional test circuit.<br>TEST PROCEDURE<br>1/ Adjust the current level at the IH value by short circuiting the AK of the D.U.T.<br>2/ Fire the D.U.T. with a surge current ➔ IPP = 10A, 10/1000µs.<br>3/ The D.U.T. will come back off-state within 50ms maximum.<br>**----- End of picture text -----**<br>


## **3 Ordering information scheme** 

## **Figure 19. Ordering information scheme** 

**==> picture [298 x 163] intentionally omitted <==**

**----- Start of picture text -----**<br>
SMP    100    LC   -   xxx<br>Trisil surface mount<br>Repetitive peak pulse current<br>100 = 100 A<br>Capacitance<br>LC = Low capacitance<br>Voltage<br>65 = 65 V<br>**----- End of picture text -----**<br>


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**SMP100LC** 

**Package information** 

## **4 Package information** 

- Epoxy meets UL94, V0 

- Lead-free package 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

## **Table 5. SMB dimensions** 

**==> picture [406 x 380] intentionally omitted <==**

**----- Start of picture text -----**<br>
Dimensions<br>Ref. Millimeters Inches<br>E1<br>Min. Max. Min. Max.<br>D A1 1.90 2.45 0.075 0.096<br>A2 0.05 0.20 0.002 0.008<br>b 1.95 2.20 0.077 0.087<br>E<br>c 0.15 0.40 0.006 0.016<br>A1 E 5.10 5.60 0.201 0.220<br>C A2 E1 4.05 4.60 0.159 0.181<br>L b D 3.30 3.95 0.130 0.156<br>L 0.75 1.50 0.030 0.059<br>Figure 20. Footprint dimensions  Figure 21. Marking layout [(1)]<br>in mm (inches)<br>1.62 2.60 1.62<br>(0.064) (0.102) (0.064) Cathode bar ( unidirectional devices only )<br>2.18 e e: ECOPACK complianceXXX: Marking<br>(0.086) x x x Z:Y: ManufacturingYear location<br>WW: week<br>z y w w<br>5.84<br>(0.23)<br>**----- End of picture text -----**<br>


1. Marking layout can vary according to assembly location. 

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**Ordering information** 

**SMP100LC** 

## **5 Ordering information** 

## **Table 6. Ordering information** 

|**Order code**|**Marking**|**Package**|**Weight**|**Base qty**|**Delivery mode**|
|---|---|---|---|---|---|
|SMP100LC-8|PL8|SMB|98 mg|2500|Tape and reel|
|SMP100LC-25|L25|||||
|SMP100LC-35|L35|||||
|SMP100LC-65|L06|||||
|SMP100LC-90|L09|||||
|SMP100LC-120|L12|||||
|SMP100LC-140|L14|||||
|SMP100LC-160|L16|||||
|SMP100LC-200|L20|||||
|SMP100LC-230|L23|||||
|SMP100LC-270|L27|||||
|SMP100LC-320|L32|||||
|SMP100LC-360|L36|||||
|SMP100LC-400|L40|||||



## **6 Revision history** 

**Table 7. Document revision history** 

|**Date**|**Revision**|**Changes**|
|---|---|---|
|09-Nov-2004|9|Absolute ratings values, table 3 on page 2, updated.|
|07-Dec-2004|10|SMP100LC-320, SMP100LC-360 and SMP100LC-400 addition.|
|20-Jun-2005|11|Telecom Circuit Protector added in_Description_.|
|05-Mar-2007|12|Reformatted to current standards. SMB_Package information_<br>updated. Standards compliance paragraphs added to_Description_.|
|05-Jan-2010|13|Corrected vertical axis labelling in_Figure 8_.|
|09-Feb-2012|14|Added UL statement in_Complies with the following standards_.|



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