# Power MOSFET, N Channel, 600 V, 5.6 A, 0.7 ohm, PowerPAK SO, Surface Mount

![Product image](https://novapart.co/image/farnell:3253835/)

**URL**: https://novapart.co/products/SIHJ690N60E-T1-GE3/power-mosfet-n-channel-600-v-56-a-07-ohm-powerpak
**SKU**: SIHJ690N60E-T1-GE3
**Manufacturer**: VISHAY
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.6040
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (07-Nov-2024) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | E |
| Qualification | - |
| Power Dissipation | 48W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PowerPAK SO |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 5.6A |
| Drain Source On State Resistance | 0.7ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3253835/)

**SiHJ690N60E** 

Vishay Siliconix 

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—<br>www.vishay.com<br>**----- End of picture text -----**<br>


## **E Series Power MOSFET** 

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**----- Start of picture text -----**<br>
D<br>PowerPAK [®]  SO-8L<br>5<br>G<br>S<br>=S N-Channel MOSFET<br>**----- End of picture text -----**<br>


## **FEATURES** 

- 4[th] generation E series technology 

- Low figure-of-merit (FOM) Ron x Qg 

- Low effective capacitance (Co(er)) 

- Reduced switching and conduction losses 

- Avalanche energy rated (UIS) 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

## **APPLICATIONS** 

- Switch mode power supplies (SMPS) 

- Flyback converter 

## **PRODUCT SUMMARY** 

- Lighting 

|• Lighting<br>VDS(V) at TJmax.<br>650|
|---|
|- High-intensity discharge (HID)<br>RDS(on)typ. () at 25 °C<br>VGS= 10 V<br>0.60|
|- Fluorescent ballast lighting<br>• Consumer<br>- Wall adaptors<br>Qgmax. (nC)<br>12<br>Qgs(nC)<br>3<br>Qgd(nC)<br>3|
|Configuration<br>Single|
||
|**ORDERING INFORMATION**|
|Package<br>PowerPAK SO-8L|
|Lead (Pb)-free and halogen-free<br>SiHJ690N60E-T1-GE3|
||
|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)|
|**PARAMETER**<br>**SYMBOL**<br>**LIMIT**<br>**UNIT**<br>Drain-source voltage<br>VDS<br>600<br>V<br>Gate-source voltage<br>VGS<br>± 30<br>Continuous drain current (TJ= 150 °C)<br>VGSat 10 V<br>TC= 25 °C<br>ID<br>5.6<br>A<br>TC= 100 °C<br>3.5<br>~~a~~<br>~~**a**~~<br>~~a~~<br>~~EE~~<br>~~OT~~|
|Pulsed drain currenta<br>IDM<br>11<br>~~a~~|
|Linear derating factor<br>0.38<br>W/°C<br>~~a~~|
|Single pulse avalanche energyb<br>EAS<br>9<br>mJ<br>~~a~~|
|Maximum power dissipation<br>PD<br>48<br>W<br>~~a~~|
|Operating junction and storage temperature range<br>TJ, Tstg<br>-55 to +150<br>°C<br>~~a~~|
|Drain-source voltage slope<br>TJ= 125 °C<br>dv/dt<br>70<br>V/ns<br>Reverse diode dv/dtd<br>17<br>~~a~~<br>~~OO~~<br>~~—~~<br>~~OO~~|
|**Notes**|



a. Repetitive rating; pulse width limited by maximum junction temperature 

- b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25  , IAS = 0.8 A 

- c. 1.6 mm from case 

S19-0512-Rev. A, 17-Jun-2019 

Document Number: 92276 

**1** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHJ690N60E** 

www.vishay.com 

Vishay Siliconix 

**==> picture [59 x 48] intentionally omitted <==**

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TYP.**|**MAX.**|**UNIT**|
|Maximum junction-to-ambient|RthJA|52|65|°C/W|
|Maximum junction-to-case (drain)|RthJC|1.9|2.6||



|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-source breakdown voltage|VDS|VGS= 0 V, ID= 250 μA||600|-|-|V|
|VDStemperature coefficient|VDS/TJ|Reference to 25 °C, ID= 1 mA||-|0.73|-|V/°C|
|Gate-source threshold voltage (N)|VGS(th)|VDS= VGS, ID= 250 μA||3.0|-|5.0|V|
|Gate-source leakage|IGSS|VGS= ± 20 V||-|-|± 100|nA|
|||VGS= ± 30 V||-|-|± 1|μA|
|Zero gate voltage drain current|IDSS|VDS= 600 V, VGS= 0 V||-|-|1|μA|
|||VDS= 480 V, VGS= 0 V, TJ= 125 °C||-|-|10||
|Drain-source on-state resistance|RDS(on)|VGS= 10 V|ID= 2.0 A|-|0.60|0.70||
|Forward transconductancea|gfs|VDS= 20 V, ID= 2.0 A||-|1.2|-|S|
|**Dynamic**||||||||
|Input capacitance|Ciss|VGS= 0 V,<br>VDS= 100 V,<br>f = 1 MHz||-|347|-|pF|
|Output capacitance|Coss|||-|24|-||
|Reverse transfer capacitance|Crss|||-|4|-||
|Effective output capacitance, energy<br>relateda|Co(er)|VDS= 0 V to 480 V, VGS= 0 V||-|17|-||
|Effective output capacitance, time<br>relatedb|Co(tr)|||-|86|-||
|Totalgate charge|Qg|VGS= 10 V|ID= 2.0 A, VDS= 480 V|-|8|12|nC|
|Gate-source charge|Qgs|||-|3|-||
|Gate-drain charge|Qgd|||-|3|-||
|Turn-on delay time|td(on)|VDD= 480 V, ID= 2.0 A,<br>VGS= 10 V, Rg= 9.1||-|12|24|ns|
|Rise time|tr|||-|9|18||
|Turn-off delay time|td(off)|||-|19|38||
|Fall time|tf|||-|22|44||
|Gate input resistance|Rg|f = 1 MHz, open drain||1.1|2.3|4.6||
|**Drain-Source Body Diode Characteristics**||||||||
|Continuous source-drain diode current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p - n junction diode<br>S<br>D<br>G||-|-|5.6|A|
|Pulsed diode forward current|ISM|||-|-|11||
|Diode forward voltage|VSD|TJ= 25 °C, IS= 2.0 A, VGS= 0 V||-|-|1.2|V|
|Reverse recovery time|trr|TJ= 25 °C, IF= IS= 2.0 A,<br>di/dt = 100 A/μs, VR= 25 V||-|146|292|ns|
|Reverse recovery charge|Qrr|||-|1.0|2.0|μC|
|Reverse recovery current|IRRM|||-|13|-|A|



## **Notes** 

a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS 

b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS 

S19-0512-Rev. A, 17-Jun-2019 

Document Number: 92276 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHJ690N60E** 

Vishay Siliconix 

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www.vishay.com<br>**----- End of picture text -----**<br>


## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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Axis Title<br>12 10000<br>15 V TJ = 25 °C<br>14 V<br>13 V<br>9 12 V<br>11 V<br>1000<br>10 V<br>6 9 V<br>8 V 100<br>3<br>7 V<br>6 V<br>0 5 V 10<br>0 5 10 15 20<br>VDS - Drain-to-Source Voltage (V)<br>2nd line 1st line 2nd line<br> - Drain-to-Source Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 1 - Typical Output Characteristics** 

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Axis Title<br>8 10000<br>15 V14 V TJ = 150 °C<br>13 V<br>12 V<br>6 11 V<br>10 V 1000<br>8 V<br>4<br>7 V<br>100<br>2<br>6 V<br>5 V<br>0 10<br>0 5 10 15 20<br>VDS - Drain-to-Source Voltage (V)<br>2nd line 1st line 2nd line<br> - Drain-to-Source Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 2 - Typical Output Characteristics** 

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Axis Title<br>12 10000<br>TJ = 25 °C<br>9<br>1000<br>6 T J = 150 °C<br>100<br>3<br>VDS = 23.7 V<br>0 10<br>0 5 10 15 20<br>VGS - Gate-to-Source Voltage (V)<br>2nd line 1st line 2nd line<br> - Drain-to-Source Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 3 - Typical Transfer Characteristics** 

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Axis Title<br>3.0 10000<br>I D  = 2 A<br>2.5<br>2.0 1000<br>1.5<br>V GS  = 10 V<br>1.0 100<br>0.5<br> 0 10<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>TJ - Junction Temperature (°C)<br> Fig. 4 - Normalized On-Resistance vs. Temperature<br>Axis Title<br>  10 000 10000<br>VGS = 0 V, f = 1 MHz<br>C iss = C gs + C gd , C ds shorted<br>Crss = Cgd<br> 1000 Coss = Cds + Cgd<br>C iss 1000<br> 100<br>100<br>Coss<br> 10<br>Crss<br> 1 10<br>0 100 200 300 400 500 600<br>VDS - Drain-to-Source Voltage (V)<br> Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage<br>Axis Title<br>10 000 4<br>3<br>1000<br>C oss Eoss 2<br>100<br>1<br>10 0<br>0 100 200 300 400 500 600<br>VDS - Drain-to-Source Voltage (V)<br> Fig. 6 - Coss and Eoss vs. VDS<br>1st line 2nd line<br>(Normalized)<br> - Drain-to-Source On-Resistance<br>DS(on)<br>R<br>2nd line 1st line 2nd line<br>C - Capacitance (pF)<br>2nd line 2nd line<br> - Output Capacitance (pF)<br>oss<br>C<br> - Output Capacitance Stored Energy (µJ)<br>oss<br>E<br>**----- End of picture text -----**<br>


S19-0512-Rev. A, 17-Jun-2019 

Document Number: 92276 

**3** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHJ690N60E** 

**==> picture [59 x 48] intentionally omitted <==**

## www.vishay.com 

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Axis Title<br>12 10000<br>VDS = 480 V<br>VDS = 300 V<br>VDS = 120 V<br>9<br>1000<br>6<br>100<br>3<br>0 10<br>0 2 4 6 8<br>Qg - Total Gate Charge (nC)<br>2nd line 1st line 2nd line<br> - Gate-to-Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage** 

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Axis Title<br>10000<br>10<br>T J = 150  ° C<br>1000<br>1<br>T J = 25 °C<br>100<br>0.1<br>V GS  = 0 V<br>0.01 10<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4<br>VSD - Source-Drain Voltage (V)<br>2nd line 1st line 2nd line<br> - Reverse Drain Current (A)<br>ISD<br>**----- End of picture text -----**<br>


**Fig. 8 - Typical Source-Drain Diode Forward Voltage** 

## Vishay Siliconix 

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Axis Title<br>6 10000<br>5<br>4 1000<br>3<br>2 100<br>1<br>0 10<br>25 50 75 100 125 150<br>TC - Case Temperature (°C)<br>2nd line 1st line 2nd line<br> - Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 10 - Maximum Drain Current vs. Case Temperature** 

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Axis Title<br>775 10000<br>750<br>725<br>1000<br>700<br>675<br>100<br>650<br>625<br>ID = 250 µA<br>600 10<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>TJ - Junction Temperature (°C)<br>2nd line 1st line 2nd line<br> - Drain-to-Source Breakdown Voltage (V)<br>DS<br>V<br>**----- End of picture text -----**<br>


**Fig. 11 - Temperature vs. Drain-to-Source Voltage** 

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Axis Title<br>100 10000<br>Operation in this area<br>limited by RDS(on) I DM limited<br>10<br>1000<br>1 Limited by RDS(on) a 1 00 µs<br>100<br>0.1 1  ms<br>TTC J  = 150 = 25 °C ° C,, BVDSS limited 10  ms<br>single pulse<br>0.01 10<br>1 10 100 1000<br>VDS - Drain-to-Source Voltage (V)<br>2nd line 1st line 2nd line<br> - Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 9 - Maximum Safe Operating Area** 

**Note** 

a. VGS > minimum VGS at which RDS(on) is specified 

S19-0512-Rev. A, 17-Jun-2019 

Document Number: 92276 

**4** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHJ690N60E** 

Vishay Siliconix 

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**==> picture [77 x 10] intentionally omitted <==**

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www.vishay.com<br>**----- End of picture text -----**<br>


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Axis Title<br>1 10000<br>Duty cycle = 0.5<br>0.2<br>1000<br>0.1<br>0.1 0.05<br>0.02<br>100<br>Single pulse<br>0.01 10<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1<br>Pulse Time (s)<br>tn<br>eis<br>n<br>Tar<br>e<br>vitc<br>e<br>ff<br>E 1st line 2nd line<br>d<br>e<br>zila Thermal Impedance<br>mro<br>N<br>**----- End of picture text -----**<br>


**Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case** 

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Axis Title<br>1 10000<br>Duty cycle = 0.5<br>0.2<br>0.1<br>0.1<br>0.05<br>1000<br>0.02<br>0.01<br>100<br>0.001 Single pulse<br>0.0001 10<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>Pulse Time (s)<br>1st line 2nd line<br> - Normalized Thermal<br>Transient Impedance<br>thJA<br>R<br>**----- End of picture text -----**<br>


**Fig. 13 - Normalized Transient Thermal Impedance, Junction-to-Ambient** 

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RD<br>VDS<br>VGS<br>D.U.T.<br>R<br>g +<br>- VDD<br>10 V<br>Pulse width ≤ 1 μs<br>Duty factor ≤ 0.1 %<br> Fig. 14 - Switching Time Test Circuit<br>VDS<br>90 %<br>10 %<br>VGS<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**Fig. 15 - Switching Time Waveforms** 

S19-0512-Rev. A, 17-Jun-2019 

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L<br>VDS<br>Vary tp to obtain<br>required IAS<br>Rg D.U.T. +<br>-  [V][DD]<br>IAS<br>10 V<br>tp 0.01 Ω<br> Fig. 16 - Unclamped Inductive Test Circuit<br>VDS<br>tp<br>VDD<br>VDS<br>IAS<br>**----- End of picture text -----**<br>


**Fig. 17 - Unclamped Inductive Waveforms** 

Document Number: 92276 

For technical questions, contact: hvm@vishay.com 

**5** 

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHJ690N60E** 

**==> picture [59 x 48] intentionally omitted <==**

www.vishay.com 

## Vishay Siliconix 

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**----- Start of picture text -----**<br>
Current regulator<br>Same type as D.U.T.<br>Qg<br>10 V<br>50 kΩ<br>Qgs Qgd 12 V 0.2 μF 0.3 μF<br>+<br>VG D.U.T. - VDS<br>VGS<br>Charge 3 mA<br> Fig. 18 -  Basic Gate Charge Waveform<br>IG ID<br>Current sampling resistors<br>**----- End of picture text -----**<br>


**Fig. 19 - Gate Charge Test Circuit** 

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**----- Start of picture text -----**<br>
Peak Diode Recovery dv/dt Test Circuit<br>D.U.T. + Circuit layout considerations<br>   •  Low stray inductance<br>3  •  Ground plane<br> •  Low leakage inductance<br>current transformer<br>-<br>+<br>2<br>- - 4 +<br>1<br>Rg •  dv/dt controlled by Rg +<br>•  I•  Driver same type as D.U.T.SD controlled by duty factor “D” - VDD<br>•  D.U.T. - device under test<br>1 Driver gate drive<br>P.W.<br>Period D =<br>P.W. Period<br>VGS = 10 V  [a]<br>2 D.U.T. ISD waveform<br>Reverse<br>recovery Body diode forward<br>current current<br>di/dt<br>3 D.U.T. VDS waveform Diode recovery<br>dv/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>4 Inductor current<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = 5 V for logic level devices<br>**----- End of picture text -----**<br>


**Fig. 20 - For N-Channel** 

_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?92276._ 

Document Number: 92276 

S19-0512-Rev. A, 17-Jun-2019 

**6** 

For technical questions, contact: hvm@vishay.com 

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** Vishay Siliconix 

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www.vishay.com 

## **PowerPAK[®] SO-8L Case Outline 2** 

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Revision: 05-Aug-2019 

Document Number: 66934 

**1** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

Vishay Siliconix 

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www.vishay.com 

|**DIM.**|**MILLIMETERS**|**MILLIMETERS**|**MILLIMETERS**|**INCHES**|**INCHES**|**INCHES**|
|---|---|---|---|---|---|---|
||**MIN.**|**NOM.**|**MAX.**|**MIN.**|**NOM.**|**MAX.**|
|A|1.00|1.07|1.14|0.039|0.042|0.045|
|A1|0.00|-|0.127|0.00|-|0.005|
|b|0.33|0.41|0.48|0.013|0.016|0.019|
|b1|0.44|0.51|0.58|0.017|0.020|0.023|
|b2|4.80|4.90|5.00|0.189|0.193|0.197|
|b3|0.094|||0.004|||
|b4|0.47|||0.019|||
|c|0.20|0.25|0.30|0.008|0.010|0.012|
|D|5.00|5.13|5.25|0.197|0.202|0.207|
|D1|4.80|4.90|5.00|0.189|0.193|0.197|
|D2|3.86|3.96|4.06|0.152|0.156|0.160|
|D3|1.63|1.73|1.83|0.064|0.068|0.072|
|e|1.27 BSC|||0.050 BSC|||
|E|6.05|6.15|6.25|0.238|0.242|0.246|
|E1|4.27|4.37|4.47|0.168|0.172|0.176|
|E2|2.75|2.85|2.95|0.108|0.112|0.116|
|F|-|-|0.15|-|-|0.006|
|L|0.62|0.72|0.82|0.024|0.028|0.032|
|L1|0.92|1.07|1.22|0.036|0.042|0.048|
|K|0.51|||0.020|||
|W|0.23|||0.009|||
|W1|0.41|||0.016|||
|W2|2.82|||0.111|||
|W3|2.96|||0.117|||
|q|0°|-|10°|0°|-|10°|
|ECN: S19-0643-Rev.<br>DWG: 6044|B, 05-Aug-2019||||||
||||||||



## **Note** 

- Millimeters will gover 

Revision: 05-Aug-2019 

Document Number: 66934 

**2** For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**PAD Pattern** Vishay Siliconix 

www.vishay.com 

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## **RECOMMENDED MINIMUM PAD FOR PowerPAK[®] SO-8L SINGLE** 

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5.000<br>(0.197)<br>0.510<br>4.061<br>(0.020)<br>(0.160)<br>3.630<br>(0.143)<br>0.595<br>(0.023)<br>0.610<br>(0.024)<br>0.710<br>(0.028)<br>2.715<br>(0.107)<br>0.410 0.860<br>(0.016) (0.034)<br>0.820<br>(0.032)<br>1.905 1.270<br>(0.075) (0.050)<br>7.250<br>(0.285)<br>Recommended Minimum Pads<br>Dimensions in mm (inches)<br>2.310 (0.091)<br>8.250 (0.325) 6.250 (0.246)<br>1.291 (0.051)<br>**----- End of picture text -----**<br>


Revision: 07-Feb-12 

Document Number: 63818 

**1** 

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Legal Disclaimer Notice** Vishay 

www.vishay.com 

**==> picture [59 x 48] intentionally omitted <==**

## **Disclaimer** 

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 

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_**© 2019 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED**_ 

Revision: 01-Jan-2019 

Document Number: 91000 

**1** 



## Links

- [View this product on Novapart](https://novapart.co/products/SIHJ690N60E-T1-GE3/power-mosfet-n-channel-600-v-56-a-07-ohm-powerpak)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/vishay/sihj690n60e-t1-ge3/mosfet-e-series-600v-5-6a-48w/dp/3253835)
---

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