# Power MOSFET, N Channel, 600 V, 40 A, 0.065 ohm, TO-247AC, Through Hole

![Product image](https://novapart.co/image/farnell:3019088/)

**URL**: https://novapart.co/products/SIHG065N60E-GE3/power-mosfet-n-channel-600-v-40-a-0065-ohm-to
**SKU**: SIHG065N60E-GE3
**Manufacturer**: VISHAY
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.5900
**Stock**: 500+
**Lead Time**: 155 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:40A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.057ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:5V; Po

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (07-Nov-2024) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | E |
| Qualification | - |
| Power Dissipation | 250W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247AC |
| Drain Source Voltage Vds | 600V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 40A |
| Drain Source On State Resistance | 0.065ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3019088/)

**SiHG065N60E** 

~~—~~ www.vishay.com 

Vishay Siliconix 

## **E Series Power MOSFET** 

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TO-247AC<br>S<br>D<br>G<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
D<br>G<br>S<br>N-Channel MOSFET<br>**----- End of picture text -----**<br>


## **FEATURES** 

- 4[th] generation E series technology 

- Low figure-of-merit (FOM) Ron x Qg 

- Low effective capacitance (Co(er)) 

- Reduced switching and conduction losses 

- Avalanche energy rated (UIS) 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

## **APPLICATIONS** 

## **PRODUCT SUMMARY** 

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**----- Start of picture text -----**<br>
||||||
|---|---|---|---|---|
|VDS (V) at TJ max.|650|
|RDS(on) typ. (||) at 25 °C|VGS = 10 V|0.057|
|Qg max. (nC)|74|
|Qgs (nC)|19|
|Qgd (nC)|15|
|Configuration|Single|

**----- End of picture text -----**<br>


- Server and telecom power supplies 

- Switch mode power supplies (SMPS) 

- Power factor correction power supplies (PFC) 

- Lighting 

   - High-intensity discharge (HID) 

   - Fluorescent ballast lighting 

- Industrial 

   - Welding 

   - Motor drives 

   - Battery chargers 

   - Solar (PV inverters) 

## **ORDERING INFORMATION** 

TO-247AC 

Package TO-247AC Lead (Pb)-free and halogen-free SiHG065N60E-GE3 

~~PC~~ **ABSOLUTE MAXIMUM RATINGS** (TC = 25 °C, unless otherwise noted) **PARAMETER SYMBOL LIMIT UNIT** ~~GO~~ Drain-source voltage VDS 600 V ~~a~~ Gate-source voltage VGS ± 30 TC = 25 °C 40 Continuous drain current (TJ = 150 °C) VGS at 10 V ID TC = 100 °C 25 A ~~rea~~ Pulsed drain current[ a] ~~ee ee~~ IDM 116 ~~ee D eC~~ Linear derating factor 2 W/°C ~~a~~ Single pulse avalanche energy[ b] ~~C~~ EAS 226 mJ ~~eC~~ Maximum power dissipation PD 250 W Operating junction and storage temperature range TJ, Tstg -55 to +150 °C Drain-source voltage slope TJ = 125 °C 100 ~~pf~~ dV/dt ~~|~~ V/ns Reverse diode dV/dt[d] 50 ~~DC~~ Soldering recommendations (peak temperature)[c] For 10 s 260 °C 

## **Notes** 

- a. Repetitive rating; pulse width limited by maximum junction temperature 

- b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25  , IAS = 4 A 

- c. 1.6 mm from case 

- d. ISD  ID, di/dt = 400 A/μs, starting TJ = 25 °C 

S20-0338-Rev. C, 11-May-2020 

Document Number: 92036 

**1** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHG065N60E** 

www.vishay.com 

Vishay Siliconix 

**==> picture [59 x 48] intentionally omitted <==**

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TYP.**|**MAX.**|**UNIT**|
|Maximum junction-to-ambient|RthJA|-|40|°C/W|
|Maximum junction-to-case (drain)|RthJC|-|0.5||



|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-source breakdown voltage|VDS|VGS= 0 V, ID= 250 μA||600|-|-|V|
|VDStemperature coefficient|VDS/TJ|Reference to 25 °C, ID= 1 mA||-|0.72|-|V/°C|
|Gate-source threshold voltage (N)|VGS(th)|VDS= VGS, ID= 250 μA||3|-|5|V|
|Gate-source leakage|IGSS|VGS= ± 20 V||-|-|± 100|nA|
|||VGS= ± 30 V||-|-|± 1|μA|
|Zero gate voltage drain current|IDSS|VDS= 600 V, VGS= 0 V||-|-|1|μA|
|||VDS= 480 V, VGS= 0 V, TJ= 125 °C||-|-|10||
|Drain-source on-state resistance|RDS(on)|VGS= 10 V|ID= 16 A|-|0.057|0.065||
|Forward transconductance|gfs|VDS= 20 V, ID= 16 A||-|12|-|S|
|**Dynamic**||||||||
|Input capacitance|Ciss|VGS= 0 V,<br>VDS= 100 V,<br>f = 1 MHz||-|2700|-|pF|
|Output capacitance|Coss|||-|102|-||
|Reverse transfer capacitance|Crss|||-|5|-||
|Effective output capacitance, energy<br>relateda|Co(er)|VDS= 0 V to 480 V, VGS= 0 V||-|93|-||
|Effective output capacitance, time<br>relatedb|Co(tr)|||-|593|-||
|Totalgate charge|Qg|VGS= 10 V|ID= 16 A, VDS= 480 V|-|49|74|nC|
|Gate-source charge|Qgs|||-|19|-||
|Gate-drain charge|Qgd|||-|15|-||
|Turn-on delay time|td(on)|VDD= 480 V, ID= 16 A,<br>VGS= 10 V, Rg= 9.1||-|28|56|ns|
|Rise time|tr|||-|46|92||
|Turn-off delay time|td(off)|||-|54|108||
|Fall time|tf|||-|13|26||
|Gate input resistance|Rg|f = 1 MHz, open drain||0.3|0.7|1.4||
|**Drain-Source Body Diode Characteristics**||||||||
|Continuous source-drain diode current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p - n junction diode<br>S<br>D<br>G||-|-|40|A|
|Pulsed diode forward current|ISM|||-|-|116||
|Diode forward voltage|VSD|TJ= 25 °C, IS= 16 A, VGS= 0 V||-|-|1.2|V|
|Reverse recovery time|trr|TJ= 25 °C, IF= IS= 16 A,<br>di/dt = 100 A/μs, VR= 400 V||-|382|764|ns|
|Reverse recovery charge|Qrr|||-|7.1|14.2|μC|
|Reverse recovery current|IRRM|||-|34|-|A|



## **Notes** 

a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS 

b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS 

S20-0338-Rev. C, 11-May-2020 

Document Number: 92036 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHG065N60E** 

Vishay Siliconix 

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www.vishay.com<br>**----- End of picture text -----**<br>


## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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120<br>TOP         15 V14 V TJ = 25 °C<br>13 V<br>12 V<br>11 V<br>90 10 V9 V<br>8 V<br>7 V<br>6 V<br>BOTTOM   5 V<br>60<br>30<br>0<br>0 5 10 15 20<br>VDS, Drain-to-Source Voltage (V)<br>, Drain-to-Source Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 1 - Typical Output Characteristics** 

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3.0<br>ID = 16 A<br>2.5<br>2.0<br>1.5<br>1.0<br>0.5 VGS = 10 V<br> 0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>TJ, Junction Temperature (°C)<br>(Normalized)<br>, Drain-to-Source On-Resistance<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Fig. 4 - Normalized On-Resistance vs. Temperature** 

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75   100 000<br>TOP         15 V<br>14 V TJ = 150 °C V GS = 0 V, f = 1 MHz<br>13 V12 V11 V   10 000 CC iss rss = C= C gs gd + C gd , C ds  shorted<br>10 V Ciss C oss = C ds + C gd<br>9 V<br>50 8 V7 V  1000<br>6 V<br>BOTTOM   5 V<br> 100 C oss<br>25  10 Crss<br> 1<br>0  0.1<br>0 5 10 15 20 0 100 200 300 400 500 600<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br> Fig. 2 - Typical Output Characteristics  Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage<br>120 20<br>18<br>TJ = 25 °C  5000<br>16<br>90<br>14<br>12<br>60 TJ = 150 °C Coss Eoss 10<br> 500<br>8<br>6<br>30<br>4<br>VDS = 26 V 2<br>0  50 0<br>0 5 10 15 20 0 100 200 300 400 500 600<br>VGS, Gate-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br> Fig. 3 - Typical Transfer Characteristics  Fig. 6 - Coss and Eoss vs. VDS<br>C, Capacitance (pF)<br>, Drain-to-Source Current (A)<br>ID<br>, Output Capacitance (pF)<br>, Drain-to-Source Current (A)<br>ID Coss<br>, Output Capacitance Stored Energy (μJ)<br>oss<br>E<br>**----- End of picture text -----**<br>


S20-0338-Rev. C, 11-May-2020 

Document Number: 92036 

**3** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHG065N60E** 

www.vishay.com 

Vishay Siliconix 

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12<br>VDS = 480 V<br>VDS = 300 V<br>VDS = 120 V<br>9<br>6<br>3<br>0<br>0 15 30 45 60<br>Qg, Total Gate Charge (nC)<br>, Gate-to-Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage** 

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100<br>TJ = 150  ° C<br>10<br>T J = 25 °C<br>1<br>VGS = 0 V<br>0.1<br>0.2 0.6 1.0 1.4 1.8<br>VSD, Source-Drain Voltage (V)<br>, Reverse Drain Current (A)<br>ISD<br>**----- End of picture text -----**<br>


**Fig. 8 - Typical Source-Drain Diode Forward Voltage** 

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40<br>30<br>20<br>10<br>0<br>25 50 75 100 125 150<br>TC, Case Temperature (°C)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 10 - Maximum Drain Current vs. Case Temperature** 

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750<br>725<br>700<br>675<br>650<br>625<br>600<br>575<br>ID = 250 μA<br>550<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>TJ, Junction Temperature (°C)<br>, Drain-to-Source Breakdown Voltage (V)<br>DS<br>V<br>**----- End of picture text -----**<br>


**Fig. 11 - Temperature vs. Drain-to-Source Voltage** 

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Operation in this area<br>limited by RDS(on)<br>100<br>IDM limited<br>10 100  μs<br>Limited by RDS(on)*<br>1<br>1 m s<br>0.1 TC = 25 °C 10 m s<br>TJ = 150 °C<br>Single pulse<br>BVDSS limited<br>0.01<br>1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 9 - Maximum Safe Operating Area** 

**Note** 

a. VGS > minimum VGS at which RDS(on) is specified 

S20-0338-Rev. C, 11-May-2020 

Document Number: 92036 

**4** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHG065N60E** 

Vishay Siliconix 

**==> picture [59 x 48] intentionally omitted <==**

www.vishay.com 

**==> picture [438 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>Duty cycle = 0.5<br>0.2<br>0.1<br>0.1<br>0.05<br>0.02<br>Single pulse<br>0.01<br>0.0001 0.001 0.01 0.1 1<br>Pulse Time (s)<br>Thermal Impedance<br>Normalized Effective Transient<br>**----- End of picture text -----**<br>


**Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case** 

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RD<br>VDS<br>VGS<br>D.U.T.<br>R<br>g +<br>- VDD<br>10 V<br>Pulse width ≤ 1 μs<br>Duty factor ≤ 0.1 %<br> Fig. 13 - Switching Time Test Circuit<br>VDS<br>90 %<br>10 %<br>VGS<br>td(on) tr td(off) tf<br> Fig. 14 - Switching Time Waveforms<br>L<br>VDS<br>Vary tp to obtain<br>required IAS<br>Rg D.U.T. +<br>-  [V][DD]<br>IAS<br>10 V<br>tp 0.01 Ω<br>**----- End of picture text -----**<br>


**Fig. 15 - Unclamped Inductive Test Circuit** 

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VDS<br>tp<br>VDD<br>VDS<br>IAS<br> Fig. 16 - Unclamped Inductive Waveforms<br>Qg<br>10 V<br>Qgs Qgd<br>VG<br>Charge<br> Fig. 17 -  Basic Gate Charge Waveform<br>Current regulator<br>Same type as D.U.T.<br>50 kΩ<br>12 V 0.2 μF<br>0.3 μF<br>+<br>D.U.T. - VDS<br>VGS<br>3 mA<br>IG ID<br>Current sampling resistors<br>**----- End of picture text -----**<br>


**Fig. 16 - Unclamped Inductive Waveforms** 

**Fig. 18 - Gate Charge Test Circuit** 

Document Number: 92036 

S20-0338-Rev. C, 11-May-2020 

**5** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHG065N60E** 

Vishay Siliconix 

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www.vishay.com<br>**----- End of picture text -----**<br>


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Peak Diode Recovery dv/dt Test Circuit<br>+ Circuit layout considerations<br>D.U.T.<br>   •  Low stray inductance<br>3  •  Ground plane<br> •  Low leakage inductance<br>current transformer<br>-<br>+<br>2<br>- - 4 +<br>1<br>Rg •  dv/dt controlled by Rg +<br>•  I•  Driver same type as D.U.T.SD controlled by duty factor “D” - VDD<br>•  D.U.T. - device under test<br>1 Driver gate drive<br>P.W.<br>Period D =<br>P.W. Period<br>VGS = 10 V  [a]<br>2 D.U.T. ISD waveform<br>Reverse<br>recovery Body diode forward<br>current current<br>di/dt<br>3 D.U.T. VDS waveform Diode recovery<br>dv/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>Inductor current<br>4<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = 5 V for logic level devices<br>**----- End of picture text -----**<br>


**Fig. 19 - For N-Channel** 

_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?92036._ 

S20-0338-Rev. C, 11-May-2020 

Document Number: 92036 

**6** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

Vishay Siliconix 

www.vishay.com 

## **TO-247AC (High Voltage)** 

## **VERSION 1: FACILITY CODE = 9** 

||**MILLIMETERS**|**MILLIMETERS**||||**MILLIMETERS**|**MILLIMETERS**||
|---|---|---|---|---|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|**NOTES**||**DIM.**|**MIN.**|**MAX.**|**NOTES**|
|A|4.83|5.21|||D1|16.25|16.85|5|
|A1|2.29|2.55|||D2|0.56|0.76||
|A2|1.50|2.49|||E|15.50|15.87|4|
|b|1.12|1.33|||E1|13.46|14.16|5|
|b1|1.12|1.28|||E2|4.52|5.49|3|
|b2|1.91|2.39|6||e|5.44 BSC|||
|b3|1.91|2.34|||L|14.90|15.40||
|b4|2.87|3.22|6, 8||L1|3.96|4.16|6|
|b5|2.87|3.18|||Ø P|3.56|3.65|7|
|c|0.55|0.69|6||Ø P1|7.19 ref.|||
|c1|0.55|0.65|||Q|5.31|5.69||
|D|20.40|20.70|4||S|5.54|5.74||



## **Notes** 

> (1) Package reference: JEDEC® TO247, variation AC 

- (2) All dimensions are in mm 

- (3) Slot required, notch may be rounded 

> (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outermost extremes of the plastic body 

> (5) Thermal pad contour optional with dimensions D1 and E1 

> (6) Lead finish uncontrolled in L1 

> (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm 

> (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4 dimension at maximum material condition 

Revision: 19-Oct-2020 

Document Number: 91360 

**1** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

**==> picture [77 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.vishay.com<br>**----- End of picture text -----**<br>


## Vishay Siliconix 

## **VERSION 2: FACILITY CODE = Y** 

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4 A A<br>B E         ØP7 (Datum B)<br>E/2 S A2 Ø k M D B M<br>3  R/2 ØP1<br>A<br>D2<br>Q<br>2 x R 4 4<br>(2) D D1<br>1 2 3 D 4<br>Thermal pad<br>5  L1<br>C L 4<br>E1<br>See view B A 0.01 M D B M<br>2 x b2 C View A - A<br>2 x  e<br>3 x b<br>b4 A1<br>0.10 M C A M<br>Planting (b1, b3, b5) Base metal<br>Lead Assignments<br>1. Gate D D E E<br>2. Drain<br>3. Source C C (c) c1<br>4. Drain<br>(b, b2, b4)<br>(4)<br>Section C - C, D - D, E - E<br>View B<br>**----- End of picture text -----**<br>


||**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|
|A|4.58|5.31|
|A1|2.21|2.59|
|A2|1.17|2.49|
|b|0.99|1.40|
|b1|0.99|1.35|
|b2|1.53|2.39|
|b3|1.65|2.37|
|b4|2.42|3.43|
|b5|2.59|3.38|
|c|0.38|0.86|
|c1|0.38|0.76|
|D|19.71|20.82|
|D1|13.08|-|



||**MILLIMETERS**|**MILLIMETERS**||
|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|**NOTES**|
|D2|0.51|1.30||
|E|15.29|15.87||
|E1|13.72|-||
|e|5.46 BSC|||
|Ø k|0.254|||
|L|14.20|16.25||
|L1|3.71|4.29||
|Ø P|3.51|3.66||
|Ø P1|-|7.39||
|Q|5.31|5.69||
|R|4.52|5.49||
|S|5.51 BSC|||
|||||



## **Notes** 

> (1) Dimensioning and tolerancing per ASME Y14.5M-1994 

- (2) Contour of slot optional 

> (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body 

> (4) Thermal pad contour optional with dimensions D1 and E1 

- (5) Lead finish uncontrolled in L1 

> (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") 

- (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c 

Revision: 19-Oct-2020 

Document Number: 91360 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

Vishay Siliconix 

www.vishay.com 

## **VERSION 3: FACILITY CODE = N** 

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**----- Start of picture text -----**<br>
A<br>B E A P1<br>R/2 P<br>N A2<br>D<br>C<br>C<br>b4 E1<br>b2b e A1 0.01 M D B M<br>0.10 M C A M<br>b1, b3, b5<br>Base metal<br>b, b2, b4<br>Plating<br>D2<br>Q S<br>M<br>R D B<br>D1<br>D M<br>K<br>L1<br>L<br>c c1<br>**----- End of picture text -----**<br>


||**MILLIMETERS**|**MILLIMETERS**|||**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**||**DIM.**|**MIN.**|**MAX.**|
|A|4.65|5.31||D2|0.51|1.35|
|A1|2.21|2.59||E|15.29|15.87|
|A2|1.17|1.37||E1|13.46|-|
|b|0.99|1.40||e|5.46 BSC||
|b1|0.99|1.35||k|0.254||
|b2|1.65|2.39||L|14.20|16.10|
|b3|1.65|2.34||L1|3.71|4.29|
|b4|2.59|3.43||N|7.62 BSC||
|b5|2.59|3.38||P|3.56|3.66|
|c|0.38|0.89||P1|-|7.39|
|c1|0.38|0.84||Q|5.31|5.69|
|D|19.71|20.70||R|4.52|5.49|
|D1|13.08|-||S|5.51 BSC||
|ECN: E20-0545-Rev. F, 19-Oct-2020<br>DWG: 5971|||||||



ECN: E20-0545-Rev. F, 19-Oct-2020 DWG: 5971 

## **Notes** 

> (1) Dimensioning and tolerancing per ASME Y14.5M-1994 

- (2) Contour of slot optional 

> (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body 

> (4) Thermal pad contour optional with dimensions D1 and E1 

- (5) Lead finish uncontrolled in L1 

> (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") 

Revision: 19-Oct-2020 

Document Number: 91360 

**3** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Legal Disclaimer Notice** Vishay 

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**==> picture [59 x 48] intentionally omitted <==**

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Revision: 01-Jan-2019 

Document Number: 91000 

**1** 



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---

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