# Power MOSFET, N Channel, 500 V, 46 A, 0.1 ohm, Super-247, Through Hole

![Product image](https://novapart.co/image/farnell:3650270/)

**URL**: https://novapart.co/products/SIHFPS40N50L-GE3/power-mosfet-n-channel-500-v-46-a-01-ohm-super-247
**SKU**: SIHFPS40N50L-GE3
**Manufacturer**: VISHAY
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €6.1800
**Stock**: 200+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | To Be Advised |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 540W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | Super-247 |
| Drain Source Voltage Vds | 500V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 46A |
| Drain Source On State Resistance | 0.1ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3650270/)

**SiHFPS40N50L** 

Vishay Siliconix 

www.vishay.com 

## **Power MOSFET** 

**==> picture [185 x 111] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>Super-247<br>G<br>S<br>D<br>G<br>S<br>N-Channel MOSFET<br>**----- End of picture text -----**<br>


|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|
|---|---|---|
|VDS(V)|500||
|RDS(on)(Ω)|VGS= 10 V|0.087|
|Qg(Max.) (nC)|380||
|Qgs(nC)|80||
|Qgd(nC)|190||
|Configuration|Single||



## **FEATURES** 

- Superfast body diode eliminates the need for External diodes in ZVS applications 

- Lower gate charge results in simpler drive requirements 

- Enhanced dV/dt capabilities offer improved ruggedness 

- Higher gate voltage threshold offers improved noise immunity 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

## **APPLICATIONS** 

- Zero voltage switching SMPS 

- Telecom and server power supplies 

- Uninterruptible power supplies 

- Motor control applications 

## **ORDERING INFORMATION** 

Package Super-247 Lead (Pb)-free and halogen free SiHFPS40N50L-GE3 

|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C, unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C, unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C, unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C, unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C, unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C, unless otherwise noted)<br>~~Cn~~|
|---|---|---|---|---|---|
|**PARAMETER**<br>~~Cn~~<br>~~|~~<br>~~Pe~~<br>~~Ne~~<br>~~|~~|||**SYMBOL**<br>~~Cn~~<br>~~|~~<br>~~Pp~~<br>~~fp~~|**LIMIT**<br>~~Cn~~<br>~~Pp~~<br>~~fp~~|**UNIT**<br>~~Cn~~|
|Drain-source voltage<br>~~|~~<br>~~Pe~~<br>~~Ne~~<br>~~|~~|||VDS<br>~~|~~<br>~~Pp~~<br>~~fp~~|500<br>~~Pp~~<br>~~fp~~|V<br>~~ee~~|
|Gate-source voltage<br>~~|~~<br>~~Pe~~<br>~~Ne~~<br>~~|~~<br>~~ee~~<br>~~ee~~|||VGS<br>~~|~~<br>~~Pp~~<br>~~fp~~<br>~~ee~~|± 30<br>~~Pp~~<br>~~fp~~<br>~~ee~~||
|Continuous drain current<br>~~Ne~~<br>~~ee~~|VGSat 10 V<br>~~ee~~<br>~~ee~~|TC= 25 °C<br>~~|~~<br>~~ee~~<br>~~ee~~|ID<br>~~fp~~<br>~~ee~~<br>~~ee~~|46<br>~~fp~~<br>~~ee~~<br>~~ee~~|A<br>~~ee~~<br>~~ee~~<br>~~a~~|
|||TC= 100 °C<br>~~|~~<br>~~ee~~<br>~~ee~~||29<br>~~fp~~<br>~~ee~~<br>~~ee~~||
|Pulsed drain currenta<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~a~~|||IDM<br>~~ee~~<br>~~ee~~<br>~~a~~<br>~~GO~~|180<br>~~ee~~<br>~~ee~~<br>~~a~~<br>~~GO~~||
|Linear derating factor<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~a~~<br>~~a~~|||~~ee~~<br>~~ee ~~<br>~~a~~<br>~~a~~<br>~~GO~~|4.3<br>~~ee~~<br> ~~ee~~<br>~~a~~<br>~~a~~<br>~~GO~~|W/°C<br>~~ee~~<br>~~ee~~<br>~~a~~<br>~~a~~|
|Single pulse avalanche energyb<br>~~a~~<br>~~GO~~<br>~~Ce~~|||EAS<br>~~a~~<br>~~GO~~<br>~~GO~~|920<br>~~a~~<br>~~GO~~<br>~~GO~~|mJ<br>~~a~~<br>~~GO~~|
|Repetitive avalanche currenta<br>~~GO~~<br>~~Ce~~<br>~~Ce~~|||IAR<br>~~GO~~|46<br>~~GO~~|A<br>~~GO~~|
|Repetitive avalanche Energya<br>~~Ce~~<br>~~Ce~~<br>~~Pe~~|||EAR<br>|54<br>|mJ<br>|
|Maximum power dissipation<br>~~Ce~~<br>~~Pe~~|TC= 25 °C<br>||PD<br>|540<br>|W<br>|
|Peak diode recovery dV/dtc<br>~~PeeG~~<br>~~Se~~|||dV/dt<br>~~eG~~|34<br>~~eG~~|V/ns<br>~~eG~~|
|Operating junction and storage temperature range<br>~~Se~~|||TJ, Tstg|- 55 to + 150|°C|
|Soldering recommendations (peak temperature)<br>~~Se~~|for 10 s<br>~~Se~~|||300d||



## **Notes** 

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) 

b. Starting TJ = 25 °C, L = 0.86 mH, Rg = 25 Ω, IAS = 46 A (see fig. 12) 

c. ISD ≤ 46 A, dI/dt ≤ 550 A/μs, VDD ≤ VDS, TJ ≤ 150 °C 

- d. 1.6 mm from case 

S21-0019-Rev. D, 18-Jan-2021 

Document Number: 91260 

**1** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHFPS40N50L** 

www.vishay.com 

Vishay Siliconix 

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TYP.**|**MAX.**|**UNIT**|
|Maximum junction-to-ambienta|RthJA|-|40|°C/W|
|Case-to-sink, flat, greased surface|RthCS|0.24|-||
|Maximum junction-to-case (drain)a|RthJC|-|0.23||



## **Note** 

## a. Rth is measured at TJ approximately 90 °C 

|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-source breakdown voltage|VDS|VGS= 0 V, ID= 250 μA||500|-|-|V|
|VDStemperature coefficient|ΔVDS/TJ|Reference to 25 °C, ID= 1 mA||-|0.60|-|V/°C|
|Gate-source threshold voltage|VGS(th)|VDS= VGS, ID= 250 μA||3.0|-|5.0|V|
|Gate-source leakage|IGSS|VGS= ± 30 V||-|-|± 100|nA|
|Zero gate voltage drain current|IDSS|VDS= 500 V, VGS= 0 V||-|-|50|μA|
|||VDS= 400 V, VGS= 0 V, TJ= 125 °C||-|-|2.0|mA|
|Drain-source on-state resistance|RDS(on)|VGS= 10 V|ID= 28 Ab|-|0.087|0.100|Ω|
|Forward transconductance|gfs|VDS= 50 V, ID= 46 A||21|-|-|S|
|**Dynamic**||||||||
|Input capacitance|Ciss|VGS= 0 V,<br>VDS= 25 V,<br>f = 1.0 MHz, see fig. 5||-|8110|-|pF|
|Output capacitance|Coss|||-|960|-||
|Reverse transfer capacitance|Crss|||-|130|-||
|Output capacitance|Coss|VGS= 0 V|VDS= 1.0 V, f = 1.0 MHz|-|11200|-||
||||VDS= 400 V, f = 1.0 MHz|-|240|-||
|Effective output capacitance|Cosseff.||VDS= 0 V to 400 Vc|-|440|-||
|Effective output capacitance<br>(energy related)|Coss eff.(ER)|||-|310|-||
|Total gate charge|Qg|VGS= 10 V|ID= 46 A, VDS= 400 V,<br>see fig. 7 and 15b|-|-|380|nC|
|Gate-source charge|Qgs|||-|-|80||
|Gate-drain charge|Qgd|||-|-|190||
|Internal gate resistance|Rg|f = 1|MHz, open drain|-|0.90|-|Ω|
|Turn-on delay time|td(on)|VDD= 250 V, ID= 46 A,<br>Rg= 0.85Ω, VGS= 10 V,<br>see fig. 14a and 14bb||-|27|-|ns|
|Rise time|tr|||-|170|-||
|Turn-off delay time|td(off)|||-|50|-||
|Fall time|tf|||-|69|-||
|**Drain-source body diode characteristics**||||||||
|Continuous source-drain diode current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p - n junction diode<br>S<br>D<br>G||-|-|46|A|
|Pulsed diode forward currenta|ISM|||-|-|180||
|Body diode voltage|VSD|TJ= 25 °C, IS= 46 A, VGS= 0 Vb||-|-|1.5|V|
|Body diode reverse recovery time|trr|TJ= 25 °C, IF= 46 A||-|170|250|ns|
|||TJ= 125 °C, dI/dt = 100 A/μsb||-|220|330||
|Body diode reverse recovery charge|Qrr|TJ= 25 °C, IS= 46 A, VGS= 0 Vb||-|705|1060|nC|
|||TJ= 125 °C, dI/dt = 100 A/μsb||-|1.3|2.0||
|Reverse recovery current|IRRM|TJ= 25 °C||-|9.0|-|A|
|Forward turn-on time|ton|Intrinsic turn-on time is negligible (turn-on is dominated by LSand LD)||||||



## **Notes** 

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width ≤ 400 μs; duty cycle ≤ 2 % 

c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 % to 80 % VDS 

S21-0019-Rev. D, 18-Jan-2021 

Document Number: 91260 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHFPS40N50L** 

Vishay Siliconix 

## www.vishay.com 

## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

**==> picture [176 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
 1000<br>VGS<br>TOP 15V<br>10V<br>8.0V<br>7.0V<br> 100 6.0V<br>5.5V<br>5.0V<br>BOTTOM4.5V<br> 10<br> 1<br>4.5V<br>0.1<br>20μs PULSE WIDTH T  = 25J °C<br>0.01<br>0.1  1  10  100<br>V     , Drain-to-Source Voltage (V)DS<br>I   ,  Drain-to-Source Current (A)D<br>**----- End of picture text -----**<br>


**Fig. 1 - Typical Output Characteristics** 

**==> picture [191 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
3.0<br>ID = 47A<br>2.5<br>2.0<br>1.5<br>1.0<br>0.5<br>VGS= 10V<br>0.0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>T  , Junction TemperatureJ (  C)°<br>(Normalized)<br>DS(on)<br>R            , Drain-to-Source On Resistance<br>**----- End of picture text -----**<br>


**Fig. 4 - Normalized On-Resistance vs. Temperature** 

**==> picture [174 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
 1000 VGS<br>TOP 15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br> 100 5.0V<br>BOTTOM4.5V<br> 10<br>4.5V<br> 1<br>20µs PULSE WIDTH T  = 150J °C<br>0.1<br>0.1  1  10  100<br>V     , Drain-to-Source Voltage (V)DS<br>I   ,  Drain-to-Source Current (A)D<br>**----- End of picture text -----**<br>


**Fig. 2 - Typical Output Characteristics** 

**==> picture [185 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000000<br>VGS   = 0V,     f = 1 MHZ<br>Ciss   = Cgs + Cgd, Cds  SHORTED<br>100000 Crss    = Cgd<br>Coss   = Cds + Cgd<br>10000 Ciss<br>1000<br>Coss<br>100<br>Crss<br>10<br>1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance(pF)<br>**----- End of picture text -----**<br>


**Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage** 

**==> picture [193 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
 1000<br> 100 T  = 150  CJ °<br> 10<br>T  = 25  CJ °<br> 1<br>V      = 50VDS<br>20µs PULSE WIDTH<br>0.1<br>4 5 6 7 8 9 10 11<br>V     , Gate-to-Source Voltage (V)GS<br>I   ,  Drain-to-Source Current (A)D<br>**----- End of picture text -----**<br>


**Fig. 3 - Typical Transfer Characteristics** 

**==> picture [172 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
40<br>35<br>30<br>25<br>20<br>15<br>10<br>5<br>0<br>0 100 200 300 400 500 600<br>VDS, Drain-to-Source Voltage (V)<br>Energy (µJ)<br>**----- End of picture text -----**<br>


**Fig. 6 - Typical Output Capacitance Stored Energy vs. VDS** 

S21-0019-Rev. D, 18-Jan-2021 

Document Number: 91260 

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For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHFPS40N50L** 

www.vishay.com 

Vishay Siliconix 

**==> picture [174 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
20<br>ID = 47A<br>V DS = 400V<br>VDS= 250V<br>VDS= 100V<br>15<br>10<br>5<br>0<br>0 100 200 300 400<br>Q   , Total Gate Charge (nC)G<br>GS<br>V     , Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage** 

**==> picture [171 x 166] intentionally omitted <==**

**----- Start of picture text -----**<br>
 1000<br> 100<br>T  = 150  CJ °<br> 10<br>T  J = 25  C°<br> 1<br>V      = 0 V GS<br>0.1<br>0.2 0.7 1.2 1.7 2.2<br>V     ,Source-to-Drain Voltage (V)SD<br>I     , Reverse Drain Current (A)SD<br>**----- End of picture text -----**<br>


**Fig. 8 - Typical Source Drain Diode Forward Voltage** 

**==> picture [173 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
50<br>40<br>30<br>20<br>10<br>0<br>25 50 75 100 125 150<br>T   , Case TemperatureC (  C)°<br>I   , Drain Current (A)D<br>**----- End of picture text -----**<br>


**Fig. 9 - Maximum Drain Current vs. Case Temperature** 

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**----- Start of picture text -----**<br>
RD<br>VDS<br>VGS<br>D.U.T.<br>RG +- VDD<br>10 V<br>Pulse width ≤ 1 µs<br>Duty factor ≤ 0.1 %<br>Fig. 10a - Switching Time Test Circuit<br>VDS<br>90 %<br>10 %<br>VGS<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**Fig. 10b - Switching Time Waveforms** 

S21-0019-Rev. D, 18-Jan-2021 

Document Number: 91260 

**4** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHFPS40N50L** 

Vishay Siliconix 

www.vishay.com 

**==> picture [369 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
 1<br>D = 0.50<br>0.1<br>0.20<br>0.10<br>0.05 PDM<br>0.01 0.020.01 SINGLE PULSE t1<br>(THERMAL RESPONSE) t2<br>Notes:<br>1. Duty factor D = t   / t1 2<br>2. Peak TJ = P DM x  ZthJC + TC<br>0.001<br>0.00001 0.0001 0.001 0.01 0.1  1<br>t  , Rectangular Pulse Duration (sec)1<br>thJC<br>(Z        )<br>Thermal Response<br>**----- End of picture text -----**<br>


**Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case** 

**==> picture [156 x 103] intentionally omitted <==**

**----- Start of picture text -----**<br>
15 V<br>L Driver<br>VDS<br>RG D.U.T. +<br>- [V][DD] A<br>IAS<br>20 V<br>tp 0.01 Ω<br>**----- End of picture text -----**<br>


**Fig. 12a - Unclamped Inductive Test Circuit** 

**==> picture [148 x 97] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>t<br>p<br>IAS<br>**----- End of picture text -----**<br>


**Fig. 12b - Unclamped Inductive Waveforms** 

**==> picture [194 x 389] intentionally omitted <==**

**----- Start of picture text -----**<br>
 1000<br>OPERATION IN THIS AREA LIMITED<br>BY RDS(on)<br> 100 10us<br>100us<br> 10<br>1ms<br> T  T CJ = 25  C = 150  C° ° 10ms<br> Single Pulse<br> 1<br> 10  100  100<br>V     , Drain-to-Source Voltage (V)DS<br>Fig. 12c - Maximum Avalanche Energy vs. Drain Current<br>2000<br>ID<br>TOP 21A<br>30A<br>BOTTOM 46A<br>1500<br>1000<br>500<br>0<br>25 50 75 100 125 150<br>Starting T  , Junction TemperatureJ (  C)°<br>Fig. 12d - Maximum Safe Operating Area<br>I   , Drain Current (A) D<br>AS<br>E     , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig. 12c - Maximum Avalanche Energy vs. Drain Current** 

S21-0019-Rev. D, 18-Jan-2021 

Document Number: 91260 

**5** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**SiHFPS40N50L** 

Vishay Siliconix 

## www.vishay.com 

**==> picture [145 x 146] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current regulator<br>Same type as D.U.T.<br>50 kΩ<br>12 V 0.2 µF<br>0.3 µF<br>+<br>D.U.T. - VDS<br>VGS<br>3 mA<br>IG ID<br>Current sampling resistors<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
QG<br>VGS<br>QGS QGD<br>VG<br>Charge<br>**----- End of picture text -----**<br>


**Fig. 13b - Basic Gate Charge Waveform** 

**Fig. 13a - Gate Charge Test Circuit** 

S21-0019-Rev. D, 18-Jan-2021 

Document Number: 91260 

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**SiHFPS40N50L** 

Vishay Siliconix 

**==> picture [77 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.vishay.com<br>**----- End of picture text -----**<br>


## **Peak Diode Recovery dV/dt Test Circuit** 

**==> picture [284 x 462] intentionally omitted <==**

**----- Start of picture text -----**<br>
+ Circuit layout considerations<br>D.U.T.<br>•  Low stray inductance<br>•  Ground plane<br>•  Low leakage inductance<br>current transformer<br>-<br>+<br>- - +<br>Rg •  dV/dt controlled by Rg +<br>••   Driver same type as D.U.T.ISD controlled by duty factor “D” - VDD<br>•  D.U.T. - device under test<br>Driver gate drive<br>P.W.<br>Period D =<br>P.W. Period<br>VGS = 10 V [a]<br>D.U.T. lSD waveform<br>Reverse<br>recovery Body diode forward<br>current current dI/dt<br>D.U.T. VDS waveform Diode recovery<br>dV/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>Inductor current<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = 5 V for logic level devices<br>**----- End of picture text -----**<br>


**Fig. 14 - For N-Channel** 

_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91260._ 

Document Number: 91260 

S21-0019-Rev. D, 18-Jan-2021 

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**Package Information** 

Vishay Siliconix 

www.vishay.com 

## **TO-274AA (High Voltage)** 

## **VERSION 1: FACILITY CODE = Y** 

**==> picture [470 x 348] intentionally omitted <==**

**----- Start of picture text -----**<br>
A<br>B E A<br>D2<br>E4 A1 E1<br>R<br>D1<br>D<br>L1<br>L Detail “A”<br>C<br>e b<br>A2<br>0.10 (0.25) M B A M<br>b2 b4<br>Lead Tip<br>Detail “A”<br>10°<br>5°<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
b2 b4<br>Detail “A”<br>Scale: 2:1<br>**----- End of picture text -----**<br>


||**MILLIMETERS**|**MILLIMETERS**|**INCHES**|**INCHES**|
|---|---|---|---|---|
|**DIM.**<br>**M**|**IN.**|**MAX.**|**MIN.**|**MAX.**|
|A<br>4|.70|5.30|0.185|0.209|
|A1<br>1|.50|2.50|0.059|0.098|
|A2<br>2|.25|2.65|0.089|0.104|
|b<br>1|.30|1.60|0.051|0.063|
|b2<br>1|.80|2.20|0.071|0.087|
|b4<br>3|.00|3.25|0.118|0.128|
|c(1)<br>0|.38|0.89|0.015|0.035|
|D<br>1|9.80|20.80|0.780|0.819|



||**MILLIMETERS**|**MILLIMETERS**|**INCHES**|**INCHES**|
|---|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|**MIN.**|**MAX.**|
|D1|15.50|16.10|0.610|0.634|
|D2|0.70|1.30|0.028|0.051|
|E|15.10|16.10|0.594|0.634|
|E1|13.30|13.90|0.524|0.547|
|e|5.45 BSC||0.215 BSC||
|L|13.70|14.70|0.539|0.579|
|L1|1.00|1.60|0.039|0.063|
|R|2.00|3.00|0.079|0.118|



## **Notes** 

- Dimensioning and tolerancing per ASME Y14.5M-1994 

- Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outer extremes of the plastic body 

- Outline conforms to JEDEC[®] outline to TO-274AA 

- (1) Dimension measured at tip of lead 

Revision: 19-Oct-2020 

Document Number: 91365 

**1** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

**==> picture [77 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.vishay.com<br>**----- End of picture text -----**<br>


## Vishay Siliconix 

## **VERSION 2: FACILITY CODE = N** 

**==> picture [303 x 349] intentionally omitted <==**

**----- Start of picture text -----**<br>
H H<br>b3<br>b1<br>0.25 M B A M<br>b’, b2, b4<br>Base metal<br>b, b1, b3<br>Plating<br>A A B<br>E<br>E3 A2<br>F F<br>C<br>G G<br>A1<br>e<br>3 x b<br>C E4<br>E1<br>D2<br>D1<br>D<br>L1<br>L<br>C C’<br>Q<br>E2<br>**----- End of picture text -----**<br>


SECTION "F-F", "G-G" AND "H-H" SCALE: NONE 

|||||SCALE: NON|E|E|
|---|---|---|---|---|---|---|
||**MILLIMETERS**||||**MILLIMETERS**||
|**DIM.**|**MIN.**|**MAX.**||**DIM.**|**MIN.**|**MAX.**|
|A|4.83|5.21||D1|16.25|17.65|
|A1|2.29|2.54||D2|0.50|0.80|
|A2|1.91|2.16||E|15.75|16.13|
|b’|1.07|1.28||E1|13.10|14.15|
|b|1.07|1.33||E2|3.68|5.10|
|b1|1.91|2.41||E3|1.00|1.90|
|b2|1.91|2.16||E4|12.38|13.43|
|b3|2.87|3.38||e|5.44 BSC||
|b4|2.87|3.13||N|3||
|c’|0.55|0.65||L|19.81|20.32|
|c|0.55|0.68||L1|3.70|4.00|
|D|20.80|21.10||Q|5.49|6.00|
|ECN: E20-0538-Rev. C, 19-Oct-2020<br>DWG: 5975|||||||



ECN: E20-0538-Rev. C, 19-Oct-2020 DWG: 5975 

## **Notes** 

- Dimensioning and tolerancing per ASME Y14.5M-1994 

- Outline conforms to JEDEC[®] outline to TO-274AD 

- Dimensions are measured in mm, angles are in degree 

- Metal surfaces are tin plated, except area of cut 

Revision: 19-Oct-2020 

Document Number: 91365 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Legal Disclaimer Notice** Vishay 

www.vishay.com 

## **Disclaimer** 

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product.  To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. 

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications.  Such statements are not binding statements about the suitability of products for a particular application.  It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time.  All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts.  Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. 

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. 

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay.  Product names and markings noted herein may be trademarks of their respective owners. 

_**© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED**_ 

Revision: 01-Jan-2021 

Document Number: 91000 

**1** 



## Links

- [View this product on Novapart](https://novapart.co/products/SIHFPS40N50L-GE3/power-mosfet-n-channel-500-v-46-a-01-ohm-super-247)
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- [Supplier page](https://es.farnell.com/vishay/sihfps40n50l-ge3/mosfet-n-ch-500v-46a-super-247/dp/3650270)
---

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