# Power MOSFET, P Channel, 100 V, 1.1 A, 1.2 ohm, SOT-223, Surface Mount

![Product image](https://novapart.co/image/farnell:3772821/)

**URL**: https://novapart.co/products/SIHFL9110TR-GE3/power-mosfet-p-channel-100-v-11-a-12-ohm-sot-223
**SKU**: SIHFL9110TR-GE3
**Manufacturer**: VISHAY
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2330
**Stock**: 1000+
**Lead Time**: 274 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 3.1W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SOT-223 |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 1.1A |
| Drain Source On State Resistance | 1.2ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3772821/)

**IRFL9110, SiHFL9110** 

Vishay Siliconix 

www.vishay.com 

## **Power MOSFET** 

**==> picture [182 x 111] intentionally omitted <==**

**----- Start of picture text -----**<br>
S<br>SOT-223 G<br>D<br>S<br>G [D]<br>D<br>P-Channel MOSFET<br>**----- End of picture text -----**<br>


## Marking code: FF 

|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**||||
|---|---|---|---|---|
|VDS(V)<br>RDS(on)()||-100<br>VGS= -10 V||1.2|
|Qgmax. (nC)<br>Qgs(nC)<br>Qgd(nC)||8.7<br>2.2<br>4.1|||
|Configuration||Single|||



## **FEATURES** 

- Surface-mount 

- Available in tape and reel 

- Dynamic dv/dt rating 

- Repetitive avalanche rated 

- P-channel 

**==> picture [20 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
Available<br>**----- End of picture text -----**<br>


- Fast switching 

- Ease of paralleling 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

## **DESCRIPTION** 

Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. 

The SOT-223 package is designed for surface-mount using vapor phase, infrared, or wave soldering techniques. Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25 W is possible in a typical surface mount application. 

## **ORDERING INFORMATION** 

|Package|SOT-223|
|---|---|
||SiHFL9110TR-GE3a|
|Lead (Pb)-free and halogen-free|IRFL9110TRPbF-BE3a, b|
|Lead (Pb)-free|IRFL9110TRPbFa|



## **Notes** 

a. See device orientation 

b. “-BE3” denotes alternate manufacturing location 

|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)|||
|---|---|---|---|---|---|
|**PARAMETER**|||**SYMBOL**|**LIMIT**|**UNIT**|
|Drain-source voltage|||VDS|-100|V|
|Gate-source voltage|||VGS|± 20||
|Continuous drain current|VGSat -10 V|TC= 25 °C|ID|-1.1|A|
|||TC= 100 °C||-0.69||
|Pulsed drain currenta|||IDM|-8.8||
|Linear deratingfactor||||0.025|W/°C|
|Linear deratingfactor (PCB mount)e||||0.017||
|Single pulse avalanche energyb|||EAS|100|mJ|
|Avalanche currenta|||IAR|-1.1|A|
|Repetitive avalanche energya|||EAR|0.31|mJ|
|Maximum power dissipation|TC=|25 °C|PD|3.1|W|
|Maximum power dissipation (PCB mount)e|TA=|25 °C||2.0||
|Peak diode recovery dv/dtc|||dv/dt|-5.5|V/ns|
|Operatingjunction and storage temperature range|||TJ, Tstg|-55 to +150|°C|
|Solderingrecommendations (peak temperature)d|For|10 s||300||



## **Notes** 

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) 

b. VDD = -25 V, starting TJ = 25 °C, L = 7.7 mH, Rg = 25  , IAS = -4.4 A (see fig. 12) 

c. ISD  -4.4 A, di/dt  -75 A/μs, VDD  VDS, TJ  150 °C 

d. 1.6 mm from case 

e. When mounted on 1" square PCB (FR-4 or G-10 material) 

S21-0322-Rev. G, 05-Apr-2021 

**1** 

Document Number: 91196 

For technical questions, contact: hvm@vishay.com 

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFL9110, SiHFL9110** 

Vishay Siliconix 

www.vishay.com 

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|Maximum junction-to-ambient<br>(PCB mount)a|RthJA|-|-|60|°C/W|
|Maximum junction-to-case (drain)|RthJC|-|-|40||



## **Note** 

a. When mounted on 1" square PCB (FR-4 or G-10 material) 

|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-source breakdown voltage|VDS|VGS= 0 V, ID= -250 μA||-100|-|-|V|
|VDStemperature coefficient|VDS/TJ|Reference to 25 °C, ID= -1 mA||-|-0.091|-|V/°C|
|Gate-source threshold voltage|VGS(th)|VDS= VGS, ID= -250 μA||-2.0|-|-4.0|V|
|Gate-source leakage|IGSS|VGS= ± 20 V||-|-|± 100|nA|
|Zero gate voltage drain current|IDSS|VDS= -100 V, VGS= 0 V||-|-|-100|μA|
|||VDS= -80 V, VGS= 0 V, TJ= 125 °C||-|-|- 500||
|Drain-source on-state resistance|RDS(on)|VGS= -10 V|ID= -0.66 Ab|-|-|1.2||
|Forward transconductance|gfs|VDS= -50 V, ID= -0.66 A||0.82|-|-|S|
|**Dynamic**||||||||
|Input capacitance|Ciss|VGS= 0 V,<br>VDS= - 25 V,<br>f = 1.0 MHz, see fig. 5||-|200|-|pF|
|Output capacitance|Coss|||-|94|-||
|Reverse transfer capacitance|Crss|||-|18|-||
|Totalgate charge|Qg|VGS= -10 V|ID= -4.0 A, VDS= -80 V,<br>see fig. 6 and 13b|-|-|8.7|nC|
|Gate-source charge|Qgs|||-|-|2.2||
|Gate-drain charge|Qgd|||-|-|4.1||
|Turn-on delay time|td(on)|VDD= -50 V, ID= -4.0 A,<br>Rg= 24, RD= 11, see fig. 10b||-|10|-|ns|
|Rise time|tr|||-|27|-||
|Turn-off delay time|td(off)|||-|15|-||
|Fall time|tf|||-|17|-||
|Internal drain inductance|LD|Between lead,<br>6 mm (0.25") from<br>package and center of<br>die contact<br>D<br>S<br>G||-|4.0|-|nH|
|Internal source inductance|LS|||-|6.0|-||
|**Drain-Source Body Diode Characteristics**||||||||
|Continuous source-drain diode current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p - n junction diode<br>S<br>D<br>G||-|-|-1.1|A|
|Pulsed diode forward currenta|ISM|||-|-|-8.8||
|Body diode voltage|VSD|TJ= 25 °C, IS= -1.1 A, VGS= 0 Vb||-|-|-5.5|V|
|Body diode reverse recovery time|trr|TJ= 25 °C, IF= -4.0 A, dI/dt = 100 A/μsb||-|80|160|ns|
|Body diode reverse recovery charge|Qrr|||-|0.15|0.30|μC|
|Forward turn-on time|ton|Intrinsic turn-on time is negligible (turn-on is dominated by LSand LD)||||||



## **Notes** 

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) 

b. Pulse width  300 μs; duty cycle  2 % 

S21-0322-Rev. G, 05-Apr-2021 

Document Number: 91196 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFL9110, SiHFL9110** Vishay Siliconix 

## www.vishay.com 

## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

**Fig. 1 - Typical Output Characteristics** 

**Fig. 2 - Typical Output Characteristics** 

**Fig. 3 - Typical Transfer Characteristics** 

**Fig. 4 - Normalized On-Resistance vs. Temperature** 

S21-0322-Rev. G, 05-Apr-2021 

Document Number: 91196 

**3** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

~~a~~ **IRFL9110, SiHFL9110** Vishay Siliconix 

## www.vishay.com 

**Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage** 

**Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage** 

**Fig. 7 - Typical Source-Drain Diode Forward Voltage** 

**Fig. 8 - Maximum Safe Operating Area** 

S21-0322-Rev. G, 05-Apr-2021 

Document Number: 91196 

**4** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFL9110, SiHFL9110** 

## www.vishay.com 

## Vishay Siliconix 

**==> picture [136 x 93] intentionally omitted <==**

**----- Start of picture text -----**<br>
RD<br>VDS<br>VGS<br>D.U.T.<br>R<br>g +- VDD<br>- 10 V<br>Pulse width ≤ 1 µs<br>Duty factor ≤ 0.1 %<br>**----- End of picture text -----**<br>


**Fig. 10a - Switching Time Test Circuit** 

**==> picture [134 x 83] intentionally omitted <==**

**----- Start of picture text -----**<br>
td(on) tr td(off) tf<br>VGS ee<br>10 % ee e e ee<br>V |<br>H<br>90 %VDS JN\_/<br>**----- End of picture text -----**<br>


**Fig. 9 - Maximum Drain Current vs. Case Temperature** 

**Fig. 10b - Switching Time Waveforms** 

**Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case** 

S21-0322-Rev. G, 05-Apr-2021 

Document Number: 91196 

**5** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**==> picture [506 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
IRFL9110, SiHFL9110<br>www.vishay.com Vishay Siliconix<br>vg] $J___________<br>L IAS<br>VDS —_—- --—-<br>Vary tp to obtain \ |<br>required IAS \<br>VDS \ |!<br>Rg D.U.T. |<br>+ [-] [V] DD<br>W IAS \ Ii \ VDD<br>t<br>+ - 10 V — p<br>tp 0.01 Ω<br>VDS<br>**----- End of picture text -----**<br>


**Fig. 12a - Unclamped Inductive Test Circuit** 

**Fig. 12b - Unclamped Inductive Waveforms** 

**Fig. 12c - Maximum Avalanche Energy vs. Drain Current** 

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**----- Start of picture text -----**<br>
Current regulator<br>Same type as D.U.T.<br>QG 50 kΩ<br>- 10 V 12 V 0.2 µF<br>0.3 µF<br>QGS QGD -<br>D.U.T. + VDS<br>VG VGS<br>- 3 mA<br>Charge = a<br>IG ID<br>Current sampling resistors<br>Fig. 13a - Basic Gate Charge Waveform  Fig. 13b - Gate Charge Test Circuit<br>**----- End of picture text -----**<br>


S21-0322-Rev. G, 05-Apr-2021 

Document Number: 91196 

**6** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFL9110, SiHFL9110** 

Vishay Siliconix 

**==> picture [77 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.vishay.com<br>**----- End of picture text -----**<br>


**==> picture [171 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Peak Diode Recovery dV/dt Test Circuit<br>**----- End of picture text -----**<br>


**==> picture [258 x 220] intentionally omitted <==**

**----- Start of picture text -----**<br>
D.U.T.<br>+<br>Circuit layout considerations<br>• Low stray inductance<br>• Ground plane<br>• Low leakage inductance<br>current transformer<br>-<br>+<br>-<br>Rg • dV/dt controlled by Rg +<br>• • D.U.T. - device under testISD controlled by duty factor “D” - VDD<br>Note<br>- +<br>**----- End of picture text -----**<br>


- Compliment N-Channel of D.U.T. for driver 

**==> picture [284 x 230] intentionally omitted <==**

**----- Start of picture text -----**<br>
Driver gate drive<br>P.W.<br>Period D =<br>P.W. Period<br>VGS = - 10 V [a]<br>D.U.T. lSD waveform<br>Reverse<br>recovery Body diode forward<br>current current<br>dI/dt<br>D.U.T. VDS waveform<br>Diode recovery<br>dV/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>Inductor current<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = - 5 V for logic level and - 3 V drive devices<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
 Fig. 14 - For P-Channel<br>**----- End of picture text -----**<br>


_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91196._ 

S21-0322-Rev. G, 05-Apr-2021 

Document Number: 91196 

**7** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

**==> picture [60 x 50] intentionally omitted <==**

## Vishay Siliconix 

## **SOT-223 (HIGH VOLTAGE)** 

**==> picture [388 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
D B A<br>3<br>B1 0.08 (0.003)<br>C<br>0.10 (0.004) M C  B M<br>A<br>4<br>3 H<br>E<br>0.20 (0.008) M C A M<br>L1<br>1 2 3<br>4 x L<br>3 x B<br>e θ<br>0.10 (0.004) M C B M<br>e1<br>4 x C<br>**----- End of picture text -----**<br>


||**MILLIMETERS**|**MILLIMETERS**|**INCHES**|**INCHES**|
|---|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|**MIN.**|**MAX.**|
|A|1.55|1.80|0.061|0.071|
|B|0.65|0.85|0.026|0.033|
|B1|2.95|3.15|0.116|0.124|
|C|0.25|0.35|0.010|0.014|
|D|6.30|6.70|0.248|0.264|
|E|3.30|3.70|0.130|0.146|
|e|2.30 BSC||0.0905 BSC||
|e1|4.60 BSC||0.181 BSC||
|H|6.71|7.29|0.264|0.287|
|L|0.91|-|0.036|-|
|L1|0.061 BSC||0.0024 BSC||
|θ|-|10'|-|10'|
|ECN: S-82109-Rev. A, 15-Sep-08<br>DWG: 5969|||||



ECN: S-82109-Rev. A, 15-Sep-08 DWG: 5969 

## **Notes** 

1. Dimensioning and tolerancing per ASME Y14.5M-1994. 

2. Dimensions are shown in millimeters (inches). 

3. Dimension do not include mold flash. 

4. Outline conforms to JEDEC outline TO-261AA. 

Document Number: 91363 Revision: 15-Sep-08 

www.vishay.com 1 

**Legal Disclaimer Notice** Vishay 

www.vishay.com 

## **Disclaimer** 

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product.  To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. 

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications.  Such statements are not binding statements about the suitability of products for a particular application.  It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time.  All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts.  Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. 

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. 

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay.  Product names and markings noted herein may be trademarks of their respective owners. 

_**© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED**_ 

Revision: 01-Jan-2021 

Document Number: 91000 

**1** 



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- [Supplier page](https://es.farnell.com/vishay/sihfl9110tr-ge3/mosfet-p-ch-100v-1-1a-sot-223/dp/3772821)
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