RJK0652DPB-00#J5

Preliminary Datasheet 

## **RJK0652DPB** 

## 60V, 35A, 7.0m max. Silicon N Channel Power MOS FET Power Switchin g 

R07DS0077EJ0200 Rev.2.00 Apr 09, 2013 

## **Features** 

- High speed switching 

- Capable of 4.5 V gate drive 

- Low drive current 

- High density mounting 

- Low on-resistance 

   - RDS(on) = 5.5 m  typ. (at VGS = 10 V) 

- Pb-free 

- Halogen-free 

## **Outline** 

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RENESAS Package code: PTZZ0005DA-A<br>(Package name: LFPAK)<br>5<br>D<br>5<br>4 1, 2, 3  Source<br>G 4  Gate<br>5   Drain<br>1 [2 34]<br>S S S<br>1 2 3<br>**----- End of picture text -----**<br>


## **Application** 

- Switching Mode Power Supply 

## **Absolute Maximum Ratings** 

(Ta = 25°C) 

||||(Ta = 25°C)|
|---|---|---|---|
|**Item**|**Symbol**|**Ratings **|**Unit**|
|Drain to source voltage|VDSS|60|V|
|Gate to source voltage|VGSS|20|V|
|Drain current|ID|35|A|
|Drainpeak current|ID(pulse)<br>Note1|140|A|
|Body-drain diode reverse drain current|IDR|35|A|
|Avalanche current|IAP Note 2|17.5|A|
|Avalanche energy|EAS Note 2|23|mJ|
|Channel dissipation|PchNote3|55|W|
|Channel to Case Thermal Resistance|ch-C|2.27|C/W|
|Channel temperature|Tch|150|C|
|Storage temperature|Tstg|–55 to +150|C|



Notes: 1. PW  10 s, duty cycle  1% 

2. Value at Tch = 25C, Rg  50  

3. Tc = 25C 

This product is for the low voltage drive (  10V). 

If the driving voltage is over 10 V under normal conditions, please use the product for high gate to source cutoff voltage (VGS(off)) which characteristics has been improved. 

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Page 1 of 6 

**RJK0652DPB** 

**Preliminary** 

## **Electrical Characteristics** 

(Ta = 25°C) 

|||||||(Ta = 25°C)|
|---|---|---|---|---|---|---|
|**Item**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|**Test Conditions**|
|Drain to source breakdown voltage|V(BR)DSS|60|—|—|V|ID= 10 mA, VGS= 0 V|
|Gate to source leak current|IGSS|—|—|0.1|A|VGS=20 V, VDS= 0 V|
|Zerogate voltage drain current|IDSS|—|—|1|A|VDS= 60 V, VGS= 0 V|
|Gate to source cutoff voltage|VGS(off)|1.2|—|2.5|V|VDS= 10 V, ID= 1 mA|
|Static drain to source on state<br>resistance|RDS(on)|—|5.5|7.0|m|ID= 17.5 A, VGS= 10 VNote4|
||RDS(on)|—|6.5|9.0|m|ID= 17.5 A, VGS= 4.5 VNote4|
|Forward transfer admittance||yfs||—|54|—|S|ID= 17.5 A, VDS= 10 VNote4|
|Input capacitance|Ciss|—|4100|—|pF|VDS= 10 V, VGS= 0 V,<br>f = 1 MHz|
|Output capacitance|Coss|—|485|—|pF||
|Reverse transfer capacitance|Crss|—|200|—|pF||
|Gate Resistance|Rg|—|0.4|—|||
|Totalgate charge|Qg|—|29|—|nC|VDD= 25 V, VGS= 4.5 V,<br>ID= 35 A|
|Gate to source charge|Qgs|—|13|—|nC||
|Gate to drain charge|Qgd|—|8.8|—|nC||
|Turn-on delaytime|td(on)|—|11|—|ns|VGS= 10 V, ID= 17.5 A,<br>VDD 30 V, RL= 1.71,<br>Rg = 4.7|
|Rise time|tr|—|7.0|—|ns||
|Turn-off delaytime|td(off)|—|54|—|ns||
|Fall time|tf|—|10|—|ns||
|Body–drain diode forward voltage|VDF|—|0.83|1.1|V|IF= 35 A, VGS= 0 VNote4|
|Body–drain diode reverse recovery<br>time|trr|—|35|—|ns|IF= 35 A, VGS= 0 V<br>diF/ dt = 100 A/s|



Notes: 4. Pulse test 

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**RJK0652DPB** 

**Preliminary** 

## **Main Characteristics** 

Power vs. Temperature Derating 

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80<br>60<br>40<br>20<br>0 50 100 150 200<br>Case Temperature   Tc  (°C)<br>Channel Dissipation   Pch  (W)<br>**----- End of picture text -----**<br>


Typical Output Characteristics 

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50<br>3.0 V 2.8 V<br>40 4.5 V, 10 V Pulse Test<br>30<br>2.6 V<br>20<br>10<br>0 2 4 6 8 10<br>Drain to Source Voltage   VDS  (V)<br>VGS = 2.4 V<br>  (A)<br>D<br>Drain Current   I<br>**----- End of picture text -----**<br>


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Drain to Source Saturation Voltage vs.<br>Gate to Source Voltage<br>500<br>Pulse Test<br>400<br>300<br>200<br>ID = 20 A<br>100<br>5 A 10 A<br>0<br>4 8 12 16 20<br>Gate to Source Voltage   VGS  (V)<br>  (mV)<br>DS (on)<br>Drain to Source Saturation Voltage                                     V<br>**----- End of picture text -----**<br>


Maximum Safe Operation Area 

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1000<br>Tc = 25°C<br>1 shot Pulse 10 μs<br>100<br>10<br>PW = 10 ms<br>1 Operation in<br>this area is<br>limited by R DS(on)<br>0.1 DC Operation<br>0.01<br>0.1 1 10 100<br>Drain to Source Voltage   VDS  (V)<br>1 ms 100<br>μs<br>  (A)<br>D<br>Drain Current   I<br>**----- End of picture text -----**<br>


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Typical Transfer Characteristics<br>50<br>VDS = 10 V<br>Pulse Test<br>40<br>30<br>20<br>Tc = 75°C<br>10 25°C<br>–25°C<br>0 1 2 3 4 5<br>Gate to Source Voltage   VGS  (V)<br>Static Drain to Source on State Resistance<br>vs. Drain Current<br>10<br>Pulse Test<br>1<br>V GS  = 4.5 V<br>10 V<br>0.1<br>0.1 1 10 100 1000<br>Drain Current   ID  (A)<br>  (A)<br>D<br>Drain Current   I<br>)Ω<br>  (m<br>DS (on)<br>Drain to Source on State Resistance                                      R<br>**----- End of picture text -----**<br>


Static Drain to Source on State Resistance vs. Drain Current 

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**RJK0652DPB** 

**Preliminary** 

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Static Drain to Source on State Resistance Typical Capacitance vs.<br>vs. Temperature Drain to Source Voltage<br>20 10000<br>Pulse Test Pulse Test<br>Ciss<br>ID = 17.5 A<br>16<br>1000<br>12<br>VGS = 4.5 V Coss<br>8 Crss<br>10 V 100<br>4<br>V GS  = 0<br>f = 1 MHz<br>0 10<br>–25 0 25 50 75 100 125 150 0 10 20 30 40 50<br>Case Temperature   Tc  (°C) Drain to Source Voltage   VDS  (V)<br>Reverse Drain Current vs.<br>Dynamic Input Characteristics Source to Drain Voltage<br>100 20 50<br>ID = 35 A 10 V Pulse Test<br>80 V GS 16 40 5 V<br>V DD = 50 V<br>25 V<br>60 10 V 12 30<br>VDS<br>40 8 20<br>20 VDD = 50 V 4 10<br>25 V VGS = 0 V<br>10 V<br>0 0<br>0 20 40 60 80 100 0 0.4 0.8 1.2 1.6 2.0<br>Gate Charge   Qg  (nC) Source to Drain Voltage   VSD  (V)<br>Maximum Avalanche Energy vs.<br>Channel Temperature Derating<br>25<br>I AP = 17.5 A<br>VDD = 20 V<br>20 duty < 0.1 %<br>Rg ≥ 50 Ω<br>15<br>10<br>5<br>0<br>25 50 75 100 125 150<br>Channel Temperature   Tch  (°C)<br>)Ω<br>  (m<br>DS (on)<br>Capacitance   C  (pF)<br>Static Drain to Source on State Resistance                                                R<br>  (V)   (V)<br>DS GS   (A)<br>DR<br>Drain to Source Voltage   V Gate to Source Voltage   V Reverse Drain Current   I<br>  (mJ)<br>AS<br>Avalanche Energy   E<br>**----- End of picture text -----**<br>


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**RJK0652DPB** 

**Preliminary** 

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Normalized Transient Thermal Impedance vs. Pulse Width<br>3<br>Tc = 25 ° C<br>1<br>D = 1<br>0.5<br>0.3<br>0.1 θch – c (t) = γ s (t) • θch – c<br>θch – c = 2.27°C/W, Tc = 25°C<br>PW<br>PDM D = T<br>0.03<br>PW<br>T<br>0.01<br>10 μ 100 μ 1 m 10 m 100 m 1 10<br>Pulse Width  PW  (s)<br>Avalanche Test Circuit Avalanche Waveform<br>1 VDSS<br>VDS L EAS =   2   L • IAP [2 ] • VDSS – VDD<br>Monitor<br>IAP V<br>Monitor (BR)DSS<br>IAP<br>Rg D. U. T VDD VDS<br>ID<br>Vin<br>50 Ω<br>15 V<br>VDD<br>0<br>Switching Time Test Circuit Switching Time Waveform<br>Vin Monitor Vout 90%<br>Monitor<br>D.U.T.<br>Rg RL Vin 10%<br>Vout 10% 10%<br>Vin VDS<br>10 V = 30 V<br>90% 90%<br>td(on) tr td(off) tf<br>0.2<br>0.1<br>0.05<br>0.02<br>0.01<br>1shot pulse<br>s  (t)<br>γ<br>Normalized Transient Thermal Impedance<br>**----- End of picture text -----**<br>


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**RJK0652DPB** 

**Preliminary** 

## **Package Dimensions** 

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Package Name JEITA Package Code RENESAS Code Previous Code MASS[Typ.]<br>LFPAK SC-100 PTZZ0005DA-A LFPAKV 0.080g Unit: mm<br>4.9<br>5.3 Max<br>4.0 ± 0.2 0.25 +0.05–0.03 3.3<br>5<br>1 4 +0.05<br>0.20 –0.03<br>0° – 8°<br>0.75 Max<br>1.27 0.10<br>0.40 ± 0.06<br>0.25 M<br>(Ni/Pd/Au plating)<br>1.0<br>4.2<br>3.95 +0.1.1–0.3<br>6<br>+0.25 –0.20<br>0.6<br>1.3 Max<br>1.1 Max +0.030.07–0.04<br>**----- End of picture text -----**<br>


## **Ordering Information** 

|**Part No.**|**Quantity**|**Shipping Container**|
|---|---|---|
|RJK0652DPB-00-J5|2500pcs|Taping|



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© 2013 Renesas Electronics Corporation. All rights reserved. Colophon 2.2