# Bipolar Transistor Array, NPN, PNP, 50 V, 50 V, 150 mA, 150 mA, 180 mW

![Product image](https://novapart.co/image/farnell:2439792/)

**URL**: https://novapart.co/products/PUMZ2,115/bipolar-transistor-array-npn-pnp-50-v-150-ma-180
**SKU**: PUMZ2,115
**Manufacturer**: NEXPERIA
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Bipolar Junction Transistor Arrays - BJT
**Price**: €0.0510
**Stock**: 10+
**Lead Time**: 78 days (indicative)

## Description

Transistor Polarity:NPN, PNP; Collector Emitter Voltage V(br)ceo:50V; Power Dissipation Pd:180mW; DC Collector Current:150mA; DC Current Gain hFE:250hFE; Transistor Case Style:SOT-363; No.

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 6Pins |
| Product Range | - |
| Qualification | - |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | NPN, PNP |
| Power Dissipation Npn | 180mW |
| Power Dissipation Pnp | 180mW |
| Transistor Case Style | SOT-363 |
| Transition Frequency Npn | 100MHz |
| Transition Frequency Pnp | 190MHz |
| Operating Temperature Max | 150°C |
| Dc Current Gain Hfe Min Npn | 120hFE |
| Dc Current Gain Hfe Min Pnp | 120hFE |
| Continuous Collector Current Npn | 150mA |
| Continuous Collector Current Pnp | 150mA |
| Collector Emitter Voltage Max Npn | 50V |
| Collector Emitter Voltage Max Pnp | 50V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2439792/)

**==> picture [65 x 51] intentionally omitted <==**

## **PIMZ2; PUMZ2** 

## **NPN/PNP general-purpose double transistors** 

**Rev. 06 — 17 November 2009** 

**Product data sheet** 

## **1. Product profile** 

## **1.1 General description** 

NPN/PNP general-purpose double transistors. 

## **Table 1. Product overview** 

|**Type number**|**Package**|**Package**|**Configuration**|
|---|---|---|---|
||**NXP**|**JEITA**||
|PIMZ2|SOT457<br>SC-74<br>NPN/PNP double transistors|||
|PUMZ2|SOT363<br>SC-88<br>NPN/PNP double transistors|||



## **1.2 Features** 

- Simplified circuit design 

- Reduced component count 

- Reduced pick and place costs 

## **1.3 Applications** 

- General-purpose switching and amplification 

## **1.4 Quick reference data** 

|**Table 2.**|**Quick reference data**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|VCEO|collector-emitter voltage|open base|-|-|50|V|
|IC|collector current (DC)||-|-|150|mA|



**==> picture [81 x 42] intentionally omitted <==**

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **2. Pinning information** 

## **Table 3. Pinning** 

|**Pin**<br>**Description**<br>**Simplified outline**<br>**Symbol**|**Pin**<br>**Description**<br>**Simplified outline**<br>**Symbol**|
|---|---|
|**PIMZ2 (SOT457)**||
|1<br>collector TR2<br>2<br>emitter TR2<br>3<br>collector TR1<br>4<br>emitter TR1<br>5<br>base TR1<br>6<br>base TR2|1<br>3<br>2<br>4<br>5<br>6<br>_sym082_<br>1<br>3<br>2<br>4<br>5<br>6<br>TR1<br>TR2|



## **PUMZ2 (SOT363)** 

**==> picture [383 x 97] intentionally omitted <==**

**----- Start of picture text -----**<br>
1 emitter TR1<br>6 5 4 6 5 4<br>2 base TR1<br>3 base TR2 TR2<br>4 collector TR2 TR1<br>5 emitter TR2 1 2 3<br>6 collector TR1<br>1 2 3<br>sym083<br>**----- End of picture text -----**<br>


## **3. Ordering information** 

## **Table 4. Ordering information** 

|**Type number**|**Package**|**Package**|**Package**|
|---|---|---|---|
||**Name**|**Description**|**Version**|
|PIMZ2|SC-74<br>plastic surface mounted package; 6 leads<br>SOT457|||
|PUMZ2|SC-88<br>plastic surface mounted package; 6 leads<br>SOT363|||



## **4. Marking** 

## **Table 5. Marking codes** 

|**Type number**|**Marking code[1]**|
|---|---|
|PIMZ2|M6|
|PUMZ2|GZ*|



- [1] * = -: made in Hong Kong 

   - = t: made in Malaysia 

   - = W: made in China 

© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 **Product data sheet** 

**Rev. 06 — 17 November 2009** 

**2 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **5. Limiting values** 

## **Table 6. Limiting values** 

_In accordance with the Absolute Maximum Rating System (IEC 60134)._ 

|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Max**<br>**Unit**|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Max**<br>**Unit**|
|---|---|
|**Per transistor; for the PNP transistor with negative polarity**||
|VCBO|collector-base voltage<br>open emitter<br>-<br>60<br>V|
|VCEO|collector-emitter voltage<br>open base<br>-<br>50<br>V|
|VEBO|emitter-base voltage<br>open collector<br>-<br>7<br>V|
|IC|collector current (DC)<br>-<br>150<br>mA|
|ICM|peak collector current<br>-<br>200<br>mA|
|IBM|peak base current<br>-<br>100<br>mA|
|Ptot|total power dissipation<br>Tamb≤25°C|
||SOT457<br>[1]<br>-<br>200<br>mW|
||SOT363<br>[1]<br>-<br>180<br>mW|
|Tstg|storage temperature<br>−65<br>+150<br>°C|
|Tj|junction temperature<br>-<br>150<br>°C|
|Tamb|ambient temperature<br>−65<br>+150<br>°C|
|**Per device**||
|Ptot|total power dissipation<br>Tamb≤25°C|
||SOT457<br>[1]<br>-<br>300<br>mW|
||SOT363<br>[1]<br>-<br>300<br>mW|



- [1] Device mounted on an FR4 printed-circuit board. 

## **6. Thermal characteristics** 

## **Table 7. Thermal characteristics** 

|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|---|---|
|**Per transistor**||
|Rth(j-a)|thermal resistance from<br>junction to ambient<br>Tamb≤25°C|
||SOT457<br>[1]<br>-<br>-<br>625<br>K/W|
||SOT363<br>[1]<br>-<br>-<br>694<br>K/W|
|**Per device**||
|Rth(j-a)|thermal resistance from<br>junction to ambient<br>Tamb≤25°C|
||SOT457<br>[1]<br>-<br>-<br>417<br>K/W|
||SOT363<br>[1]<br>-<br>-<br>417<br>K/W|



[1] Device mounted on an FR4 printed-circuit board. 

© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 **Product data sheet** 

**Rev. 06 — 17 November 2009** 

**3 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **7. Characteristics** 

|**Table 8.**<br>**Characteristics**<br>_Tamb = 25_°_C unless otherwise specified._|**Table 8.**<br>**Characteristics**<br>_Tamb = 25_°_C unless otherwise specified._|
|---|---|
|**Symbol**<br>**Parameter**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**||
|**Per transistor; for the PNP transistor with negative polarity; unless otherwise specified**||
|ICBO<br>collector-base cut-off current|VCB= 60 V; IE= 0 A<br>-<br>-<br>100<br>nA|
||VCB= 60 V; IE= 0 A; Tj= 150°C<br>-<br>-<br>50<br>μA|
|IEBO<br>emitter-base cut-off current|VEB= 7 V; IC= 0 A<br>-<br>-<br>100<br>nA|
|hFE<br>DC current gain|VCE= 6 V; IC= 1 mA<br>120<br>250<br>560|
|**TR1 (PNP)**||
|VCEsat<br>collector-emitter saturation<br>voltage|IC=−50 mA; IB=−5 mA<br>-<br>-<br>−500<br>mV|
|fT<br>transition frequency|IE=−2 mA; VCE=−12 V; f = 100 MHz<br>-<br>190<br>-<br>MHz|
|Cc<br>collector capacitance|IE= ie= 0 A; VCB=−12 V; f = 1 MHz<br>-<br>2.3<br>5<br>pF|
|**TR2 (NPN)**||
|VCEsat<br>collector-emitter saturation<br>voltage|IC= 50 mA; IB= 5 mA<br>-<br>-<br>250<br>mV|
|fT<br>transition frequency|IE= 2 mA; VCE= 12 V; f = 100 MHz<br>100<br>-<br>-<br>MHz|
|Cc<br>collector capacitance|IE= ie= 0 A; VCB= 12 V; f = 1 MHz<br>-<br>-<br>3<br>pF|



© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 **Product data sheet** 

**Rev. 06 — 17 November 2009** 

**4 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **8. Package outline** 

## **Plastic surface-mounted package (TSOP6); 6 leads** 

**SOT457** 

**==> picture [478 x 561] intentionally omitted <==**

**----- Start of picture text -----**<br>
D B E A X<br>y HE v M A<br>6 5 4<br>Q<br>pin 1<br>index A<br>A1<br>c<br>1 2 3<br>Lp<br>e bp w M B<br>detail X<br>0 1 2 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>UNIT A A1 bp c D E e HE Lp Q v w y<br>1.1 0.1 0.40 0.26 3.1 1.7 3.0 0.6 0.33<br>mm 0.95 0.2 0.2 0.1<br>0.9 0.013 0.25 0.10 2.7 1.3 2.5 0.2 0.23<br>OUTLINE  REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION  IEC  JEDEC  JEITA PROJECTION<br>05-11-07<br> SOT457 SC-74<br>06-03-16<br>**----- End of picture text -----**<br>


**Fig 1. Package outline SOT457 (SC-74)** 

© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 

**Product data sheet** 

**Rev. 06 — 17 November 2009** 

**5 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

**Plastic surface-mounted package; 6 leads** 

## **SOT363** 

**==> picture [478 x 570] intentionally omitted <==**

**----- Start of picture text -----**<br>
D B E A X<br>y HE v M A<br>6 5 4<br>Q<br>pin 1<br>index A<br>A1<br>1 2 3 c<br>e1 bp w M B Lp<br>e<br>detail X<br>0 1 2 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>A1<br>UNIT A max bp c D E e e1 HE Lp Q v w y<br>1.1 0.30 0.25 2.2 1.35 2.2 0.45 0.25<br>mm 0.1 1.3 0.65 0.2 0.2 0.1<br>0.8 0.20 0.10 1.8 1.15 2.0 0.15 0.15<br>OUTLINE  REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION  IEC  JEDEC  JEITA PROJECTION<br>04-11-08<br> SOT363 SC-88<br>06-03-16<br>**----- End of picture text -----**<br>


## **Fig 2. Package outline SOT363 (SC-88)** 

© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 

**Product data sheet** 

**Rev. 06 — 17 November 2009** 

**6 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **9. Revision history** 

**Table 9.** 

|**Table 9.**|**Revision**|**history**||||||
|---|---|---|---|---|---|---|---|
|**Document**|**ID**|**Release date**||**Data sheet status**|**Change notice**||**Supersedes**|
|PIMZ2_PUMZ2_6||20091117||Product data sheet|-||PIMZ2_PUMZ2_5|
|Modifications:||**•** This data||sheet was changed to reflect the|new company name NXP Semiconductors,|||
|||including new legal definitions and disclaimers. No changes were made to the technical||||||
|||content.||||||
|||**•** Table 3“<br>Pinning<br>”<br>:updated||||||
|||**•** Figure 1|“<br>Package outline SOT457 (SC-74)<br>”<br>:updated|||||
|||**•** Figure 2|“<br>Package outline SOT363 (SC-88)<br>”<br>:updated|||||
|||||||||
|PIMZ2_PUMZ2_5||20041124||Product data sheet|-||PIMZ2_PUMZ2_4|
|PIMZ2_PUMZ2_4||20031217||Product specification|-||PIMZ2_2|
|PIMZ2_2||20030714||Product specification|-||PIMZ2_1|
|PIMZ2_1||20030602||Objective specification|-||-|



© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 **Product data sheet** 

**Rev. 06 — 17 November 2009** 

**7 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **10. Legal information** 

## **10.1 Data sheet status** 

|**Document statu**~~**s**~~**[1]**<br>**[2]**|**Product status[3]**|**Definition**|
|---|---|---|
|Objective [short] data sheet|Development|This document contains data from the objective specification for product development.|
|Preliminary [short] data sheet|Qualification|This document contains data from the preliminary specification.|
|Product [short] data sheet|Production|This document contains the product specification.|



- [1] Please consult the most recently issued document before initiating or completing a design. 

[2] The term ‘short data sheet’ is explained in section “Definitions”. 

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 

## **10.2 Definitions** 

**Draft —** The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 

**Short data sheet —** A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 

## **10.3 Disclaimers** 

**General —** Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. 

**Right to make changes —** NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 

**Suitability for use —** NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 

damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 

**Applications —** Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 

**Limiting values —** Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. 

**Terms and conditions of sale —** NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. 

**No offer to sell or license —** Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 

**Export control —** This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 

**Quick reference data —** The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 

## **10.4 Trademarks** 

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 

## **11. Contact information** 

For more information, please visit: **http://www.nxp.com** 

For sales office addresses, please send an email to: **salesaddresses@nxp.com** 

© NXP B.V. 2009. All rights reserved. 

PIMZ2_PUMZ2_6 

**Product data sheet** 

**Rev. 06 — 17 November 2009** 

**8 of 9** 

**PIMZ2 PUMZ2 ;** 

**NXP Semiconductors** 

**NPN/PNP general-purpose double transistors** 

## **12. Contents** 

|**1**|**Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .  1**|
|---|---|
|1.1|General description  . . . . . . . . . . . . . . . . . . . . .  1|
|1.2|Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  1|
|1.3|Applications  . . . . . . . . . . . . . . . . . . . . . . . . . . .  1|
|1.4|Quick reference data  . . . . . . . . . . . . . . . . . . . .  1|
|**2**|**Pinning information. . . . . . . . . . . . . . . . . . . . . .  2**|
|**3**|**Ordering information. . . . . . . . . . . . . . . . . . . . .  2**|
|**4**|**Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  2**|
|**5**|**Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .  3**|
|**6**|**Thermal characteristics  . . . . . . . . . . . . . . . . . .  3**|
|**7**|**Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . .  4**|
|**8**|**Package outline . . . . . . . . . . . . . . . . . . . . . . . . .  5**|
|**9**|**Revision history. . . . . . . . . . . . . . . . . . . . . . . . .  7**|
|**10**|**Legal information. . . . . . . . . . . . . . . . . . . . . . . .  8**|
|10.1|Data sheet status . . . . . . . . . . . . . . . . . . . . . . .  8|
|10.2|Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8|
|10.3|Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8|
|10.4|Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .  8|
|**11**|**Contact information. . . . . . . . . . . . . . . . . . . . . .  8**|
|**12**|**Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9**|



Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 

**==> picture [84 x 52] intentionally omitted <==**

**© NXP B.V. 2009.** 

**All rights reserved.** 

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com **Date of release: 17 November 2009 Document identifier: PIMZ2_PUMZ2_6** 



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---

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