# Bipolar (BJT) Single Transistor, PNP, 40 V, 5 A, 550 mW, SOT-89, Surface Mount

![Product image](https://novapart.co/image/farnell:8736626/)

**URL**: https://novapart.co/products/PBSS5540X,135/bipolar-bjt-single-transistor-pnp-40-v-5-a-550-mw
**SKU**: PBSS5540X,135
**Manufacturer**: NEXPERIA
**Price**: €0.2710
**Stock**: 10+
**Lead Time**: 373 days (indicative)

## Description

Transistor Polarity:PNP; Collector Emitter Voltage V(br)ceo:40V; Transition Frequency ft:-; Power Dissipation Pd:550mW; DC Collector Current:5A; DC Current Gain hFE:250hFE; Transistor Case Style:

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 550mW |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | PNP |
| Transition Frequency | - |
| Transistor Case Style | SOT-89 |
| Dc Current Gain Hfe Min | 250hFE |
| Operating Temperature Max | 150°C |
| Continuous Collector Current | 5A |
| Collector Emitter Voltage Max | 40V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:8736626/)

## _**DISCRETE SEMICONDUCTORS**_ 

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DATA SHEET<br>**----- End of picture text -----**<br>


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book, halfpage<br>M3D109<br>**----- End of picture text -----**<br>


**PBSS5540X** 40 V, 5 A PNP low V CEsat (BISS) transistor 

Product data sheet 2004 Nov 04 Supersedes data of 2004 Jan 15 

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**NXP Semiconductors** 

**Product data sheet** 

**PBSS5540X** 

## **40 V, 5 A PNP low VCEsat (BISS) transistor** 

## **FEATURES** 

- Low collector-emitter saturation voltage VCEsat 

- High collector current capability: IC and ICM 

- High efficiency leading to less heat generation. 

## **APPLICATIONS** 

- Supply line switching circuits 

- Battery management applications 

- DC/DC converter applications 

- Strobe flash units 

- Medium power driver (e.g. relays, buzzers and motors). 

## **DESCRIPTION** 

PNP low VCEsat transistor in a medium power SOT89 (SC-62) package. 

## **QUICK REFERENCE DATA** 

|**SYMBOL**|**PARAMETER**|**MAX.**|**UNIT**|
|---|---|---|---|
|VCEO|collector-emitter voltage|−40|V|
|IC|collector current(DC)|−4|A|
|ICRP|repetitive peak collector<br>current|−5|A|
|RCEsat|equivalent<br>on-resistance|75|mΩ|



## **PINNING** 

|**PINNING**||
|---|---|
|**PIN**|**DESCRIPTION**|
|1|emitter|
|2|collector|
|3|base|



NPN complement: PBSS4540X. 

## **MARKING** 

|**MARKING**||
|---|---|
|**TYPE NUMBER**|**MARKING CODE**(1)|
|PBSS5540X|*1G|



## **Note** 

1. * = p: Made in Hong Kong. 

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2<br>3<br>1<br>3 2 1 sym079<br>**----- End of picture text -----**<br>


- = t: Made in Malaysia. 

- = W: Made in China. 

Fig.1  Simplified outline (SOT89) and symbol. 

## **ORDERING INFORMATION** 

|**TYPE NUMBER**|**PACKAGE**|**PACKAGE**|**PACKAGE**|
|---|---|---|---|
||**NAME**|**DESCRIPTION**|**VERSION**|
|PBSS5540X|SC-62|plastic surface mounted package; collector pad for good heat<br>transfer; 3 leads|SOT89|



2004 Nov 04 

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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

## **LIMITING VALUES** 

In accordance with the Absolute Maximum Rating System (IEC 60134). 

|**SYMBOL**|**PARAMETER**|**CONDITIONS**|**MIN.**|**MAX.**|**UNIT**|
|---|---|---|---|---|---|
|VCBO|collector-base voltage|open emitter|−|−40|V|
|VCEO|collector-emitter voltage|open base|−|−40|V|
|VEBO|emitter-base voltage|open collector|−|−6|V|
|ICM|peak collector current|tp ≤1 ms|−|−10|A|
|ICRP|repetitivepeak collector current|tp ≤10 ms;δ ≤0.2|−|−5|A|
|IC|collector current(DC)||−|−4|A|
|IBM|peak base current|tp ≤1 ms|−|−2|A|
|IB|base current(DC)||−|−1|A|
|Ptot|total power dissipation|Tamb ≤25°C<br>tp ≤10 ms;δ ≤0.2; note 1 <br>note 1<br>note 2<br>note 3<br>note 4|−<br>−<br>−<br>−<br>−|2.5<br>0.55<br>1<br>1.4<br>1.6|W<br>W<br>W<br>W<br>W|
|Tstg|storage temperature||−65|+150|°C|
|Tj|junction temperature||−|150|°C|
|Tamb|ambient temperature||−65|+150|°C|



## **Notes** 

1. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint. 

2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm[2] . 

3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm[2] . 

4. Device mounted on a 7 cm[2] ceramic printed-circuit board, 1 cm[2] single-sided copper and tin-plated. 

2004 Nov 04 

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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

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001aaa229<br>1600<br>Ptot (1)<br>(mW)<br>1200<br>(2)<br>800<br>(3)<br>400<br>0<br>− 50 0 50 100 150 200<br>Tamb ( ° C)<br>(1) FR4 PCB; 6 cm [2]  mounting pad for collector.<br>(2) FR4 PCB; 1 cm [2]  mounting pad for collector.<br>(3) FR4 PCB; standard footprint.<br>**----- End of picture text -----**<br>


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Fig.2  Power derating curves.<br>**----- End of picture text -----**<br>


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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

## **THERMAL CHARACTERISTICS** 

|**SYMBOL**|**PARAMETER**|**CONDITIONS**|**VALUE**|**UNIT**|
|---|---|---|---|---|
|Rth(j-a)|thermal resistance from junction to<br>ambient|in free air<br>notes 1 and 2<br>note 2<br>note 3<br>note 4<br>note 5|50<br>225<br>125<br>90<br>80|K/W<br>K/W<br>K/W<br>K/W<br>K/W|
|Rth(j-s)|thermal resistance from junction to<br>soldering point||16|K/W|



## **Notes** 

1. Pulse test: tp ≤ 10 ms; δ ≤ 0.2. 

2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint. 

3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm[2] . 

4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm[2] . 

5. Device mounted on a 7 cm[2] ceramic printed-circuit board, 1 cm[2] single-sided copper and tin-plated. 

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006aaa232<br>10 [3]<br>Zth<br>(K/W) (1)<br>(2)<br>10 [2] (3)<br>(4)<br>(5)<br>(6)<br>10 (7)<br>(8)<br>(9)<br>(10)<br>1<br>10 [−] [1]<br>10 [−] [5] 10 [−] [4] 10 [−] [3] 10 [−] [2] 10 [−] [1] 1 10 10 [2] 10 [3]<br>tp (s)<br>Mounted on FR4 printed-circuit board; standard footprint.<br>(1) δ = 1. (3) δ = 0.5. (5) δ = 0.2. (7) δ = 0.05. (9) δ = 0.01.<br>(2) δ = 0.75. (4) δ = 0.33. (6) δ = 0.1. (8) δ = 0.02. (10) δ = 0.<br>Fig.3  Transient thermal impedance as a function of pulse time; typical values.<br>**----- End of picture text -----**<br>


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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

**==> picture [483 x 248] intentionally omitted <==**

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006aaa233<br>10 [3]<br>Zth<br>(K/W)<br>(1)<br>10 [2]<br>(2)<br>(3)<br>(4)<br>(5)<br>(6)<br>10<br>(7)<br>(8)<br>(9)<br>1<br>(10)<br>10 [−] [1]<br>10 [−] [5] 10 [−] [4] 10 [−] [3] 10 [−] [2] 10 [−] [1] 1 10 10 [2] 10 [3]<br>tp (s)<br>Mounted on FR4 printed-circuit board; mounting pad for collector 1 cm [2] .<br>(1) δ = 1. (3) δ = 0.5. (5) δ = 0.2. (7) δ = 0.05. (9) δ = 0.01.<br>(2) δ = 0.75. (4) δ = 0.33. (6) δ = 0.1. (8) δ = 0.02. (10) δ = 0.<br>**----- End of picture text -----**<br>


Fig.4  Transient thermal impedance as a function of pulse time; typical values. 

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006aaa234<br>10 [3]<br>Zth<br>(K/W)<br>10 [2] (1)<br>(2)<br>(3)<br>(4)<br>(5)<br>10 (6)<br>(7)<br>(8)<br>(9)<br>1<br>(10)<br>10 [−] [1]<br>10 [−] [5] 10 [−] [4] 10 [−] [3] 10 [−] [2] 10 [−] [1] 1 10 10 [2] 10 [3]<br>tp (s)<br>Mounted on FR4 printed-circuit board; mounting pad for collector 6 cm [2] .<br>(1) δ = 1. (3) δ = 0.5. (5) δ = 0.2. (7) δ = 0.05. (9) δ = 0.01.<br>(2) δ = 0.75. (4) δ = 0.33. (6) δ = 0.1. (8) δ = 0.02. (10) δ = 0.<br>**----- End of picture text -----**<br>


Fig.5  Transient thermal impedance as a function of pulse time; typical values. 

2004 Nov 04 

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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

## **CHARACTERISTICS** 

Tamb = 25 °C unless otherwise specified. 

|**SYMBOL**|**PARAMETER**|**CONDITIONS**|**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|---|---|---|---|---|---|---|
|ICBO|collector-base cut-off current|VCB=−30 V; IE= 0 A|−|−|−100|nA|
|||VCB=−30 V; IE= 0 A;<br>Tj= 150°C|−|−|−50|μA|
|IEBO|emitter-base cut-off current|VEB=−5 V; IC= 0 A|−|−|−100|nA|
|hFE|DC current gain|VCE=−2 V; IC=−0.5 A|250|−|−||
|||VCE=−2 V; IC=−1 A;<br>note 1|200|−|−||
|||VCE=−2 V; IC=−2 A;<br>note 1|150|−|−||
|||VCE=−2 V; IC=−5 A;<br>note 1|50|−|−||
|VCEsat|collector-emitter saturation<br>voltage|IC=−0.5 A; IB=−5 mA|−|−|120|mV|
|||IC=−1 A; IB=−10 mA|−|−|170|mV|
|||IC=−2 A; IB=−200 mA|−|−|160|mV|
|||IC=−4 A; IB=−200 mA;<br>note 1|−|−|340|mV|
|||IC=−5 A; IB=−500 mA;<br>note 1|−|−|375|mV|
|RCEsat|equivalent on-resistance|IC=−5 A; IB=−500 mA;<br>note 1|−|45|75|mΩ|
|VBEsat|base-emitter saturation<br>voltage|IC=−4 A; IB=−200 mA;<br>note 1|−|−|−1.1|V|
|||IC=−5 A; IB=−500 mA;<br>note 1|−|−|−1.2|V|
|VBEon|base-emitter turn-on voltage|VCE=−2 V; IC=−2 A|−|−|−1.0|V|
|fT|transition frequency|VCE=−10 V; IC=−0.1 A;<br>f = 100 MHz|60|−|−|MHz|
|Cc|collector capacitance|VCB=−10 V; IE=  ie= 0 A;<br>f = 1 MHz|−|−|105|pF|



## **Note** 

1. Pulse test: tp ≤ 300 μs; δ ≤ 0.02. 

2004 Nov 04 

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Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

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001aaa157<br>− 8<br>IC (1)<br>(A)<br>(2)<br>− 6<br>(3)<br>(4)<br>− 4<br>(5)<br>− 2<br>0<br>0 − 0.5 − 1 − 1.5 − 2<br>VCE (V)<br>(1) IB1 = −11 mA. (4) IB4 = −44 mA.<br>(2) IB2 = −22 mA. (5) IB5 = −55 mA.<br>(3) IB3 = −33 mA.<br>**----- End of picture text -----**<br>


Fig.6 Collector current as a function of collector-emitter voltage; typical values. 

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001aaa159<br>1000<br>hFE<br>800<br>600<br>(1)<br>(2)<br>400<br>200 (3)<br>0<br>− 10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>VCE = −2 V.<br>(1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −55 °C.<br>**----- End of picture text -----**<br>


Fig.8 DC current gain as a function of collector current; typical values. 

## PBSS5540X 

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**----- Start of picture text -----**<br>
001aaa158<br>− 1.2<br>VBE<br>(V)<br>− 0.8 (1)<br>(2)<br>(3)<br>− 0.4<br>0<br>− 10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
VCE = −2 V.<br>(1) Tamb = −55 °C. (2) Tamb = 25 °C. (3) Tamb = 100 °C.<br>Fig.7 Base-emitter voltage as a function of<br>collector current; typical values.<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
001aaa160<br>10 [2]<br>RCEsat<br>( Ω )<br>10<br>1<br>(2)<br>(1)<br>10 [−] [1]<br>(3)<br>10 [−] [2]<br>− 10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>IC/IB = 20.<br>(1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −55 °C.<br>Fig.9 Equivalent on-resistance as a function of<br>collector current; typical values.<br>**----- End of picture text -----**<br>


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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

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**----- Start of picture text -----**<br>
001aaa161<br>− 1<br>VCEsat<br>(V)<br>− 10 [−] [1]<br>(1)<br>(2) (3)<br>− 10 [−] [2]<br>− 10 [−] [3]<br>− 10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>IC/IB = 20.<br>(1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −55 °C.<br>**----- End of picture text -----**<br>


Fig.10 Collector-emitter saturation voltage as a function of collector current; typical values. 

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**----- Start of picture text -----**<br>
001aaa163<br>− 10<br>VBEsat<br>(V)<br>− 1<br>(1)<br>(2)<br>(3)<br>− 10 [−] [1]<br>10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>IC/IB = 20.<br>(1) Tamb = −55 °C. (2) Tamb = 25 °C. (3) Tamb = 100 °C.<br>**----- End of picture text -----**<br>


Fig.12 Base-emitter saturation voltage as a function of collector current; typical values. 

## PBSS5540X 

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**----- Start of picture text -----**<br>
001aaa162<br>− 1<br>VCEsat<br>(V)<br>− 10 [−] [1]<br>(1)<br>(2)<br>− 10 [−] [2] (3)<br>− 10 [−] [3]<br>− 10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>Tamb = 25 °C.<br>(1) IC/IB = 100. (2) IC/IB = 50. (3) IC/IB = 10.<br>**----- End of picture text -----**<br>


Fig.11 Collector-emitter saturation voltage as a function of collector current; typical values. 

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**----- Start of picture text -----**<br>
001aaa164<br>− 1.2<br>VBE<br>(V)<br>− 0.8<br>− 0.4<br>0<br>− 10 [−] [1] − 1 − 10 − 10 [2] − 10 [3] − 10 [4]<br>IC (mA)<br>Tamb = 25 °C.<br>**----- End of picture text -----**<br>


Fig.13 Base-emitter voltage as a function of collector current; typical values. 

2004 Nov 04 

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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

## **Reference mounting conditions** 

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**----- Start of picture text -----**<br>
32 mm<br>2.5 mm<br>40<br>mm 1 mm<br>3 mm<br>2.5 mm<br>1 mm<br>0.5 mm<br>5 mm<br>3.96 mm<br>1.6 mm<br>001aaa234<br>**----- End of picture text -----**<br>


Fig.14  FR4, standard footprint. 

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**----- Start of picture text -----**<br>
handbook, halfpage 32 mm<br>10 mm<br>40 mm 10 mm<br>2.5 mm<br>1 mm<br>0.5 mm<br>5 mm<br>3.96 mm<br>1.6 mm<br>MLE322<br>Fig.15  FR4, mounting pad for collector 1 cm [2] .<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
32 mm<br>30 mm<br>20<br>mm<br>40<br>mm<br>2.5 mm<br>1 mm<br>0.5 mm<br>5 mm<br>3.96 mm<br>1.6 mm<br>001aaa235<br>**----- End of picture text -----**<br>


Fig.16  FR4, mounting pad for collector 6 cm[2] . 

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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

## **PACKAGE OUTLINE** 

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**----- Start of picture text -----**<br>
Plastic surface-mounted package; collector pad for good heat transfer; 3 leads SOT89<br>D B<br>A<br>bp3<br>E<br>HE<br>Lp<br>1 2 3<br>bp2 c<br>w M bp1<br>e1<br>e<br>0 2 4 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>UNIT A bp1 bp2 bp3 c D E e e1 HE Lp w<br>1.6 0.48 0.53 1.8 0.44 4.6 2.6 4.25 1.2<br>mm 3.0 1.5 0.13<br>1.4 0.35 0.40 1.4 0.23 4.4 2.4 3.75 0.8<br>OUTLINE  REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION  IEC  JEDEC  JEITA PROJECTION<br>04-08-03<br> SOT89 TO-243 SC-62<br>06-03-16<br>**----- End of picture text -----**<br>


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NXP Semiconductors 

Product data sheet 

## 40 V, 5 A PNP low VCEsat (BISS) transistor 

## PBSS5540X 

## **DATA SHEET STATUS** 

|**DATA SHEET STATUS**|||
|---|---|---|
|**DOCUMENT**<br>**STATUS**(1)|**PRODUCT**<br>**STATUS**(2)|**DEFINITION**|
|Objective data sheet|Development|This document contains data from the objective specification for product<br>development.|
|Preliminarydata sheet|Qualification|This document contains data from thepreliminaryspecification.|
|Product data sheet|Production|This document contains theproduct specification.|



## **Notes** 

1. Please consult the most recently issued document before initiating or completing a design. 

2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 

## **DISCLAIMERS** 

**General** ⎯ Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. 

**Right to make changes** ⎯ NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 

**Suitability for use** ⎯ NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 

⎯ **Applications** Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 

above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. 

**Terms and conditions of sale** ⎯ NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. 

**No offer to sell or license** ⎯ Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 

⎯ **Export control** This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 

**Quick reference data** ⎯ The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 

⎯ **Limiting values** Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions 

2004 Nov 04 

12 

## _**NXP Semiconductors**_ 

## **Customer notification** 

This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version. 

## **Contact information** 

For additional information please visit: **http://www.nxp.com** For sales offices addresses send e-mail to: **salesaddresses@nxp.com** 

## © NXP B.V. 2009 

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. 

Printed in The Netherlands 

**==> picture [178 x 143] intentionally omitted <==**

Date of release: 2004 Nov 04 

R75/03/pp13 

Document order number: 9397 750 13893 



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---

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