NVTR4503NT1G

## NTR4503N, NVTR4503N MOSFET – Power, Single, N-Channel, SOT-23 ~~—~~ 30 V, 2.5 A 

## **Features** 

- Leading Planar Technology for Low Gate Charge / Fast Switching 

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- 4.5 V Rated for Low Voltage Gate Drive 

- SOT−23 Surface Mount for Small Footprint (3 x 3 mm) 

- NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

**V(BR)DSS RDS(on) TYP ID MAX** 85 m @ 10 V 30 V 2.5 A 105 m @ 4.5 V ~~|;~~ 

- These Devices are Pb−Free and are RoHS Compliant 

**N−Channel** 

## **Applications** 

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||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|D|
|•|DC−DC Conversion|
|•|Load/Power Switch for Portables|
|•|Load/Power Switch for Computing|
|MAXIMUM RATINGS|(TJ = 25|°|C unless otherwise noted)|G|
|Parameter|Symbol|Value|Unit|
|a|:|S|
|Drain−to−Source Voltage|VDSS|30|V|
|ee|
|Gate−to−Source Voltage|VGS|±|20|V|
|Continuous Drain|Steady|TA = 25|°|C|ID|2.0|A|MARKING DIAGRAM/|
|a|Current (Note 1)|State|TA = 85|°|C|Gs|1.5|3|PIN ASSIGNMENT|3|
|t|≤|10 s|TA = 25|°|C|2.5|Drain|
|1|
|EU]|Power Dissipation|Steady|TA = 25|°|C|PD|0.73|W|&|2|
|(Note 1)|State|TR3 M|
|Continuous Drain|Steady|TA = 25|°|C|ID|1.5|A|SOT−23|
|ee|Current (Note 2)|State|ee|TA = 85|°|C|ee|1.1|CASE 318STYLE 21|TT]|1|2|
|Power Dissipation|TA = 25|°|C|PD|0.42|W|Gate|Source|
|(Note 2)|
|2ee|ee|eeee|TR3|= Specific Device Code|
|ee|Pulsed Drain Current|er|tp = 10 s|es|IDM|es|10|A|M|= Date Code|
|Operating Junction and Storage Temperature|TJ,|−55 to|°|C|= Pb−Free Package|
|T|150|
|ee|stg|(Note: Microdot may be in either location)|
|Source Current (Body Diode)|IS|2.0|A|
|eses|
|Peak Source Current|tp = 10 s|ISM|4.0|A|ORDERING INFORMATION|
|(Diode Forward)|
|e|e|e|ee|ee|
|Lead Temperature for Soldering Purposes|TL|260|°|C|Device|Package|Shipping|[[†]]|
|(1/8” from case for 10 s)|
|NTR4503NT1G|SOT−23|3000 / Tape & Reel|
|Stresses exceeding those listed in the Maximum Ratings table may damage the|(Pb−Free)|
|device. If any of these limits are exceeded, device functionality should not be|
|assumed, damage may occur and reliability may be affected.|NVTR4503NT1G|SOT−23|3000 / Tape & Reel|
|(Pb−Free)|
|ee|ee|eee|a|

**----- End of picture text -----**<br>


**Device Package Shipping**[[†]] NTR4503NT1G SOT−23 3000 / Tape & Reel (Pb−Free) NVTR4503NT1G SOT−23 3000 / Tape & Reel (Pb−Free) ~~a~~ †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2003 **June, 2019 − Rev. 8** 

**NTR4503N/D** 

**NTR4503N, NVTR4503N** 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Max**|**Unit**|
|Junction−to−Ambient − Steady State (Note 1)|R�JA|170|°C/W|
|Junction−to−Ambient − t < 10 s (Note 1)|R�JA|100||
|Junction−to−Ambient − Steady State (Note 2)|R�JA|300||



1. Surface−mounted on FR4 board using 1 in sq pad size. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

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**2** 

**NTR4503N, NVTR4503N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTIC**|**S **(TJ= 25°C|unless otherwise noted)|||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**OFF CHARACTERISTICS**|||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A|30|36||V|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V, VDS= 24 V|||1.0|�A|
|||VGS= 0 V, VDS= 24 V, TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=�20 V|||�100|nA|
|**ON CHARACTERISTICS**(Note 3)|||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A|1.0|1.75|3.0|V|
|Drain−to−Source On−Resistance|RDS(on)|VGS= 10 V, ID= 2.5 A||85|110|m�|
|||VGS= 4.5 V, ID= 2.0 A||105|140||
|Forward Transconductance|gFS|VDS= 4.5 V, ID= 2.5 A||5.3||S|
|**CHARGES AND CAPACITANCES**|||||||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 15 V||135||pF|
|Output Capacitance|Coss|||52|||
|Reverse Transfer Capacitance|Crss|||15|||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 24 V||130|250|pF|
|Output Capacitance|Coss|||42|75||
|Reverse Transfer Capacitance|Crss|||13|25||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V,<br>ID= 2.5 A||3.6|7.0|nC|
|Threshold Gate Charge|QG(TH)|||0.3|||
|Gate−to−Source Charge|QGS|||0.6|||
|Gate−to−Drain Charge|QGD|||0.7|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 24 V,<br>ID= 2.5 A||1.9||nC|
|Threshold Gate Charge|QG(TH)|||0.3|||
|Gate−to−Source Charge|QGS|||0.6|||
|Gate−to−Drain Charge|QGD|||0.9|||
|**SWITCHING CHARACTERISTICS**(Note 4)|||||||
|Turn−On Delay Time|td(on)|VGS= 10 V, VDD= 15 V,<br>ID= 1 A, RG= 6�||5.8|12|ns|
|Rise Time|tr|||5.8|10||
|Turn−Off Delay Time|td(off)|||14|25||
|Fall Time|tf|||1.6|5.0||
|Turn−On Delay Time|td(on)|VGS= 10 V, VDD= 24 V,<br>ID= 2.5 A, RG= 2.5�||4.8||ns|
|Rise Time|tr|||6.7|||
|Turn−Off Delay Time|td(off)|||13.6|||
|Fall Time|tf|||1.8|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||
|Forward Diode Voltage|VSD|VGS= 0 V, IS= 2.0 A||0.85|1.2|V|
|Reverse Recovery Time|tRR|VGS= 0 V, IS= 2.0 A,<br>dIS/dt = 100 A/�s||9.2||ns|
|Reverse Recovery Charge|QRR|||4.0||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Pulse Test: Pulse Width � 300 � s, Duty Cycle � 2%. 

4. Switching characteristics are independent of operating junction temperatures. 

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**3** 

**NTR4503N, NVTR4503N** 

## **TYPICAL PERFORMANCE CURVES** 

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**----- Start of picture text -----**<br>
10<br>10 V 4 V<br>3.8 V<br>6 V5 V TJ = 25 ° C<br>8<br>4.5 V 3.6 V<br>4.2 V<br>6<br>3.4 V<br>4 3.2 V<br>3 V<br>2<br>2.8 V<br>2.6 V<br>0<br>0 1 2 3 4<br>VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 1. On−Region Characteristics<br>0.3<br>ID = 2.5 A<br>TJ = 25 ° C<br>0.25<br>0.2<br>0.15<br>0.1<br>0.05<br>0<br>2 3 4 5 6 7 8 9 10<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>DRAIN CURRENT (AMPS)<br>ID,<br>) �<br>DRAIN−TO−SOURCE RESISTANCE (<br>DS(on),<br>R<br>**----- End of picture text -----**<br>


**Figure 3. On−Resistance vs. Gate−to−Source Voltage** 

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VDS ≥  10 V<br>8<br>4<br>100 ° C<br>25 ° C<br>TJ = −55 ° C<br>0<br>2 3 4 5 6<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 2. Transfer Characteristics<br>0.12<br>TJ = 25 ° C<br>0.11<br>VGS = 4.5 V<br>0.10<br>0.09<br>0.08<br>VGS = 10 V<br>0.07<br>2 3 4 5 6<br>ID, DRAIN CURRENT (AMPS)<br>DRAIN CURRENT (AMPS)<br>ID,<br>) �<br>DRAIN−TO−SOURCE RESISTANCE (<br>DS(on),<br>R<br>**----- End of picture text -----**<br>


**Figure 4. On−Resistance vs. Drain Current and Gate Voltage** 

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1.8 1000<br>ID = 2.5 A VGS = 0 V<br>1.6 VGS = 10 V<br>TJ = 150 ° C<br>1.4 100<br>1.2<br>1.0 10<br>0.8 TJ = 100 ° C<br>0.6 1<br>−50 −25 0 25 50 75 100 125 150 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>DRAIN−TO−SOURCE , LEAKAGE (nA)<br>IDSS<br>DS(on),<br>R RESISTANCE (NORMALIZED)<br>**----- End of picture text -----**<br>


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**4** 

**NTR4503N, NVTR4503N** 

## **TYPICAL PERFORMANCE CURVES** 

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**----- Start of picture text -----**<br>
300 15 15<br>VDS = 0 V VGS = 0 V TJ = 25 ° C<br>V DS<br>C iss<br>200 10 QG 10<br>Crss VGS<br>100 5 Q GS Q GD 5<br>C oss TIDJ = 2.5 A = 25 ° C<br>0 0 0<br>10 5 0 5 10 15 20 25 30 0 1 2 3 4<br>VGS VDS QG, TOTAL GATE CHARGE (nC)<br>GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 8. Gate−to−Source and<br>Figure 7. Capacitance Variation Drain−to−Source Voltage vs. Total Charge<br>100 3<br>VDD = 24 V VGS = 0 V<br>ID = 2.5 A TJ = 25 ° C<br>VGS = 10 V<br>td(off) 2<br>tf<br>10<br>td(on)<br>tr 1<br>1 0<br>1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1<br>RG, GATE RESISTANCE (OHMS) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)<br>C, CAPACITANCE (pF)<br>GATE−TO−SOURCE VOLTAGE (VOLTS) DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>GS,  DS,<br>V V<br>t, TIME (ns)<br>, SOURCE CURRENT (AMPS)<br>IS<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**Figure 10. Diode Forward Voltage vs. Current** 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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SOT−23 (TO−236)<br>CASE 318−08<br>ISSUE AS<br>2 DATE 30 JAN 2018<br>SCALE 4:1<br>D NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.<br>0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF<br>“a 3 t = THE BASE MATERIAL.<br>| E HE T 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.<br>1 2<br>MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>L A 0.89 1.00 1.11 0.035 0.039 0.044<br>3X b L1 A1b 0.010.37 0.060.44 0.100.50 0.0000.015 0.0020.017 0.0040.020<br>e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008<br>TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120<br>E 1.20 1.30 1.40 0.047 0.051 0.055<br>e 1.78 1.90 2.04 0.070 0.075 0.080<br>L 0.30 0.43 0.55 0.012 0.017 0.022<br>A L1 0.35 0.54 0.69 0.014 0.021 0.027<br>H E 2.10 2.40 2.64 0.083 0.094 0.104<br>= T 0 ° −−− 10 ° 0 ° −−− 10 °<br>a A1 SIDE VIEW SEE VIEW C c<br>GENERIC<br>END VIEW<br>MARKING DIAGRAM*<br>RECOMMENDED<br>SOLDERING FOOTPRINT XXXM<br>1<br>2.90 i 0.903X XXX = Specific Device Code oo<br>M = Date Code<br>= Pb−Free Package<br>LO | cr ,<br>*This information is generic. Please refer to<br>3X 0.80 a) LL 0.95 device data sheet for actual part marking.<br>PITCH Pb−Free indicator, “G” or microdot “ ”, |<br>DIMENSIONS: MILLIMETERS may or may not be present.<br>STYLE 1 THRU 5: STYLE 6: STYLE 7: STYLE 8:<br>CANCELLED PIN 1. BASE PIN 1. EMITTER PIN 1. ANODE<br>2. EMITTER 2. BASE 2. NO CONNECTION<br>3. COLLECTOR 3. COLLECTOR 3. CATHODE<br>STYLE 9: STYLE 10: STYLE 11: STYLE 12: STYLE 13: STYLE 14:<br>PIN 1. ANODE PIN 1. DRAIN PIN 1. ANODE PIN 1. CATHODE PIN 1. SOURCE PIN 1. CATHODE<br>2. ANODE 2. SOURCE 2. CATHODE 2. CATHODE 2. DRAIN 2. GATE<br>3. CATHODE 3. GATE 3. CATHODE−ANODE 3. ANODE 3. GATE 3. ANODE<br>STYLE 15: STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:<br>PIN 1. GATE PIN 1. ANODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE<br>2. CATHODE 2. CATHODE 2. ANODE 2. CATHODE 2. ANODE 2. ANODE<br>3. ANODE 3. CATHODE 3. CATHODE 3. ANODE 3. CATHODE−ANODE 3. GATE<br>STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: STYLE 26:<br>PIN 1. GATE PIN 1. RETURN PIN 1. ANODE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE<br>2. SOURCE 2. OUTPUT 2. ANODE  2. DRAIN  2. CATHODE  2. ANODE<br>3. DRAIN 3. INPUT 3. CATHODE  3. SOURCE  3. GATE  3. NO CONNECTION<br>STYLE 27: STYLE 28:<br>PIN 1. CATHODE PIN 1. ANODE<br> 2. CATHODE  2. ANODE<br> 3. CATHODE  3. ANODE<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98ASB42226B Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: SOT−23 (TO−236) PAGE 1 OF 1<br>aes<br>ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.<br>ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding<br>the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically<br>disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the<br>rights of others.<br>**----- End of picture text -----**<br>


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