# Power MOSFET, N Channel, 40 V, 101 A, 4400 µohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3616612/)

**URL**: https://novapart.co/products/NVD5802NT4G-VF01/power-mosfet-n-channel-40-v-101-a-4400-ohm-to-252
**SKU**: NVD5802NT4G-VF01
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5660
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (15-Jan-2018) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | AEC-Q101 |
| Power Dissipation | 93.75W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 101A |
| Drain Source On State Resistance | 4400µohm |
| Gate Source Threshold Voltage Max | 3.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3616612/)

NTD5802N, NVD5802N 

## MOSFET – Power, Single, N-Channel, DPAK 40 V, 101 A 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low Capacitance to Minimize Driver Losses 

- Optimized Gate Charge to Minimize Switching Losses 

- MSL 1/260°C 

- 100% Avalanche Tested 

- NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free and are RoHS Compliant 

## **Applications** 

- CPU Power Delivery 

- DC−DC Converters 

• Motor Driver 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **Parameter Symbol Value Unit** ~~Peom \ ‘mana~~ Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ± 20 V ~~-—-~~ Continuous Drain Cur- ~~_}~~ TC = 25 ° C ID ~~f+~~ 101 A ~~SR~~ rent (R JC) (Note 1) ~~CR~~ TC = 85 ° C 78 Power Dissipation TC = 25 ° C PD 93.75 W ~~PK~~ (R JC) (Note 1) Steady Continuous Drain Cur- ~~@\~~ State ~~yCONsatule~~ TA = 25 ° C ID 16.4 A ~~A~~ rent (R JA) (Note 1) ~~a~~ TA = 85 ° ~~ee~~ C 12.7 Power Dissipation TA = 25 ° C PD 2.5 W (R JA) (Note 1) Pulsed Drain Current tp=10 s TA = 25 ° C IDM 300 A ~~CeTf~~ Current Limited by Package ~~SO~~ TA = 25 ° C IDmaxPkg 45 A ~~-~~ Operating Junction and Storage Temperature ~~ff~~ TJ, Tstg −55 to ° C 175 ~~ee~~ Source Current (Body Diode) IS 50 A Drain to Source dV/dt dV/dt 6.0 V/ns ~~[+ |—~~ Single Pulse Drain−to−Source Avalanche EnEAS 240 mJ ergy (VDD = 32 V, VGS = 10 V, ~~Se~~ Lead Temperature for Soldering PurposesL = 0.3 mH, IL(pk) = 40 A, RG = 25 ) ~~|~~ TL 260 ° C (1/8 ″ from case for 10 s) ~~ee~~ 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **http://onsemi.com** 

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V(BR)DSS RDS(on) ID<br>ee ee<br>4.4 m  @ 10 V 101 A<br>40 V<br>7.8 m  @ 5.0 V 50 A<br>D<br>N−Channel<br>G<br>S<br>4<br>1 [2]<br>3<br>D ><br>CASE 369C<br>DPAK<br>(Bent Lead)<br>STYLE 2<br>MARKING DIAGRAMS<br>& PIN ASSIGNMENT<br>4<br>Drain<br>= 2<br>1 Drain 3<br>Gate Source<br>A = Assembly Location*<br>Y = Year<br>WW = Work Week<br>5802N = Device Code<br>G = Pb−Free Package<br>AYWW 58 02NG<br>**----- End of picture text -----**<br>


* The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. 

Publication Order Number: **NTD5802N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **June, 2024 − Rev. 9** 

**NTD5802N, NVD5802N** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**THERMAL RESISTANCE MAXIMUM RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Value**|**Unit**|
|Junction−to−Case (Drain)|R�JC|1.6|°C/W|
|Junction−to−Ambient − Steady State (Note 1)|R�JA|60||
|Junction−to−Ambient − SteadyState(Note 2)|R�JA|105||



1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTIC**|**S **(TJ= 25°C un|less otherwise noted)|less otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID|= 10�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||40||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||1.0|�A|
||||TJ= 150°C|||50||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±20 V||||±100|nA|
|**ON CHARACTERISTICS**(Note 3)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||1.5||3.5|V|
|Negative Threshold Temperature Co-<br>efficient|VGS(TH)/TJ||||−7.4||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 50 A|||3.6|4.4|m�|
|||VGS= 5.0 V, ID= 50 A|||6.5|7.8||
|Forward Transconductance|gFS|VDS= 15 V, ID= 15 A|||16.8||S|
|**CHARGES AND CAPACITANCES**||||||||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 12 V|||5300||pF|
|Output Capacitance|Coss||||850|||
|Reverse Transfer Capacitance|Crss||||550|||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 25 V|||5025||pF|
|Output Capacitance|Coss||||580|||
|Reverse Transfer Capacitance|Crss||||400|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V,<br>ID= 50 A|||75|100|nC|
|Threshold Gate Charge|QG(TH)||||6.0|||
|Gate−to−Source Charge|QGS||||18|||
|Gate−to−Drain Charge|QGD||||15|||
|**SWITCHING CHARACTERISTICS**(Note 4)||||||||
|Turn−On Delay Time|td(on)|VGS= 10 V, VDS= 20 V,<br>ID= 50 A, RG= 2.0�|||14||ns|
|Rise Time|tr||||52|||
|Turn−Off Delay Time|td(off)||||39|||
|Fall Time|tf||||8.5|||



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

3. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

4. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**2** 

**NTD5802N, NVD5802N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) (continued) 

|**ELECTRICAL CHARACTERISTIC**|**S **(TJ= 25°C u|nless otherwise noted) (continued)|nless otherwise noted) (continued)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 50 A|TJ= 25°C||0.9|1.2|V|
|||VGS= 0 V,<br>IS= 20 A|TJ= 25°C||0.8|1.0||
|Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt = 100 A/�s,<br>IS= 50 A|||25||ns|
|Charge Time|ta||||15|||
|Discharge Time|tb||||10|||
|Reverse Recovery Charge|QRR||||15||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

4. Switching characteristics are independent of operating junction temperatures. 

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**3** 

**NTD5802N, NVD5802N** 

## **TYPICAL PERFORMANCE CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
200 200<br>180 10 V 6 V VGS = 5 V VDSDS ≥  10 V<br>7 V<br>160<br>150<br>140 TJ = 25 ° C<br>120 4.5 V<br>100 100 T J  = 25 ° C<br>80 4.2 V<br>60<br>4 V 50 T J  = 100 ° C<br>40<br>3.8 V<br>20 3.6 V TJ = −55J = −55 = −55 ° C<br>0 0<br>0 1 2 3 4 5 6 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.010 0.015<br>VGS = 10 V 0.014 TJ = 25 ° C<br>0.013 VGS = 5 V<br>0.012<br>0.008<br>0.011<br>TJ = 150 ° C 0.010<br>0.009<br>0.006<br>0.008<br>0.007<br>TJ = 25 ° C 0.006<br>0.004 0.005<br>TJ = −55 ° C 0.004 VGS = 10 V<br>0.003<br>0.002 0.002<br>10 30 50 70 90 110 130 150 170 190 30 50 70 90 110 130 150 170 190<br>ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Drain Current Figure 4. On−Resistance vs. Drain Current and<br>Gate Voltage<br>1.7 100000<br>1.6 ID = 50 A VGS = 0 V<br>VGS = 10 V<br>1.5<br>1.4 10000 TJ = 150 ° C<br>1.3<br>1.2<br>1.1<br>1000<br>1<br>TJ = 100 ° C<br>0.9<br>0.8<br>0.7 100<br>−50 −25 0 25 50 75 100 125 150 175 2 6 10 14 18 22 26 30 34 38<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID IDD<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED)<br>IDSS<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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200<br>VDSDS ≥  10 V<br>150<br>100 T J  = 25 ° C<br>50 T J  = 100 ° C<br>TJ = −55J = −55 = −55 ° C<br>0<br>2 3 4 5 6<br>VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>IDD<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**4** 

**NTD5802N, NVD5802N** 

## **TYPICAL PERFORMANCE CHARACTERISTICS** 

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8000 15 30<br>7000 Ciss V T JGS  = 25  = 0 V ° C TIDJ = 50 A = 25 ° C<br>12 24<br>6000 QT<br>5000 9 VDS VGS 18<br>4000<br>6 12<br>3000 QGS QDS<br>2000<br>Coss 3 6<br>1000<br>Crss<br>0 0 0<br>10 5 0 5 10 15 20 25 30 35 40 0 20 40 60 80<br>VGS VDS<br>GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLT- Qg, TOTAL GATE CHARGE (nC)<br>AGE (V) Figure 8. Gate−to−Source and<br>Figure 7. Capacitance Variation Drain−to−Source Voltage vs. Total Charge<br>1000 60<br>VDD = 20 V<br>VIDGS = 50 A = 10 V td(off) 50 VTJGS = 25 = 0 V ° C<br>tr<br>100 40<br>tf td(on) 30<br>10 20<br>10<br>1 0<br>1 10 100 0.4 0.6 0.8 1.0 1.2 1.4<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000<br>100<br>10  � s<br>100  � s<br>10<br>1 ms<br>VGS = 10 V 10 ms<br>Single Pulse<br>1 TC = 25 ° C dc<br>RDS(on) Limit<br>Thermal Limit<br>Package Limit<br>0.1<br>0.1 1 10 100<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V) , DRAIN−TO−SOURCE VOLTAGE (V)<br>GS DS<br>V V<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**http://onsemi.com** 

**5** 

**NTD5802N, NVD5802N** 

## **TYPICAL PERFORMANCE CHARACTERISTICS** 

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10<br>D = 0.5<br>1<br>0.2<br>0.1<br>0.05<br>0.1<br>0.02<br>0.01<br>Single Pulse<br>0.01<br>0.00001 0.0001 0.001 0.01 0.1 1<br>t, PULSE TIME (s)<br>Figure 12. Thermal Response<br>C/W)<br>( °<br>r(t), Effective Transient Thermal Resistance<br>**----- End of picture text -----**<br>


|**ORDERING INFORMATION**|||
|---|---|---|
|**Order Number**|**Package**|**Shipping**†|
|NTD5802NT4G|DPAK<br>(Pb−Free)|2500 / Tape & Reel|
|NVD5802NT4G*|DPAK<br>(Pb−Free)|2500 / Tape & Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

- *NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. 

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**6** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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4<br>1 [2]<br>3<br>SCALE 1:1<br>**----- End of picture text -----**<br>


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DPAK−3 6.10x6.54x2.28, 2.29P<br>CASE 369C<br>ISSUE K<br>**----- End of picture text -----**<br>


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DATE 14 MAY 2026<br>**----- End of picture text -----**<br>


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Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK−3 6.10x6.54x2.28, 2.29P PAGE 1 OF 2** 

**onsemi** and                     are trademarks of Semiconductor Components Industries, LLC dba **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2011 

DATE 13 MAY 2026 

**DPAK−3 6.10x6.54x2.28, 2.29P** CASE 369C ISSUE K 

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**----- Start of picture text -----**<br>
GENERIC<br>MARKING DIAGRAM*<br>XXXXXXG AYWW<br>ALYWW XXX<br>XXXXXG<br>IC Discrete<br>XXXXXX = Device Code<br>A = Assembly Location<br>L = Wafer Lot<br>Y =  Year<br>WW = Work Week<br>G = Pb−Free Package<br>**----- End of picture text -----**<br>


*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ � ”, may or may not be present. Some products may not follow the Generic Marking. 

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STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10:<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>**----- End of picture text -----**<br>


Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK−3 6.10x6.54x2.28, 2.29P PAGE 2 OF 2** 

**onsemi** and                     are trademarks of Semiconductor Components Industries, LLC dba **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2011 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **ADDITIONAL INFORMATION** 

**TECHNICAL PUBLICATIONS** : **ONLINE SUPPORT** : www.onsemi.com/support **Technical Library:** www.onsemi.com/design/resources/technical−documentation **For additional information, please contact your local Sales Representative at onsemi Website:** www.onsemi.com www.onsemi.com/support/sales 

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## Links

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---

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