# Power MOSFET, P Channel, 30 V, 1.95 A, 0.2 ohm, SOT-23, Surface Mount

![Product image](https://novapart.co/image/farnell:1431308/)

**URL**: https://novapart.co/products/NTR4502PT1G/power-mosfet-p-channel-30-v-195-a-02-ohm-sot-23
**SKU**: NTR4502PT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.0830
**Stock**: 1000+
**Lead Time**: 134 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:1.95A; Drain Source Voltage Vds:-30V; On Resistance Rds(on):0.2ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:-3V; Power Dissi

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 1.25W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SOT-23 |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 1.95A |
| Drain Source On State Resistance | 0.2ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1431308/)

NTR4502P, NVTR4502P 

## Power MOSFET 

## **−30 V, −1.95 A, Single, P−Channel, SOT−23** 

## **Features** 

## **www.onsemi.com** 

- Leading Planar Technology for Low Gate Charge/Fast Switching 

• Low RDS(ON) for Low Conduction LossesDS(ON) for Low Conduction Losses for Low Conduction Losses **V(BR)DSS RDS(on) TYP ID Max** (Note 1) • SOT−23 Surface Mount for Small Footprint (3 x 3 mm) 155 m @ −10 V −30 V −1.95 A • NV Prefix for Automotive and Other Applications Requiring Unique 240 m @ −4.5 V Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable **P−Channel MOSFET** • These Devices are Pb−Free and are RoHS Compliant S **Applications** • DC to DC Conversion G • Load/Power Switch for Portables and Computing • Motherboard, Notebooks, Camcorders, Digital Camera’s, etc. • Battery Charging Circuits **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) D **Parameter Symbol Value Unit MARKING DIAGRAM/** Drain−to−Source Voltage VDSS −30 V **PIN ASSIGNMENT** Drain Gate−to−Source Voltage VGS ± 20 V 3 Drain Current (Note 1) t < 10 s TA = 25 ° C ID −1.95 A TR2 M TA = 70 ° C −1.56 **SOT−23 CASE 318** 1 2 Power Dissipation t < 10 s PD 1.25 W (Note 1) **STYLE 21** Gate Source ~~ee~~ Continuous Drain Current Steady TA = 25 ° C I ~~[eee]~~ D −1.13 A TR2 = Device Code : (Note 1) State TA = 70 ° C −0.90 M = Date Code* ~~a ee~~ = Pb−Free Package Power Dissipation Steady State PD 0.4 W (Note 1) (Note: Microdot may be in either location) *Date Code orientation and/or overbar may ~~ras~~ Pulsed Drain Current tp = 10 s IDM −6.8 A vary depending upon manufacturing location. Operating Junction and Storage Temperature TJ, −55 to ° C TSTG 150 **ORDERING INFORMATION** Source Current (Body Diode) IS −1.25 A ~~a~~ **Device Package Shipping** † Lead Temperature for Soldering Purposes TL 260 ° C (1/8 in from case for 10 s) NTR4502PT1G SOT−23 3000 / Tape & Reel ~~po~~ (Pb−Free) **THERMAL RESISTANCE RATINGS** NVTR4502PT1G SOT−23 3000 / Tape & Reel **Parameter Symbol Max Unit** (Pb−Free) Junction−to−Ambient – Steady State (Note 1) R JA 300 ° C/W ~~_~~ †For information on tape and reel specifications, Junction−to−Ambient – t = 10 s (Note 1) R JA 100 including part orientation and tape sizes, pleaserefer to our Tape and Reel Packaging Specifications Stresses exceeding those listed in the Maximum Ratings table may damage the Brochure, BRD8011/D. 

- Low RDS(ON) for Low Conduction LossesDS(ON) for Low Conduction Losses for Low Conduction Losses 

- SOT−23 Surface Mount for Small Footprint (3 x 3 mm) 

- NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free and are RoHS Compliant 

## **Applications** 

- DC to DC Conversion 

- Load/Power Switch for Portables and Computing 

- Motherboard, Notebooks, Camcorders, Digital Camera’s, etc. 

- Battery Charging Circuits 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces). 

Publication Order Number: **NTR4502P/D** 

**1** 

© Semiconductor Components Industries, LLC, 2003 **October, 2016 − Rev. 6** 

## **NTR4502P, NVTR4502P** 

## **Electrical Characteristics** (TJ = 25 ° C unless otherwise specified) 

|**Electrical Characteristics**(TJ= 25°C unle|ss otherwis|e specified)|e specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= −250�A||−30|||V|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V, VDS=  −30 V|TJ= 25°C|||−1|�A|
||||TJ= 55°C|||−10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±20 V||||±100|nA|
|**ON CHARACTERISTICS**(Note 3)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= −250�A||−1.0||−3.0|V|
|Drain−to−Source On Resistance|RDS(on)|VGS= −10 V, ID= −1.95 A|||155|200|m�|
|||VGS= −4.5 V, ID= −1.5 A|||240|350||
|Forward Transconductance|gFS|VDS= −10 V, ID=−1.25 A|||3||S|
|**CHARGES AND CAPACITANCES**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= −15 V|||200||pF|
|Output Capacitance|COSS||||80|||
|Reverse Transfer Capacitance|CRSS||||50|||
|Total Gate Charge|QG(TOT)|VGS= −10 V, VDS= −15 V; ID= −1.95 A|||6|10|nC|
|Threshold Gate Charge|QG(TH)||||0.3|||
|Gate−to−Source Charge|QGS||||1|||
|Gate−to−Drain Charge|QGD||||1.7|||
|**SWITCHING CHARACTERISTICS**(Note 4)||||||||
|Turn−On Delay Time|td(ON)|VGS=−10 V, VDD= −15 V,<br>ID= −1.95 A, RG= 6�|||5.2|10|ns|
|Rise Time|tr||||12|20||
|Turn−Off Delay Time|td(OFF)||||19|35||
|Fall Time|tf||||17.5|30||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**(Note 3)||||||||
|Forward Diode Voltage|VSD|VGS= 0 V, IS= −1.25 A|||−0.8|−1.2|V|
|Reverse Recovery Time|tRR|VGS= 0 V, dISD/dt= 100 A/�s, IS= −1.25 A|||23||ns|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

2. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces). 

3. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

4. Switching characteristics are independent of operating junction temperatures. 

**www.onsemi.com** 

**2** 

**NTR4502P, NVTR4502P** 

**==> picture [493 x 647] intentionally omitted <==**

**----- Start of picture text -----**<br>
5 VGS = −4.0 V T J  = 25 ° C 5 VDS = −10 V<br>VGS = −3.8 V<br>4 VGS = −5.0 V 4 TJ = −55 ° C<br>VGS = −3.6 V TJ = 25 ° C<br>3 VGSVGS = −7.0 V = −10 V V GS  = −3.4 V 3 TJ = 100 ° C<br>2 VGS = −3.2 V 2<br>V GS  = −3.0 V<br>1 VGS = −2.4 V V GS  = −2.8 V 1<br>VGS = −2.6 V<br>0 0<br>0 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.4 0.3<br>ID = −1.95 A TJ = 25 ° C<br>0.35 TJ = 25 ° C VGS = −4.5 V<br>0.25<br>0.3<br>0.25 0.2<br>0.2 VGS = −10 V<br>0.15<br>0.15<br>0.1 0.1<br>3 4 5 6 7 8 9 10 1 1.5 2 2.5 3 3.5 4 4.5 5<br>−VGS, GATE−TO−SOURCE VOLTAGE (V) −ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance versus Figure 4. On−Resistance versus Drain Current<br>Gate−to−Source Voltage and Gate Voltage<br>1.8 1000<br>ID = −1.9 A VGS = 0 V<br>1.6 VGS = −10 V<br>TJ = 150 ° C<br>1.4 100<br>1.2<br>1 10<br>TJ = 100 ° C<br>0.8<br>0.6 1<br>−50 −25 0 25 50 75 100 125 150 2 6 10 14 18 22 26 30<br>TJ, JUNCTION TEMPERATURE ( ° C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature versus Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>D D<br>−I −I<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED)<br>DSS<br>−I<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**www.onsemi.com** 

**3** 

**NTR4502P, NVTR4502P** 

**==> picture [246 x 209] intentionally omitted <==**

**----- Start of picture text -----**<br>
500<br>V DS  = 0 V V GS  = 0 V TJ = 25 ° C<br>400<br>CISS<br>300 CRSS<br>CISS<br>200<br>COSS<br>100<br>CRSS<br>0<br>10 5 0 5 10 15 20 25 30<br>−VGS −VDS<br>GATE−TO−SOURCE OR DRAIN−TO−SOURCE<br>VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**==> picture [278 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
12 18<br>Q T<br>10 15<br>8 12<br>6 9<br>QGS QGD<br>4 6<br>2 ID = −1.95 A 3<br>TJ = 25 ° C<br>0 0<br>0 1 2 3 4 5 6 7<br>QG, TOTAL GATE CHARGE (nC)<br>(V) (V)<br>, GATE−TO−SOURCE VOLTAGE , DRAIN−TO−SOURCE VOLTAGE<br>GS DS<br>−V −V<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge** 

**==> picture [492 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 3<br>VDS = −15 V TJ = 25 ° C<br>ID = −1.95 V 2.5<br>VGS = −10 V<br>td(off) tf 2<br>10 tr 1.5<br>td(on)<br>1<br>0.5<br>1 0<br>1 10 100 0.3 0.6 0.9 1.2<br>RG, GATE RESISTANCE ( � ) −VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>t, TIME (ns)<br>, SOURCE CURRENT<br>S<br>−I<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation versus Gate Resistance** 

**Figure 10. Diode Forward Voltage versus Current** 

**www.onsemi.com** 

**4** 

**NTR4502P, NVTR4502P** 

## **PACKAGE DIMENSIONS** 

**SOT−23 (TO−236)** CASE 318−08 ISSUE AR 

**==> picture [462 x 328] intentionally omitted <==**

**----- Start of picture text -----**<br>
D NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.<br>0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF<br>a 3 = THE BASE MATERIAL.<br>| E HE T 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.<br>1 2<br>MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>L A 0.89 1.00 1.11 0.035 0.039 0.044<br>3X b L1 A1b 0.010.37 0.060.44 0.100.50 0.0000.015 0.0020.017 0.0040.020<br>e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008<br>TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120<br>E 1.20 1.30 1.40 0.047 0.051 0.055<br>e 1.78 1.90 2.04 0.070 0.075 0.080<br>L 0.30 0.43 0.55 0.012 0.017 0.022<br>A L1 0.35 0.54 0.69 0.014 0.021 0.027<br>H E 2.10 2.40 2.64 0.083 0.094 0.104<br>T 0 ° −−− 10 ° 0 ° −−− 10 °<br>A1 SIDE VIEW SEE VIEW C c STYLE 21:<br>END VIEW PIN 1. GATE<br>2. SOURCE<br>3. DRAIN<br>RECOMMENDED<br>SOLDERING FOOTPRINT*<br>3X<br>2.90 _ 0.90<br>Lo | cr<br>3X 0.80 | LL L 0.95<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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## **LITERATURE FULFILLMENT** : 

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**NTR4502P/D** 

**5** 



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