# Power MOSFET, N Channel, 20 V, 230 mA, 0.75 ohm, XLLGA, Surface Mount

![Product image](https://novapart.co/image/farnell:2845386RL/)

**URL**: https://novapart.co/products/NTNS3190NZT5G/power-mosfet-n-channel-20-v-230-ma-075-ohm-xllga
**SKU**: NTNS3190NZT5G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1530
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Channel Type | N Channel |
| Power Dissipation | 125mW |
| Drain Source On State Resistance | 0.75ohm |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2845386RL/)

NTNS3190NZ 

## Small Signal MOSFET **20 V, 224 mA, Single N−Channel, 0.62 x 0.62 x 0.4 mm XLLGA3 Package** 

## **Features** 

- Single N−Channel MOSFET 

## **http://onsemi.com** 

- Ultra Small and Thin Package (0.62 x 0.62 x 0.4 mm) 

- Low RDS(on) Solution in 0.62 x 0.62 mm Package 

- 1.5 V Gate Voltage Rating 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

## **Applications** 

- Small Signal Load Switch 

||**MOSFET**||
|---|---|---|
|**V(BR)DSS**|**RDS(on) MAX**|**ID MAX**|
|20 V|1.4  @ 4.5 V|224 mA|
||1.9  @ 2.5 V||
||2.2  @ 1.8 V||
||4.3  @ 1.5 V||



- Analog Switch 

• High Speed Interfacing **N−Channel MOSFET** • Optimized for Power Management in Ultra Portable Products D (3) **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) ~~a~~ **Parameter Symbol Value Units** Drain-to-Source Voltage VDSS 20 V G (1) Gate-to-Source Voltage VGS ± 8.0 V ~~oo~~ Continuous Drain Steady TA = 25 ° C ID 224 mA ~~~-®)~~ S (2) Current (Note 1) State TA = 85 ° C 162 **MARKING** t ≤ 5 s TA = 25 ° C 241 **DIAGRAM** ~~2-2~~ Power DissipaSteady TA = 25 ° C PD 120 mW 3 1 tion (Note 1) State 2 **XLLGA3** A M **CASE 713AA** t ≤ 5 s TA = 25 ° C 139 1 ~~ee~~ Pulsed Drain Current tp = 10 s IDM 673 mA A = Specific Device Code Operating Junction and Storage TJ, -55 to ° C M = Date Code Temperature TSTG 150 ~~eo~~ Source Current (Body Diode) IS 120 mA ~~a~~ **ORDERING INFORMATION** Lead Temperature for Soldering Purposes TL 260 ° C (1/8 ″ from case for 10 s) **Device Package Shipping**[[†]] Stresses exceeding Maximum Ratings may damage the device. Maximum NTNS3190NZT5G XLLGA3 8000 / Ratings are stress ratings only. Functional operation above the Recommended (Pb−Free) Tape & Reel Operating Conditions is not implied. Extended exposure to stresses above the ~~ee FF~~ Recommended Operating Conditions may affect device reliability. 

**ORDERING INFORMATION Device Package Shipping**[[†]] NTNS3190NZT5G XLLGA3 8000 / (Pb−Free) Tape & Reel ~~FF~~ †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Max**|**Units**|
|Junction-to-Ambient – Steady State (Note 1)|RθJA|1040|°C/W|
|Junction-to-Ambient – t≤5 s (Note 1)|RθJA|900||



1. Surface Mounted on FR4 Board using the minimum recommended pad size, (or 2 mm[2] ), 1 oz Cu. 

2. Pulse Test: pulse width ≤ 300 s, duty cycle ≤ 2%. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2012 **November, 2012 − Rev. 0** 

**NTNS3190NZ/D** 

## **NTNS3190NZ** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTIC**|**S **(TJ= 25°C unles|s otherwise specified)|s otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Units**|
|**OFF CHARACTERISTICS**||||||||
|Drain-to-Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||20|||V|
|Drain-to-Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ|ID= −250�A, ref to 25°C|||19||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 20 V|TJ= 25°C|||1.0|�A|
|Gate-to-Source Leakage Current|IGSS|VDS= 0 V, VGS=±8.0 V||||±2.0|�A|
|**ON CHARACTERISTICS**(Note 3)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||0.4||1.0|V|
|Negative Gate Threshold<br>Temperature Coefficient|VGS(TH)/TJ||||1.9||mV/°C|
|Drain-to-Source On Resistance|RDS(on)|VGS= 4.5 V, ID= 100 mA|||0.65|1.4|�|
|||VGS= 2.5 V, ID= 50 mA|||0.9|1.9||
|||VGS= 1.8 V, ID= 20 mA|||1.1|2.2||
|||VGS= 1.5 V, ID= 10 mA|||1.4|4.3||
|Forward Transconductance|gFS|VDS= 5 V, ID= 100 mA|||0.56||S|
|Source−Drain Diode Voltage|VSD|VGS= 0 V, IS= 10 mA|||0.55|1.0|V|
|**CHARGES & CAPACITANCES**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz,<br>VDS= 15 V|||15.8||pF|
|Output Capacitance|COSS||||3.5|||
|Reverse Transfer Capacitance|CRSS||||2.4|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V,<br>ID= 200 mA|||0.70||nC|
|Threshold Gate Charge|QG(TH)||||0.05|||
|Gate−to−Source Charge|QGS||||0.14|||
|Gate−to−Drain Charge|QGD||||0.10|||
|**SWITCHING CHARACTERISTICS, VGS = 4.5 V**(Note 3)||||||||
|Turn-On Delay Time|td(ON)|VGS= 4.5 V, VDD= 15 V,<br>ID= 200 mA, RG= 2�|||18||ns|
|Rise Time|tr||||35|||
|Turn-Off Delay Time|td(OFF)||||201|||
|Fall Time|tf||||110|||



3. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**2** 

**NTNS3190NZ** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [492 x 618] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.0 3.0 V VGS = 2.5 V 1.0 TJ = −55 ° C<br>0.9 0.9 V DS  = 5 V<br>0.8 3.5 V 2.0 V 0.8 T J  = 25 ° C<br>0.7 4.0 V 0.7 TJ = 125 ° C<br>4.5 V 1.8 V<br>0.6 0.6<br>0.5 0.5<br>1.5 V<br>0.4 0.4<br>0.3 0.3<br>0.2 1.2 V 0.2<br>0.1 0.1<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>5.0 5.0<br>4.5 TJ = 25 ° C 4.5 TJ = 25 ° C<br>4.0 I D  = 0.1 A 4.0<br>3.5 3.5 VGS = 1.5 V<br>3.0 3.0<br>2.5 2.5 V GS  = 1.8 V<br>2.0 2.0<br>1.5 1.5 V GS  = 2.5 V<br>1.0 1.0<br>0.5 0.5 V GS  = 4.5 V<br>0 0<br>1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1.8 1000<br>1.7 VGS = 4.5 V<br>1.6 I D  = 100 mA T J  = 125 ° C<br>1.5<br>100<br>1.4<br>1.3 V GS = 1.8 V<br>ID = 20 mA<br>1.2 TJ = 85 ° C<br>1.1<br>10<br>1.0<br>0.9<br>0.8<br>0.7 1<br>−50 −25 0 25 50 75 100 125 150 2 4 6 8 10 12 14 16 18 20<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>RESISTANCE IDSS<br>, NORMALIZED DRAIN−TO−SOURCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**3** 

**NTNS3190NZ** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
30 5 18<br>QT<br>VGS = 0 V<br>25 TJ = 25 ° C 4 15<br>f = 1 MHz<br>VDS VGS<br>20 C iss 12<br>3<br>15 9<br>2<br>10 QGS QGD 6<br>5 Coss 1 V T JDS  = 25  = 15 V ° C 3<br>Crss ID = 0.2 A<br>0 0 0<br>0 2 4 6 8 10 12 14 16 18 20 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)<br>V<br>DS<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V , DRAIN−TO−SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge** 

**Figure 7. Capacitance Variation** 

**==> picture [490 x 398] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 10<br>VGS = 4.5 V<br>VDD = 15 V<br>T J  = 25 ° C T J = 125 ° C<br>td(off) 1<br>tf<br>100<br>T J  = −55 ° C<br>tr 0.1<br>td(on)<br>10 0.01<br>1 10 100 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>0.85 1<br>10  � s<br>0.75<br>ID = 250  � A 100  � s<br>0.1<br>0.65 1 ms<br>VGS ≤  8 V<br>Single Pulse<br>0.55 T C  = 25 ° C 10 ms<br>0.01<br>RDS(on) Limit dc<br>0.45 Thermal Limit<br>Package Limit<br>0.35 0.001<br>−50 −25 0 25 50 75 100 125 150 0.1 1 10 100<br>TJ, TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 11. Threshold Voltage Figure 12. Maximum Rated Forward Biased<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>, GATE−TO−SOURCE THRESHOLD<br>GS(th)<br>V<br>**----- End of picture text -----**<br>


**Figure 12. Maximum Rated Forward Biased Safe Operating Area** 

**http://onsemi.com** 

**4** 

**NTNS3190NZ** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [492 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
1200<br>1100 R � JA Steady State = 1040 ° C/W<br>1000<br>900<br>800<br>700<br>600 Duty Cycle = 0.5<br>500<br>400 0.05 0.02 0.01<br>300<br>0.20<br>200<br>0.10<br>100 Single Pulse<br>0<br>1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03<br>t, TIME (s)<br>C/W)<br>( °<br>R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE<br>**----- End of picture text -----**<br>


**Figure 13. FET Thermal Response** 

**http://onsemi.com** 

**5** 

**NTNS3190NZ** 

## **PACKAGE DIMENSIONS** 

**XLLGA3, 0.62x0.62, 0.35P** CASE 713AA ISSUE B 

**==> picture [415 x 277] intentionally omitted <==**

**----- Start of picture text -----**<br>
D A B NOTES:<br>PIN ONE 1. DIMENSIONING AND TOLERANCING PER<br>REFERENCE ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>ÉÉ naan<br>E MILLIMETERS<br>0.10 C ÉÉ DIM MIN MAX<br>ant} # A 0.340 0.440<br>0.10 C A1 0.000 0.030<br>e l i TOP VIEW b 0.100 0.200<br>D 0.620 BSC<br>D2 0.175 BSC<br>D3 0.205 BSC<br>0.10 C E 0.620 BSC<br>E2 0.400 0.600<br>A e 0.350 BSC<br>K 0.200 REF<br>3X 0.10 C A1 L 0.090 0.210<br>L2 0.110 0.310<br>scp SIDE VIEW iHy C [SEATING] PLANE a<br>MINIMUM RECOMMENDED<br>D3 SOLDER FOOTPRINT*<br>e/2<br>D2 2X<br>e 2 i ta E2 0.20<br>3 0.60<br>1<br>3<br>0.10 M C A 2X B b 1 K L2 ~ 0.100.05 MM CC A B 0.202X 0.35 2 0.28<br>0.05 M C — 2X L PITCH 7ca" [uct] : 0.62<br>BOTTOM VIEW DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*Additional information concerning board mounting for this package may be found in Document AND9099/D, “Board Level Application Note for XLLGA 3-Lead 0.62x0.62 Package”. For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

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