# Power MOSFET, N Channel, 40 V, 35 A, 0.012 ohm, LFPAK, Surface Mount

![Product image](https://novapart.co/image/farnell:3236752/)

**URL**: https://novapart.co/products/NTMYS011N04CTWG/power-mosfet-n-channel-40-v-35-a-0012-ohm-lfpak
**SKU**: NTMYS011N04CTWG
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4460
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 4Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 28W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | LFPAK |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 35A |
| Drain Source On State Resistance | 0.012ohm |
| Gate Source Threshold Voltage Max | 3.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3236752/)

## NTMYS011N04C 

## Power MOSFET 

## **40 V, 12 m 35 A, Single N−Channel** 

## **Features** 

- Small Footprint (5x6 mm) for Compact Design 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

**www.onsemi.com** 

- LFPAK4 Package, Industry Standard 

- These Devices are Pb−Free and are RoHS Compliant 

|**V(BR)DSS**|**RDS(ON) MAX**||**ID MAX**|
|---|---|---|---|
|40 V<br>~-<br>1|12 m @ 10 V<br>21||35 A|



**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 40 V **Parameter Symbol Value Unit** ~~5~~ :~1 Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ± 20 V ~~a~~ Continuous Drain Steady TC = 25 ° C ID 35 A Current R(Notes 1, 2, 3)JC State TC = 100 ° C 20 Power DissipationR JC (Notes 1, 2) TTCC = 100 = 25 °° CC PD 9.128 W G (4) ~~ee~~ Continuous Drain Steady TA = 25 ° C ID 13 A ~~p——|~~ Current R(Notes 1, 2, 3)JA State ~~FFE~~ TA = 100 ° C 9.1 Power Dissipation TA = 25 ° C PD 3.8 W R JA (Notes 1, 2) TA = 100 ° C 1.9 ~~re a~~ Pulsed Drain Current ~~ee~~ TA = 25 ° C, tp ~~ee~~ = 10 s ~~ee~~ IDM 173 A Operating Junction and Storage Temperature TJ, Tstg −55 to ° C + 175 Source Current (Body Diode) IS 24 A ~~i~~ ® Single Pulse Drain−to−Source Avalanche EAS 75 mJ **LFPAK4** Energy (TJ = 25 ° C, IL(pk) = 1.9 A) **CASE 760AB** Lead Temperature for Soldering Purposes TL 260 ° C (1/8 ″ from case for 10 s) 011N04C ~~esee~~ A Stresses exceeding those listed in the Maximum Ratings table may damage the WL device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Y 

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**----- Start of picture text -----**<br>
D (5)<br>G (4)<br>S (1,2,3)<br>N−CHANNEL MOSFET<br>**----- End of picture text -----**<br>


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MARKING<br>DIAGRAM<br>011N04<br>C<br>® AWLYW<br>LFPAK4<br>CASE 760AB<br>011N04C  = Specific Device Code<br>A = Assembly Location<br>WL =Wafer Lot<br>Y = Year<br>W = Work Week<br>**----- End of picture text -----**<br>


**THERMAL RESISTANCE MAXIMUM RATINGS** 

|**Parameter**<br>~~a~~|**Symbol**<br>~~a~~|**Value**<br>~~a~~|**Unit**<br>~~a~~|
|---|---|---|---|
|Junction−to−Case − Steady State|R JC|5.3|°C/W|
|Junction−to−Ambient − Steady State (Note 2)|R JA|39||



## **ORDERING INFORMATION** 

See detailed ordering, marking and shipping information on page 5 of this data sheet. 

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NTMYS011N04C/D** 

**1** 

© Semiconductor Components Industries, LLC, 2018 **March, 2019 − Rev. 0** 

## **NTMYS011N04C** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||25||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 40 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 20�A||2.5||3.5|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||−7.6||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 10 A||10|12|m�|
|Forward Transconductance|gFS|VDS= 15 V, ID= 10 A|||111||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 25 V|||420||pF|
|Output Capacitance|COSS||||230|||
|Reverse Transfer Capacitance|CRSS||||11|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 32 V; ID= 10 A|||7.9||nC|
|Threshold Gate Charge|QG(TH)||||1.6|||
|Gate−to−Source Charge|QGS||||2.5|||
|Gate−to−Drain Charge|QGD||||1.5|||
|Plateau Voltage|VGP||||4.7||V|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 32 V,<br>ID= 10 A, RG= 1�|||8.0||ns|
|Rise Time|tr||||16|||
|Turn−Off Delay Time|td(OFF)||||16|||
|Fall Time|tf||||5.0|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 10 A|TJ= 25°C||0.84|1.2|V|
||||TJ= 125°C||0.71|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 10 A|||19||ns|
|Charge Time|ta||||9.0|||
|Discharge Time|tb||||10|||
|Reverse Recovery Charge|QRR||||6.7||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

**www.onsemi.com** 

**2** 

**NTMYS011N04C** 

## **TYPICAL CHARACTERISTICS** 

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35 35<br>10 V 7 V 6 V VDS = 3 V<br>30 30<br>8 V<br>25 25<br>9 V<br>20 20<br>15 15<br>5 V<br>10 10 TJ = 25 ° C<br>5 4 V 5 TJ = 125 ° C TJ = −55 ° C<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>40 15<br>35 TI D J = 25= 10 A ° C 1413 VGS = 10 V<br>30<br>12<br>25 11<br>20 10<br>9<br>15<br>8<br>10<br>7<br>5 6<br>0 5<br>4 5 6 7 8 9 10 0 10 20 30 40 50 60 70 80<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1.9 10K<br>I D  = 10 A TJ = 150 ° C<br>1.7 VGS = 10 V<br>TJ = 125 ° C<br>1.5 1K<br>1.3<br>TJ = 85 ° C<br>1.1 100<br>0.9<br>0.7 10<br>−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>IDSS<br>, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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Figure 6. Drain−to−Source Leakage Current<br>vs. Voltage<br>**----- End of picture text -----**<br>


**www.onsemi.com** 

**3** 

**NTMYS011N04C** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
1K<br>Ciss<br>Coss<br>100<br>10 Crss<br>TJ = 25 ° C<br>VGS = 0 V<br>f = 1 MHz<br>1<br>0 5 10 15 20 25 30 35 40<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


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10<br>9<br>8<br>7<br>6 Qgs Qgd<br>5<br>4<br>3<br>2 V DS  = 32 V<br>ID = 10 A<br>1 T J  = 25 ° C<br>0<br>0 1 2 3 4 5 6 7 8<br>Qg, TOTAL GATE CHARGE (nC)<br>Figure 8. Gate−to−Source Voltage vs. Total<br>Charge<br>VGS = 0 VGS = 0 V = 0 V<br>8.5<br>6.4<br>4.3<br>2.2<br>TJ = J =  =<br>TJ = 125J = 125 = 125 ° C TJ = 25J = 25 = 25 ° C −55 ° C<br>0.1<br>0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V)SD, SOURCE−TO−DRAIN VOLTAGE (V), SOURCE−TO−DRAIN VOLTAGE (V)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>, SOURCE CURRENT (A)<br>ISS<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

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100<br>VGS = 0 VGS = 0 V = 0 V<br>8.5<br>tr<br>6.4<br>td(off)<br>10 td(on)<br>4.3<br>tf<br>2.2<br>VGS = 10 V TJ = J =  =<br>VDS = 32 V TJ = 125J = 125 = 125 ° C TJ = 25J = 25 = 25 ° C −55 ° C<br>1 0.1<br>1 10 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)SD, SOURCE−TO−DRAIN VOLTAGE (V), SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000 100<br>TC = 25 ° C<br>VGS ≤  10 V<br>100 Single Pulse TJ(initial) = 25 ° C<br>10<br>10<br>10  � s<br>1 TJ(initial) = 100 ° C<br>1<br>RDS(on) Limit 0.5 ms<br>Thermal Limit 1 ms<br>10 ms<br>Package Limit<br>0.1 0.1<br>0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>ISS<br> (A)<br>IPEAK<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 12. Maximum Drain Current vs. Time in Avalanche** 

**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**www.onsemi.com** 

**4** 

**NTMYS011N04C** 

## **TYPICAL CHARACTERISTICS** 

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100<br>50% Duty Cycle<br>10 20%<br>10%<br>5%<br>1<br>2%<br>1%<br>0.1<br>0.01<br>Single Pulse<br>0.001<br>0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br> (<br>JA<br>�<br>R<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Characteristics** 

## **DEVICE ORDERING INFORMATION** 

|**Device**|**Marking**|**Package**|**Shipping**†|
|---|---|---|---|
|NTMYS011N04CTWG|011N04C|LFPAK4<br>(Pb−Free)|3000 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

**www.onsemi.com** 

**5** 

## MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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LFPAK4 5x6<br>**----- End of picture text -----**<br>


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CASE 760AB<br>ISSUE C<br>**----- End of picture text -----**<br>


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DATE 19 NOV 2019<br>**----- End of picture text -----**<br>


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GENERIC<br>XXXXXX = Specific Device Code<br>MARKING DIAGRAM*<br>A = Assembly Location<br>——— WL = Wafer Lot<br>Y = Year<br>XXXXXX W = Work Week<br>XXXXXX<br>*This information is generic. Please refer<br>AWLYW<br>to device data sheet for actual part<br>marking. Some products may not follow<br>the Generic Marking.<br>**----- End of picture text -----**<br>


## **DOCUMENT NUMBER:** 

## **98AON82777G DESCRIPTION: LFPAK4 5x6** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**PAGE 1 OF 1** 

ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2018 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi’s** product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **TECHNICAL SUPPORT Email Requests to:** orderlit@onsemi.com **North American Technical Support: Europe, Middle East and Africa Technical Support:** Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 **onsemi Website:** www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative 

◊ 

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