# Power MOSFET, N Channel, 30 V, 14.1 A, 0.0036 ohm, SOIC, Surface Mount ![Product image](https://novapart.co/image/farnell:2724419/) **URL**: https://novapart.co/products/NTMS4920NR2G./power-mosfet-n-channel-30-v-141-a-00036-ohm-soic **SKU**: NTMS4920NR2G. **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.4310 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 8Pins | | Channel Type | N Channel | | Power Dissipation | 1.46W | | Transistor Mounting | Surface Mount | | Transistor Polarity | N Channel | | Power Dissipation Pd | 1.46W | | Rds(On) Test Voltage | 10V | | On Resistance Rds(On) | 0.0036ohm | | Transistor Case Style | SOIC | | Drain Source Voltage Vds | 30V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 14.1A | | Drain Source On State Resistance | 0.0036ohm | | Gate Source Threshold Voltage Max | 2.5V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2724419/) ## NTMS4920N ## Power MOSFET **30 V, 17 A, N−Channel, SO−8** ## **Features** - Low R to Minimize Conduction Losses DS(on) - Low Capacitance to Minimize Driver Losses - Optimized Gate Charge to Minimize Switching Losses - These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant ## **Applications** - DC−DC Converters - Points of Loads - Power Load Switch **www.onsemi.com** |**V(BR)DSS**|**RDS(ON) MAX**|**ID MAX**| |---|---|---| |30 V|4.3 m @ 10 V|17 A| ||5.7 m @ 4.5 V|| - Motor Controls ## **N−Channel** ## **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) **==> picture [192 x 354] intentionally omitted <==** **----- Start of picture text -----**
D
G
S
MARKING DIAGRAM/
PIN ASSIGNMENT
1 8
1 Source Drain
SO−8 Source Drain
CASE 751STYLE 12SO−8 SourceGate Drain
STYLE 12SO−8 Gate Drain
i Top View m :
4920N = Device Code
AY = Assembly Location= Year
Y = Year
WW = Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device Package Shipping [†]
NTMS4920NR2G SO−8 2500/Tape & Reel
(Pb−Free)
———
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
AYWW 4920N
**----- End of picture text -----**
D ~~es~~ **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 30 V ~~a Gs Ge a~~ Gate−to−Source Voltage ~~Ge~~ VGS ~~Ge~~ ± 20 V Continuous Drain Steady TA = 25 ° C ID 14.1 A G ~~eS~~ Current R JA (Note 1) State TA = 70 ° C 11.3 Power Dissipation R JA Steady TA = 25 ° C PD 1.46 W S (Note 1) State ~~ec~~ Continuous Drain Steady TA = 25 ° C ID 10.6 A **MARKING DIAGRAM/** ~~a~~ Current R JA (Note 2) ~~a~~ State ~~eS~~ TA = 70 ° C 8.5 **PIN ASSIGNMENT** Power Dissipation R JA TA = 25 ° C PD 0.82 W 1 8 (Note 2) 1 Source ~~ec ee~~ Source Continuous DrainCurrent R(Note 1) JA, t 10 s SteadyState TTAA = 25 = 70 °° CC ID 13.617 A **CASE 751STYLE 12SO−8** SourceGate ~~eS~~ Power Dissipation Steady ~~|~~ TA = 25 ° C PD ~~|~~ 2.12 ~~|~~ W ~~i~~ Top View m ~~:~~ R JA, t 10 s(Note 1) State 4920N = Device Code ~~ee~~ Pulsed Drain Current T ~~ee~~ A = 25 ° C, tp ~~ee~~ = 10 s IDM 136 A AY = Assembly Location= Year Operating Junction and Storage Temperature TJ, −55 to ° C WW = Work Week ~~ee ee~~ Tstg 150 = Pb−Free Package ~~ee~~ Source Current (Body Diode) ~~Gs~~ IS ~~GO~~ 2.1 A (Note: Microdot may be in either location) Single Pulse Drain−to−Source Avalanche Energy EAS 162 mJ (TJ = 25 ° C, VDD = 30 V, VGS = 10 V, **ORDERING INFORMATION** IL = 18 Apk, L = 1.0 mH, RG = 25 ) Lead Temperature for Soldering Purposes TL 260 ° C **Device Package Shipping** (1/8 ″ from case for 10 s) NTMS4920NR2G SO−8 Stresses exceeding those listed in the Maximum Ratings table may damage the ~~P| ———~~ (Pb−Free) device. If any of these limits are exceeded, device functionality should not be †For information on tape and reel specifications, assumed, damage may occur and reliability may be affected. ## **THERMAL RESISTANCE MAXIMUM RATINGS** |**Parameter**
~~a~~|**Symbol**
~~GD~~|**Value**|**Unit**| |---|---|---|---| |Junction−to−Ambient – Steady State (Note 1)
~~ee~~|R JA
~~ee~~
~~GD~~
~~et~~|85.5
~~ee~~|°C/W| |Junction−to−Ambient – t
10 s (Note 1)
~~ee~~
~~a~~|R JA
~~GD~~
~~ee~~
~~et~~
~~Gs~~|59
~~ee~~|| |Junction−to−Foot (Drain)
~~a~~
~~a~~|R JF
~~et~~
~~a~~
~~Gs~~|25
~~a~~|| |Junction−to−Ambient – SteadyState(Note 2)
~~a~~|R JA
~~Gs~~|152|| 1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surfacemounted on FR4 board using the minimum recommended pad size. Publication Order Number: **NTMS4920N/D** **1** © Semiconductor Components Industries, LLC, 2016 **February, 2016 − Rev. 2** ## **NTMS4920N** **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) |**ELECTRICAL CHARACTERISTIC**|**S**(TJ= 25°C|unless otherwise specified)|unless otherwise specified)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||30|||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/TJ||||12.2||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VGS= 0 V, VDS= 24 V|TJ= 25°C|||1.0|�A| ||||TJ= 125°C|||10|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=|±20 V|||±100|nA| |**ON CHARACTERISTICS**(Note 3)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||1.0||2.5|V| |Negative Threshold Temperature
Coefficient|VGS(TH)/TJ||||5.4||mV/°C| |Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 7.5 A|||3.6|4.3|m�| |||VGS= 4.5 V, ID = 6.5 A|||4.6|5.7|| |Forward Transconductance|gFS|VDS = 1.5 V, ID = 7.5 A|||30.8||S| |**CHARGES, CAPACITANCES AND GATE RESISTANCE**|||||||| |Input Capacitance|Ciss|VGS = 0 V, f = 1.0 MHz, VDS = 25 V|||4068||pF| |Output Capacitance|Coss||||1170||| |Reverse Transfer Capacitance|Crss||||41||| |Total Gate Charge|QG(TOT)|VGS = 4.5 V, VDS = 15 V, ID = 7.5 A|||26.3||nC| |Threshold Gate Charge|QG(TH)||||6.4||| |Gate−to−Source Charge|QGS||||10.4||| |Gate−to−Drain Charge|QGD||||3.8||| |Total Gate Charge|QG(TOT)|VGS = 10 V, VDS = 15 V, ID = 7.5 A|||58.9||nC| |**SWITCHING CHARACTERISTICS**(Note 4)|||||||| |Turn−On Delay Time|td(on)|VGS= 10 V, VDS=
ID= 1.0 A, RG=|15 V,
6.0�||15.3||ns| |Rise Time|tr||||4.7||| |Turn−Off Delay Time|td(off)||||68.6||| |Fall Time|tf||||42.2||| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Diode Voltage|VSD|VGS= 0 V, IS= 2.0 A|TJ= 25°C||0.7|1.0|V| ||||TJ= 125°C||0.53||| |Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt= 100 A/�s,
IS= 2.0 A|||50.3||ns| |Charge Time|ta||||25.7||| |Discharge Time|tb||||24.6||| |Reverse Recovery Charge|QRR||||65||nC| |**PACKAGE PARASITIC VALUES**|||||||| |Source Inductance|LS|TA= 25°C|||0.66||nH| |Drain Inductance|LD||||0.2||| |Gate Inductance|LG||||1.5||| |Gate Resistance|RG||||0.4|1.0|�| 3. Pulse Test: pulse width = 300 � s, duty cycle � 2%. 4. Switching characteristics are independent of operating junction temperatures. **www.onsemi.com** **2** **NTMS4920N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [491 x 606] intentionally omitted <==** **----- Start of picture text -----**
34 65
3230 4.5 V10V TJ = 25 ° C 60 VDS ≥ 10 V
28 55
3.6 V
26 2.8 V 50
24 3.2 V 45
22
20 3 V 40
18 2.6 V 35
16 30
14
25
12
10 20 TJ = 125 ° C
8 2.4 V 15
46 2 V 2.2 V 10 TJ = 25 ° C
2 5 TJ = −55 ° C
0 0
0 0.5 1.0 1.5 2.0 1 1.5 2 2.5 3 3.5 4 4.5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.050 0.006
0.045 T J = 25 ° C TJ = 25 ° C
ID = 7.5 A
0.040
0.005 VGS = 4.5 V
0.035
0.030
0.025 0.004
0.020
VGS = 10 V
0.015
0.003
0.010
0.005
0.000 0.002
2 4 6 8 10 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
1.8 10000
VGS = 10 V VGS = 0 V
1.6 ID = 7.5 A
1.4
1.2 1000 TJ = 125 ° C
1.0 TJ = 100 ° C
0.8
0.6 100
−50 −25 0 25 50 75 100 125 150 5 10 15 20 25 30
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DRAIN CURRENT (AMPS) DRAIN CURRENT (AMPS)
ID, ID,
) � ) �
DRAIN−TO−SOURCE RESISTANCE ( DRAIN−TO−SOURCE RESISTANCE (
DS(on), DS(on),
R R
, LEAKAGE (nA)
DRAIN−TO−SOURCE
IDSS
DS(on),
R RESISTANCE (NORMALIZED)
**----- End of picture text -----**
**Figure 5. On−Resistance Variation with Temperature** **Figure 6. Drain−to−Source Leakage Current vs. Voltage** **www.onsemi.com** **3** **NTMS4920N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [491 x 616] intentionally omitted <==** **----- Start of picture text -----**
5000 10
4500 TJ = 25 ° C QT
VGS = 0 V
4000 8
Ciss
3500 VDS
3000 6
2500
2000 4 QGD
1500 Coss QGS
1000 2 VGS = 10 V
500 Crss TIDJ = 7.5 A = 25 ° C
0 0
0 5 10 15 20 25 30 0 10 20 30 40 50 60
DRAIN−TO−SOURCE VOLTAGE (VOLTS) QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−To−Source and
Drain−To−Source Voltage vs. Total Charge
1000 2
IVDDS = 1 A = 15 V td(off) VTJGS = 25 = 0 V ° C
VGS = 10 V
1.5
100 tf
td(on) 1
tr
10
0.5
1 0
1 10 100 0.5 0.55 0.6 0.65 0.7 0.75 0.8
RG, GATE RESISTANCE (OHMS) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Figure 10. Diode Forward Voltage vs. Current
Variation vs. Gate Resistance
1000 175
ID = 18 A
150
100
10 �s 125
10 100 �s
100
1 ms
1 10 ms 75
SINGLE PULSE
° 50
TC = 25 C
0.1 RDS(on) LIMIT dc 25
THERMAL LIMIT
PACKAGE LIMIT
0.01 0
0.01 0.1 1 10 100 25 50 75 100 125 150
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE ( ° C)
C, CAPACITANCE (pF)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
t, TIME (ns)
, SOURCE CURRENT (AMPS)
IS
ID, DRAIN CURRENT (AMPS) AVALANCHE ENERGY (mJ)
EAS, SINGLE PULSE DRAIN−TO−SOURCE
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** **www.onsemi.com** **4** **NTMS4920N** ## **PACKAGE DIMENSIONS** **==> picture [468 x 465] intentionally omitted <==** **----- Start of picture text -----**
SOIC−8
CASE 751−07
ISSUE AK
−X− NOTES:
1. DIMENSIONING AND TOLERANCING PER
A ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
8 5 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
a PER SIDE.
B S 0.25 (0.010) M Y M 5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
1 PROTRUSION SHALL BE 0.127 (0.005) TOTAL
−Y− 4 K IN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
G
MILLIMETERS INCHES
C N X 45 DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
SEATING
PLANE B 3.80 4.00 0.150 0.157
−Z− C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
0.10 (0.004) G 1.27 BSC 0.050 BSC
H D M J HJ 0.190.10 0.250.25 0.0070.004 0.0100.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8
0.25 (0.010) M Z Y S X S N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
SOLDERING FOOTPRINT* STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1.52 5. DRAIN
0.060 6. DRAIN
7. DRAIN
8. DRAIN
pe
7.0 4.0
0.275 i 0.155
0.6 1.270
0.024 9008 0.050
SCALE 6:1 mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
**----- End of picture text -----**
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