# Power MOSFET, N Channel, 100 V, 50 A, 0.0122 ohm, DFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2473417/)

**URL**: https://novapart.co/products/NTMFS6B14NT1G/power-mosfet-n-channel-100-v-50-a-00122-ohm-dfn
**SKU**: NTMFS6B14NT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.4600
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 5Pins |
| Channel Type | N Channel |
| Power Dissipation | 77W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 77W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0122ohm |
| Transistor Case Style | DFN |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 50A |
| Drain Source On State Resistance | 0.0122ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2473417/)

NTMFS6B14N 

## Power MOSFET **100 V, 15 m 50 A, Single N−Channel** 

## **Features** 

- Small Footprint (5x6 mm) for Compact Design 

- Low R to Minimize Conduction Losses DS(on) 

- Low QG and Capacitance to Minimize Driver Losses 

**www.onsemi.com** 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **Parameter Symbol Value Unit** ~~es en Gs~~ Drain−to−Source Voltage VDSS 100 V Gate−to−Source Voltage VGS ± 20 V ~~A~~ Continuous Drain TC = 25 ° C ID 50 A Current R(Notes 1, 2, 3)JC Steady TC = 100 ° C 32 Power Dissipation State TC = 25 ° C PD 77 W ~~HF}~~ R JC (Notes 1, 2) TC = 100 ° C 32 Continuous Drain TA = 25 ° C ID 10 A ~~ee~~ Current R(Notes 1, 2, 3)JA Steady TA = 100 ° C 6.4 Power Dissipation State TA = 25 ° C PD 3.1 W ~~HF}Pe~~ R JA (Notes 1 & 2) ~~UdL Ud~~ TA = 100 ° C ~~Ee~~ 1.3 Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 180 A ~~SO i~~ Operating Junction and Storage Temperature TJ, Tstg −55 to ° C + 150 ~~a~~ Source Current (Body Diode) IS 60 A ~~es es Ge~~ Single Pulse Drain−to−Source Avalanche EAS 29 mJ Energy (IL(pk) = 24 A) ~~Pe~~ Lead Temperature for Soldering Purposes TL 260 ° C (1/8 ″ from case for 10 s) ~~Po~~ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

|**V(BR)DSS**<br>**RDS(ON) MAX**||**ID MAX**|
|---|---|---|
|100 V<br>15 m @ 10 V<br>~~[|~~#|||50 A|



D (5) G (4) S (1,2,3) **N−CHANNEL MOSFET** 

**MARKING DIAGRAM** 

**==> picture [160 x 111] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>1<br>S D<br>DFN5 S 6B14N<br>(SO−8FL) S | AYWZZ<br>CASE 488AA G D<br>STYLE 1 D<br>——<br>A = Assembly Location<br>Y = Year<br>W = Work Week<br>ZZ = Lot Traceability<br>**----- End of picture text -----**<br>


## **THERMAL RESISTANCE MAXIMUM RATINGS** 

||~~es ee~~|~~ee~~||
|---|---|---|---|
|**Parameter**<br>~~es~~|**Symbol**<br>~~es~~<br>~~es ee~~|**Value**<br>~~es~~<br>~~ee~~|**Unit**<br>~~es~~|
|Junction−to−Case − Steady State|R JC<br>~~es ee~~|1.6<br>~~ee~~|°C/W|
|Junction−to−Ambient − SteadyState(Note 2)|R JA|40||



## **ORDERING INFORMATION** 

See detailed ordering, marking and shipping information on page 5 of this data sheet. 

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 

2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

Publication Order Number: **NTMFS6B14N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2015 **February, 2015 − Rev. 1** 

## **NTMFS6B14N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ|= 25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|100|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||80||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 80 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||100||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|2.0||4.0|V|
|Threshold Temperature Coefficient|VGS(TH)/TJ||||−8.5||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 20 A||12.2|15|m�|
|||VGS= 6 V|ID= 10 A||18.5|23|m�|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 50 V|||1300||pF|
|Output Capacitance|COSS||||260|||
|Reverse Transfer Capacitance|CRSS||||18|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 50 V; ID= 20 A|||20||nC|
|Threshold Gate Charge|QG(TH)||||2.2|||
|Gate−to−Source Charge|QGS||||6.4|||
|Gate−to−Drain Charge|QGD||||6.5|||
|Plateau Voltage|VGP||||5.4||V|
|Gate Resistance|RG|TJ= 25°C|||1.0||�|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 50 V,<br>ID= 20 A, RG= 1.0�|||9.6||ns|
|Rise Time|tr||||39|||
|Turn−Off Delay Time|td(OFF)||||17|||
|Fall Time|tf||||6.8|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 20 A|TJ= 25°C||0.83|1.2|V|
||||TJ= 125°C||0.8|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 20 A|||45||ns|
|Charge Time|ta||||23|||
|Discharge Time|tb||||22|||
|Reverse Recovery Charge|QRR||||50||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

**www.onsemi.com** 

**2** 

**NTMFS6B14N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [242 x 157] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>VGS = 10 V<br>7.0 V<br>80<br>6.5 V<br>60<br>6.0 V<br>40<br>5.5 V<br>20 4.0 V<br>5.0 V<br>4.5 V<br>0<br>0 0.5 1.0 1.5 2.0 2.5 3.0<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**==> picture [240 x 383] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>90 V DS ≤  10 V<br>80<br>70<br>60<br>50<br>40<br>30 T J  = 25 ° C<br>20<br>10 TJ = 125 ° C TJ = −55 ° C<br>0<br>0 1 2 3 4 5 6 7 8<br>VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 2. Transfer Characteristics<br>30<br>27 T J  = 25 ° C<br>24<br>VGS = 6.0 VGS = 6.0 V = 6.0 V<br>21<br>18<br>15<br>VGS = 10 VGS = 10 V = 10 V<br>12<br>9<br>6<br>3<br>10 15 20 25 30<br>ID, DRAIN CURRENT (A)D, DRAIN CURRENT (A), DRAIN CURRENT (A)<br>, DRAIN CURRENT (A)<br>ID<br>) �<br>, DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


VDS, DRAIN−TO−SOURCE VOLTAGE (V) 

**Figure 1. On−Region Characteristics** 

**==> picture [491 x 399] intentionally omitted <==**

**----- Start of picture text -----**<br>
52 30<br>27 T J  = 25 ° C<br>44 I D  = 20 A<br>TJ = 25 ° C 24 VGS = 6.0 VGS = 6.0 V = 6.0 V<br>36 21<br>18<br>28<br>15<br>VGS = 10 VGS = 10 V = 10 V<br>20 12<br>9<br>12<br>6<br>4 3<br>4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 10 15 20 25 30<br>VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)D, DRAIN CURRENT (A), DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>2.2 100K<br>2.0 ID = 20 A T J  = 150 ° C<br>1.8 V GS  = 10 V 10K TJ = 125 ° C<br>1.6<br>1K<br>1.4<br>1.2<br>100<br>1.0<br>0.8 TJ = 25 ° C<br>10<br>0.6<br>0.4 1<br>−50 −25 0 25 50 75 100 125 150 10 20 30 40 50 60 70 80 90 100<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**www.onsemi.com** 

**3** 

**NTMFS6B14N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [245 x 154] intentionally omitted <==**

**----- Start of picture text -----**<br>
Ciss<br>1000 Coss<br>C rss<br>100<br>VGS = 0 V<br>10 TJ = 25 ° C<br>f = 1 MHz<br>1<br>1 10 100<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**==> picture [151 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**==> picture [239 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
11<br>QT<br>10<br>9<br>8<br>7<br>6 Qgs Qgd<br>5<br>4<br>3 TJ = 25 ° C<br>2 V DS  = 50 V<br>1 I D  = 20 A<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>Qg, TOTAL GATE CHARGE (nC)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge** 

**==> picture [490 x 387] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 20<br>VI D DS = 20 A = 50 V 18 T J  = 25 ° C<br>V GS = 10 V 16<br>14<br>100<br>12<br>tr<br>10<br>td(off)<br>8<br>td(on)<br>10<br>6<br>tf<br>4<br>2<br>1 0<br>1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000<br>VGS ≤  10 V<br>Single Pulse<br>100 TC = 25 ° C<br>500  � s<br>10<br>1 ms<br>1<br>10 ms<br>0.1 RDS(on) Limit<br>Thermal Limit<br>Package Limit<br>0.01<br>0.1 1 10 100<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**www.onsemi.com** 

**4** 

**NTMFS6B14N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [491 x 383] intentionally omitted <==**

**----- Start of picture text -----**<br>
40 100<br>35<br>30<br>25<br>20 10<br>25 ° C<br>15<br>10<br>100 ° C<br>5<br>0 1<br>0 5 10 15 20 25 30 35 40 45 50 0.0001 0.001 0.01<br>ID, DRAIN CURRENT (A) TAV, TIME IN AVALANCHE (sec)<br>Figure 12. GFS vs. ID Figure 13. IPEAK vs. TAV<br>100<br>50% Duty Cycle<br>20%<br>10<br>10%<br>5%<br>1 2%<br>1%<br>0.1 NTMFS6B14N, 650 mm [2] , Cu Single Layer Pad<br>Single Pulse<br>0.01<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>, DRAIN CURRENT (A)<br>, SMALL−SIGNAL FORWARDFS IPEAK<br>G TRANSFER CONDUCTANCE (S)<br>C/W)<br>°<br>R(t) (<br>**----- End of picture text -----**<br>


**Figure 14. Thermal Response** 

## **DEVICE ORDERING INFORMATION** 

|**Device**|**Marking**|**Package**|**Shipping**†|
|---|---|---|---|
|NTMFS6B14NT1G|6B14N|DFN5<br>(Pb−Free)|1500 / Tape & Reel|
|NTMFS6B14NT3G|6B14N|DFN5<br>(Pb−Free)|5000 / Tape & Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

**www.onsemi.com** 

**5** 

**NTMFS6B14N** 

## **PACKAGE DIMENSIONS** 

**==> picture [482 x 460] intentionally omitted <==**

**----- Start of picture text -----**<br>
DFN5 5x6, 1.27P<br>(SO−8FL)<br>CASE 488AA<br>2 X ISSUE L NOTES:1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>D < A a 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>=—= A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.00 5.15 5.30<br>2 D1 4.70 4.90 5.10<br>c D2 3.80 4.00 4.20<br>A1 E 6.00 6.15 6.30<br>JI T ut E1 5.70 5.90 6.10<br>1 2 3 4 E2 3.45 3.65 3.85<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.61 0.71<br>3 X C K 1.20 1.35 1.50<br>0.10 C e SEATINGPLANE L1L 0.51 0.125 REF0.61 0.71<br>M 3.00 3.40 3.80<br>A DETAIL A 0  −−− 12<br>0.10 C<br>RECOMMENDED<br>aT SIDE VIEW<br>DETAIL A SOLDERING FOOTPRINT*<br>2X<br>0.495 4.560<br>8X b<br>2X<br>0.10 C A B 1.530<br>0.05 c L e/2<br>1 4<br>os K Se e 3.200<br>4.530<br>E2<br>PIN 5 M 1.330<br>(EXPOSED PAD) L1 2X<br>0.905<br>a t a<br>1<br>G D2 0.965<br>4X<br>BOTTOM VIEW 1.000 1.270<br>PR Jf 4X "Os 0.750 PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>**----- End of picture text -----**<br>


ON Semiconductor and the         are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

## **LITERATURE FULFILLMENT** : 

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

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**NTMFS6B14N/D** 

**6** 



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---

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