# Power MOSFET, N Channel, 60 V, 25 A, 0.018 ohm, DFN, Surface Mount ![Product image](https://novapart.co/image/farnell:2775451/) **URL**: https://novapart.co/products/NTMFS5C682NLT1G/power-mosfet-n-channel-60-v-25-a-0018-ohm-dfn **SKU**: NTMFS5C682NLT1G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.9310 **Stock**: 10+ ## Description Transistor Polarity:N Channel; Continuous Drain Current Id:25A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.018ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2V; Power D ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | Lead (27-Jun-2024) | | No. Of Pins | 5Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | - | | Power Dissipation | 28W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | DFN | | Drain Source Voltage Vds | 60V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 25A | | Drain Source On State Resistance | 0.018ohm | | Gate Source Threshold Voltage Max | 2V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2775451/) NTMFS5C682NL ## Power MOSFET **60 V, 21 m 25 A, Single N−Channel** ## **Features** - Small Footprint (5x6 mm) for Compact Design - Low R to Minimize Conduction Losses DS(on) **www.onsemi.com** - Low QG and Capacitance to Minimize Driver Losses - These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant |**V(BR)DSS**|**RDS(ON) MAX**|**ID MAX**| |---|---|---| |60 V|21 m @ 10 V|25 A| ||31.5 m @ 4.5 V|| ## **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 60 V ~~a~~ Gate−to−Source Voltage VGS ± 20 V Continuous Drain TC = 25 ° C ID 25 A ~~ee~~ Current R(Notes 1, 3)JC Steady TC = 100 ° C ~~ee~~ 18 ~~ee~~ Power Dissipation State TC = 25 ° C PD 28 W G (4) ~~HF}~~ R JC (Note 1) TC = 100 ° C 14 Continuous Drain TA = 25 ° C ID 8.8 A ~~———~~ Current R(Notes 1, 2, 3)JA Steady ~~ee~~ TA = 100 ° C 6.2 Power Dissipation State TA = 25 ° C PD 3.5 W ~~HF}~~ R JA (Notes 1 & 2) TA = 100 ° C ~~Ee~~ 1.7 ~~ee~~ Pulsed Drain Current ~~ee~~ TA = 25 ° ~~eee~~ C, tp = 10 s IDM 130 A ~~—~~ Operating Junction and Storage Temperature TJ, Tstg −55 to+ 175 ° C } 1 ~~Po~~ Source Current (Body Diode) IS 31 A **DFN5** ~~SO~~ **(SO−8FL)** Single Pulse Drain−to−Source Avalanche EAS 43 mJ **CASE 488AA** Energy (IL(pk) = 1.1 A) **STYLE 1** Lead Temperature for Soldering Purposes TL 260 ° C (1/8 ″ from case for 10 s) 5C682L ~~eeee ee~~ A Stresses exceeding those listed in the Maximum Ratings table may damage the Y device. If any of these limits are exceeded, device functionality should not be W assumed, damage may occur and reliability may be affected. **==> picture [107 x 87] intentionally omitted <==** **----- Start of picture text -----**
D (5)
G (4)
S (1,2,3)
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**N−CHANNEL MOSFET** **==> picture [160 x 143] intentionally omitted <==** **----- Start of picture text -----**
MARKING
DIAGRAM
} D
1
S D
DFN5 S — 5C682L
(SO−8FL) S AYWZZ
CASE 488AA G D
STYLE 1 D
5C682L = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
**----- End of picture text -----**
**THERMAL RESISTANCE MAXIMUM RATINGS** |**Parameter**
~~a~~|**Symbol**
~~a~~|**Value**
~~a~~|**Unit**
~~a~~| |---|---|---|---| |Junction−to−Case − Steady State|R JC|5.3|°C/W| |Junction−to−Ambient − SteadyState(Note 2)|R JA|43|| ## **ORDERING INFORMATION** See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm[2] , 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. Publication Order Number: **NTMFS5C682NL/D** **1** © Semiconductor Components Industries, LLC, 2017 **April, 2017 − Rev. 0** ## **NTMFS5C682NL** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) |**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|60|||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/
TJ||||28||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,
VDS= 60 V|TJ= 25°C|||10|�A| ||||TJ= 125°C|||250|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA| |**ON CHARACTERISTICS**(Note 4)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 16�A||1.2||2.0|V| |Threshold Temperature Coefficient|VGS(TH)/TJ||||−4.5||mV/°C| |Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 10 A||18|21|m�| |||VGS= 4.5 V|ID= 10 A||26|31.5|| |Forward Transconductance|gFS|VDS=15 V, ID= 10 A|||17||S| |**CHARGES AND CAPACITANCES**|||||||| |Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 25 V|||410||pF| |Output Capacitance|COSS||||210||| |Reverse Transfer Capacitance|CRSS||||7.0||| |Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 48 V; ID= 10 A|||2.5||nC| |Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 48 V; ID= 10 A|||5.0||nC| |Threshold Gate Charge|QG(TH)|VGS= 10 V, VDS= 48 V; ID= 10 A|||0.6||nC| |Gate−to−Source Charge|QGS||||1.0||| |Gate−to−Drain Charge|QGD||||0.5||| |Plateau Voltage|VGP||||2.7||V| |**SWITCHING CHARACTERISTICS**(Note 5)|||||||| |Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 48 V,
ID= 10 A, RG= 2.5�|||4.0||ns| |Rise Time|tr||||12||| |Turn−Off Delay Time|td(OFF)||||12||| |Fall Time|tf||||1.5||| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Diode Voltage|VSD|VGS= 0 V,
IS= 10 A|TJ= 25°C||0.9|1.2|V| ||||TJ= 125°C||0.8||| |Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,
IS= 10 A|||18||ns| |Charge Time|ta||||9.0||| |Discharge Time|tb||||9.0||| |Reverse Recovery Charge|QRR||||7.0||nC| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 5. Switching characteristics are independent of operating junction temperatures. **www.onsemi.com** **2** **NTMFS5C682NL** ## **TYPICAL CHARACTERISTICS** **==> picture [490 x 591] intentionally omitted <==** **----- Start of picture text -----**
25 25
10 V to 3.4 V
4.5 V VDS = 3 V
3.2 V
20 20
3.0 V
15 15
2.8 V
10 10
2.6 V TJ = 25 ° C
5 2.4 V 5
VGS = 2.2 V TJ = −55 ° C TJ = 125 ° C
0 0
0 0.5 1.0 1.5 2.0 2.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
50 50
45 TJ = 25 ° C 45 T J = 25 ° C
ID = 10 A 40
35
30
VGS = 4.5 V
30
25
25
20 V GS = 10 V
20
15
15 10
3 4 5 6 7 8 9 10 10 15 20 25 30 35 40 45 50
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
2.5 100,000
VGS = 10 V T J = 175 ° C
2.0 ID = 10 A 10,000 TJ = 150 ° C
1000 TJ = 125 ° C
1.5
100 TJ = 85 ° C
1.0
10
0.5 1
−50 −25 0 25 50 75 100 125 150 175 10 20 30 40 50 60
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
, DRAIN CURRENT (A) , DRAIN CURRENT (A)
ID ID
) � ) �
, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m
DS(on) DS(on)
R R
, LEAKAGE (nA)
, NORMALIZED DRAIN−TO− IDSS
SOURCE RESISTANCE
DS(on)
R
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**Figure 5. On−Resistance Variation with Temperature** **Figure 6. Drain−to−Source Leakage Current vs. Voltage** **www.onsemi.com** **3** **NTMFS5C682NL** ## **TYPICAL CHARACTERISTICS** **==> picture [241 x 173] intentionally omitted <==** **----- Start of picture text -----**
1000
CISS
COSS
100
10
V GS = 0 V C RSS
TJ = 25 ° C
f = 1 MHz
1
0 10 20 30 40 50 60
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
**----- End of picture text -----**
**Figure 7. Capacitance Variation** **==> picture [243 x 384] intentionally omitted <==** **----- Start of picture text -----**
100
tf
t d(off)
t r
10
td(on)
1
V GS = 10 V
VDS = 48 V
ID = 10 A
0.1
1 10 100
RG, GATE RESISTANCE ( � )
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
TC = 25 ° C
Single Pulse
100 VGS ≤ 10 V 1 ms
500 � s
10 ms
10
1 RDS(on) Limit
Thermal Limit
Package Limit
dc
0.1
0.1 1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
, DRAIN CURRENT(A)
ID
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**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **==> picture [239 x 591] intentionally omitted <==** **----- Start of picture text -----**
10
QT
9
8
7
6
5
4
QGS QGD
3
2 VTJ DS = 25 = 48 V ° C
1 I D = 10 A
0
0 1 2 3 4 5
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source vs. Total Charge
10
V GS = 0 V
1
0.1 TJ = 125 ° C TJ = 25 ° C TJ = −55 ° C
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
10
T J(initial) = 25 ° C
1 TJ(initial) = 100 ° C
0.1
1E−05 1E−04 1E−03 1E−02
TAV, TIME IN AVALANCHE (s)
, GATE−TO−SOURCE VOLTAGE (V)
GS
V
, SOURCE CURRENT (A)
IS
, DRAIN CURRENT(A)
IPEAK
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**Figure 12. Maximum Drain Current vs. Time in Avalanche** **www.onsemi.com** **4** **NTMFS5C682NL** **==> picture [491 x 173] intentionally omitted <==** **----- Start of picture text -----**
100
50% Duty Cycle
20%
10
10%
5%
2%
1
1%
0.1
Single Pulse
0.01
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
PULSE TIME (sec)
C/W)
°
(t), EFFECTIVE TRANSIENT
JA
�
R THERMAL RESISTANCE(
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**Figure 13. Thermal Characteristics** ## **DEVICE ORDERING INFORMATION** |**Device**|**Marking**|**Package**|**Shipping**†| |---|---|---|---| |NTMFS5C682NLT1G|5C682L|DFN5
(Pb−Free)|1500 / Tape & Reel| |NTMFS5C682NLT3G|5C682L|DFN5
(Pb−Free)|5000 / Tape & Reel| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. **www.onsemi.com** **5** **NTMFS5C682NL** ## **PACKAGE DIMENSIONS** **==> picture [467 x 464] intentionally omitted <==** **----- Start of picture text -----**
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
2 X ISSUE M NOTES:
1. DIMENSIONING AND TOLERANCING PER
0.20 C ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
D < A a 3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
2 B 2 X BURRS.
D1 MILLIMETERS
0.20 C
DIM MIN NOM MAX
+ A 0.90 1.00 1.10
A1 0.00 −−− 0.05
E1 4 X b 0.33 0.41 0.51
c 0.23 0.28 0.33
E D 5.00 5.15 5.30
2 D1 4.70 4.90 5.10
c D2 3.80 4.00 4.20
A1 E 6.00 6.15 6.30
E1 5.70 5.90 6.10
1 2 3 4 E2 3.45 3.65 3.85
e 1.27 BSC
TOP VIEW G 0.51 0.575 0.71
C K 1.20 1.35 1.50
SEATING L 0.51 0.575 0.71
0.10 C DETAIL A PLANE L1 0.125 REF
M 3.00 3.40 3.80
=~. | A — 0 −−− 12
0.10 C STYLE 1:
a SIDE VIEW RECOMMENDED == PIN 1. 2. SOURCESOURCE
DETAIL A SOLDERING FOOTPRINT* 3. SOURCE
2X 4. GATE
8X b 0.495 4.560 5. DRAIN
2X
0.10 C A B
e/2 1.530
0.05 c
L e
1 4
K 3.200
4.530
E2
(EXPOSED PAD)PIN 5 L1 M 2X 1.330
0.905
Lt
1
G D2 0.965
P l if e 4X l i H l
BOTTOM VIEW 1.000 1.270
4X 0.750 PITCH
a m en DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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