# Power MOSFET, N Channel, 30 V, 46 A, 6950 µohm, DFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2473414RL/)

**URL**: https://novapart.co/products/NTMFS4C10NT1G/power-mosfet-n-channel-30-v-46-a-6950-ohm-dfn
**SKU**: NTMFS4C10NT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.0730
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:46A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.0058ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.2V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 5Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 23.6W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | DFN |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 46A |
| Drain Source On State Resistance | 6950µohm |
| Gate Source Threshold Voltage Max | 2.2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2473414RL/)

## NTMFS4C10N 

## Power MOSFET 

## **30 V, 46 A, Single N−Channel, SO−8 FL** 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low Capacitance to Minimize Driver Losses 

- Optimized Gate Charge to Minimize Switching Losses 

**www.onsemi.com** 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**==> picture [191 x 299] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS RDS(ON) MAX ID MAX<br>6.95 m  @ 10 V<br>30 V 46 A<br>10.8 m  @ 4.5 V<br>ceee<br>D (5−8)<br>G (4)<br>S (1,2,3)<br>N−CHANNEL MOSFET<br>MARKING<br>DIAGRAMSMARKING<br>D<br>S D<br>SO−8 FLAT LEADCASE 488AA<br>S — 4C10N<br>CASE 488AA<br>S AYWZZ<br>STYLE 1<br>GS D<br>1<br>D<br>AY = Assembly Location= Year<br>Y = Year<br>W = Work Week<br>ZZ = Lot Traceabililty<br>**----- End of picture text -----**<br>


## **Applications** 

- CPU Power Delivery 

- DC−DC Converters 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) 

~~ee~~ **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 30 V ~~—~~ Gate−to−Source Voltage VGS ± 20 V Continuous Drain TA = 25 ° C ID 15.0 A G (4) ~~ee~~ Current R(Note 1) JA ~~ee~~ TA = 80 ° C 11.2 ~~e~~ e Power Dissipation TA = 25 ° C PD 2.49 W S (1,2,3) R JA (Note 1) **N−CHANNEL MOSFET** Continuous Drain TA = 25 ° C ID 22.5 A ~~eeee~~ Current R(Note 1) JA ≤ 10 s ~~eeee~~ TA = 80 ° C 16.8 **DIAGRAMSMARKING** Power Dissipation TA = 25 ° C PD 5.6 W D R JA ≤ 10 s (Note 1) Steady S D ~~ee~~ Continuous Drain ee State TA ~~ee~~ = 25 ° C ID 8.2 A **SO−8 FLAT LEADCASE 488AA** S — 4C10N ~~|~~ Current R(Note 2) JA ~~SSS~~ TA = 80 ° C 6.2 **STYLE 1** GS AYWZZ D Power Dissipation TA = 25 ° C PD 0.75 W 1 D R JA (Note 2) Continuous Drain TC = 25 ° C ID 46 A AY = Assembly Location= Year ~~ee~~ Current R(Note 1) JC ~~ee~~ TC =80 ° C 34 W = Work Week ~~ee~~ Power Dissipation ~~ee~~ TC = 25 ° C PD 23.6 ~~ee~~ W ZZ = Lot Traceabililty R JC (Note 1) ~~ee~~ Pulsed DrainCurrent ~~a~~ TA = 25 ° C, tp = 10 s IDM 132 A **ORDERING INFORMATION** ~~ee es~~ Current Limited by Package TA = 25 ° C IDmax 80 A **Device Package Shipping**[†] Operating Junction and Storage ~~es~~ TJ, −55 to ° C NTMFS4C10NT1G SO−8 FL 1500 / Temperature TSTG +150 (Pb−Free) Tape & Reel ~~Oe~~ Source Current (Body Diode) IS 21 A ~~ee~~ Drain to Source dV/dt dV/dt 7.0 V/ns †For information on tape and reel specifications, including part orientation and tape sizes, please Single Pulse Drain−to−Source AvalancheEnergy (TJ = 25 ° C, VGS = 10 V, IL = 25 Apk, EAS 31 mJ Brochure, BRD8011/D.refer to our Tape and Reel Packaging Specifications ~~po~~ L = 0.1 mH, RGS = 25 ) (Note 3) Lead Temperature for Soldering Purposes TL 260 ° C ~~ee~~ (1/8 ″ from case for 10 s) 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

3. This is the absolute maximum rating. Parts are 100% tested at TJ = 25 ° C, VGS = 10 V, IL = 17 Apk, EAS = 14 mJ. 

Publication Order Number: **NTMFS4C10N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2015 **November, 2015 − Rev. 9** 

**NTMFS4C10N** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**THERMAL RESISTANCE MAXIMUM RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Value**|**Unit**|
|Junction−to−Case (Drain)|R�JC|5.3|°C/W|
|Junction−to−Ambient – Steady State (Note 4)|R�JA|50.3||
|Junction−to−Ambient – Steady State (Note 5)|R�JA|165.9||
|Junction−to−Ambient – (t≤10 s) (Note 4)|R�JA|22.2||



4. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

5. Surface−mounted on FR4 board using the minimum recommended pad size. 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||30|||V|
|Drain−to−Source Breakdown Voltage<br>(transient)|V(BR)DSSt|VGS= 0 V, ID(aval)= 7.1 A,<br>Tcase= 25°C, ttransient= 100 ns||34|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||14.5||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 24 V|TJ= 25°C|||1.0|�A|
||||TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA|
|**ON CHARACTERISTICS**(Note 6)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.3||2.2|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||4.7||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 30 A||5.8|6.95|m�|
|||VGS= 4.5 V|ID= 15 A||8.9|10.8||
|Forward Transconductance|gFS|VDS= 1.5 V, ID= 15 A|||43||S|
|Gate Resistance|RG|TA= 25°C||0.3|1.0|2.0|�|
|**CHARGES AND CAPACITANCES**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 15 V|||987||pF|
|Output Capacitance|COSS||||574|||
|Reverse Transfer Capacitance|CRSS||||162|||
|Capacitance Ratio|CRSS/CISS|VGS= 0 V, VDS= 15 V, f = 1 MHz|||0.165|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||9.7||nC|
|Threshold Gate Charge|QG(TH)||||1.5|||
|Gate−to−Source Charge|QGS||||2.8|||
|Gate−to−Drain Charge|QGD||||4.8|||
|Gate Plateau Voltage|VGP||||3.2||V|
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V; ID= 30 A|||18.6||nC|
|**SWITCHING CHARACTERISTICS**(Note 7)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||9.0||ns|
|Rise Time|tr||||34|||
|Turn−Off Delay Time|td(OFF)||||14|||
|Fall Time|tf||||7.0|||



**www.onsemi.com** 

**2** 

## **NTMFS4C10N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ|= 25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**SWITCHING CHARACTERISTICS**(Note 7)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||7.0||ns|
|Rise Time|tr||||26|||
|Turn−Off Delay Time|td(OFF)||||18|||
|Fall Time|tf||||4.0|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 10 A|TJ= 25°C||0.80|1.1|V|
||||TJ= 125°C||0.67|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 30 A|||26.7||ns|
|Charge Time|ta||||14.1|||
|Discharge Time|tb||||12.6|||
|Reverse Recovery Charge|QRR||||13.7||nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

6. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

7. Switching characteristics are independent of operating junction temperatures. 

**www.onsemi.com** 

**3** 

**NTMFS4C10N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 592] intentionally omitted <==**

**----- Start of picture text -----**<br>
65 80<br>60 4.0 V T J  = 25 ° C 3.8 V VDS = 5 VDS = 5 V = 5 V<br>4.2 V to 10 V 70<br>55<br>3.6 V<br>50 60<br>45<br>3.4 V<br>40 50<br>35<br>3.2 V 40<br>30<br>25 3.0 V 30<br>20 TJ = 125J = 125 = 125 ° C<br>20<br>1510 2.8 V TJ = 25J = 25 = 25 ° C<br>10<br>5 2.6 V TJ = −55J = −55 = −55 ° C<br>0 0<br>0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.020 0.020<br>0.018 I D  = 30 A 0.018 T J  = 25 ° C<br>0.016 0.016<br>0.014 0.014<br>0.012 0.012<br>0.010 0.010 V GS  = 4.5 V<br>0.008 0.008<br>0.006 0.006 VGS = 10 V<br>0.004 0.004<br>0.002 0.002<br>3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 10 20 30 40 50 60 70<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and<br>Gate Voltage<br>1.7 10000<br>1.6 VI D GS= 30 A = 10 V VGS = 0 V TJ = 150 ° C<br>1.5<br>1.4<br>1000 TJ = 125 ° C<br>1.3<br>1.2<br>1.1<br>1.0 100 TJ = 85 ° C<br>0.9<br>0.8<br>0.7 10<br>−50 −25 0 25 50 75 100 125 150 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID IDD<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, DRAIN−TO−SOURCE<br>IDSS<br>DS(on)<br>R RESISTANCE (NORMALIZED)<br>**----- End of picture text -----**<br>


**==> picture [240 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
80<br>VDS = 5 VDS = 5 V = 5 V<br>70<br>60<br>50<br>40<br>30<br>TJ = 125J = 125 = 125 ° C<br>20<br>TJ = 25J = 25 = 25 ° C<br>10<br>TJ = −55J = −55 = −55 ° C<br>0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0<br>VGS, GATE−TO−SOURCE VOLTAGE (V)GS, GATE−TO−SOURCE VOLTAGE (V), GATE−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>IDD<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**www.onsemi.com** 

**4** 

**NTMFS4C10N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [242 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
1200<br>VGS = 0 V<br>1000 Ciss T J  = 25 ° C<br>800<br>Coss<br>600<br>400<br>200 Crss<br>0<br>0 5 10 15 20 25 30<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**==> picture [243 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>VDD = 15 V<br>ID = 15 A<br>VGS = 10 V<br>td(on)<br>100<br>tr<br>t d(off)<br>tf<br>10<br>1<br>1 10 100<br>t, TIME (ns)<br>**----- End of picture text -----**<br>


**==> picture [104 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
RG, GATE RESISTANCE ( � )<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**==> picture [239 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>9 QT<br>8<br>7<br>6<br>5<br>4 Qgs Q gd<br>3 TJ = 25 ° C<br>2 VDD = 15 V<br>1 VGS = 10 V<br>ID = 30 A<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>Qg, TOTAL GATE CHARGE (nC)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge** 

**==> picture [240 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
20<br>18 VGS = 0 V<br>16<br>14<br>12<br>10<br>8<br>6<br>4 TJ = 125 ° C<br>2 TJ = 25 ° C<br>0<br>0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 10. Diode Forward Voltage vs. Current** 

**==> picture [491 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 14<br>10  � s ID = 17 A<br>12<br>10 100  � s<br>10<br>1 ms<br>10 ms 8<br>1<br>0 V < VGS < 10 V 6<br>Single Pulse<br>0.1 T C = 25 ° C dc 4<br>RDS(on) Limit<br>Thermal Limit 2<br>Package Limit<br>0.01 0<br>0.01 0.1 1 10 100 25 50 75 100 125 150<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE ( ° C)<br>, DRAIN CURRENT (A)<br>ID , SINGLE PULSE DRAIN−TO−<br>AS<br>E<br>SOURCE AVALANCHE ENERGY (mJ)<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** 

**www.onsemi.com** 

**5** 

**NTMFS4C10N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [491 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>Duty Cycle = 50%<br>20%<br>10<br>10%<br>5%<br>2%<br>1<br>1%<br>0.1<br>Single Pulse<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br>R(t) (<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

**==> picture [492 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
60<br>100<br>50<br>40 T A  = 25 ° C<br>30 TA = 85 ° C<br>10<br>20<br>10<br>0 1<br>0 10 20 30 40 50 60 70 80 1.E−08 1.E−07 1.E−06 1.E−05 1.E−04 1.E−03<br>ID (A) PULSE WIDTH (SECONDS)<br> (S)<br>FS<br>G<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 14. GFS vs. ID** 

**Figure 15. Avalanche Characteristics** 

**www.onsemi.com** 

**6** 

**NTMFS4C10N** 

## **PACKAGE DIMENSIONS** 

**DFN5 5x6, 1.27P (SO−8FL)** CASE 488AA ISSUE M 

**==> picture [468 x 392] intentionally omitted <==**

**----- Start of picture text -----**<br>
2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>D < A a 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>fet —= A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.00 5.15 5.30<br>2 D1 4.70 4.90 5.10<br>c D2 3.80 4.00 4.20<br>A1 E 6.00 6.15 6.30<br>E1 5.70 5.90 6.10<br>1 2 3 4 E2 3.45 3.65 3.85<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.575 0.71<br>C K 1.20 1.35 1.50<br>SEATING L 0.51 0.575 0.71<br>0.10 C DETAIL A PLANE L1 0.125 REF<br>a — M 3.00 3.40 3.80<br>A STYLE 1: = 0  −−− 12<br>1 0.10 C PIN 1. 2. SOURCESOURCE RECOMMENDED<br>SIDE VIEW  3. SOURCE SOLDERING FOOTPRINT*<br>DETAIL A  4. GATE 2X<br> 5. DRAIN 0.495 4.560<br>8X b 2X<br>1.530<br>0.10 C A B<br>e/2<br>0.05 c<br>L e<br>a 1 l 4 3.200<br>K 4.530<br>E2 1.330<br>PIN 5 M 2X<br>(EXPOSED PAD) L1 0.905<br>1<br>a to<br>0.965<br>G D2 4X<br>1.000 1.270<br>T BOTTOM VIEW et 4X 7 0.750 a988 PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

ON Semiconductor and the         are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

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**NTMFS4C10N/D** 

**7** 



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