# Power MOSFET, N Channel, 30 V, 52 A, 5800 µohm, DFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2473413RL/)

**URL**: https://novapart.co/products/NTMFS4C09NT1G/power-mosfet-n-channel-30-v-52-a-5800-ohm-dfn
**SKU**: NTMFS4C09NT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1760
**Stock**: 500+
**Lead Time**: 141 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:52A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.0046ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.1V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 5Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 25.5W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | DFN |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 52A |
| Drain Source On State Resistance | 5800µohm |
| Gate Source Threshold Voltage Max | 2.1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2473413RL/)

## NTMFS4C09N 

## Power MOSFET **30 V, 52 A, Single N−Channel, SO−8 FL** 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low Capacitance to Minimize Driver Losses 

**www.onsemi.com** 

- Optimized Gate Charge to Minimize Switching Losses 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**==> picture [492 x 504] intentionally omitted <==**

**----- Start of picture text -----**<br>
Compliant ee V(BR)DSS RDS(ON) ee  MAX ID MAX ee<br>5.8 m  @ 10 V<br>Applications 30 V 52 A<br>• CPU Power Delivery 8.5 m  @ 4.5 V<br>• DC−DC Converters<br>D (5−8)<br>MAXIMUM RATINGS  (TJ = 25 ° C unless otherwise stated)<br>Parameter Symbol Value Unit<br>Drain−to−Source Voltage VDSS 30 V<br>Gate−to−Source Voltage VGS ± 20 V G (4)<br>Continuous Drain TA = 25 ° C ID 16.4 A<br>————TP Current R(Note 1) JA TA = 80 ° C 12.3 & S (1,2,3)<br>Power Dissipation TA = 25 ° C PD 2.51 W N−CHANNEL MOSFET<br>R JA (Note 1)<br>ee Continuous DrainCurrent R(Note 1) JA ≤  10 s ee TTAA = 25 = 80 ee °° CC ee ID 25.319.0 ee ee A DIAGRAMSMARKING D<br>Power Dissipation TA = 25 ° C PD 6.0 W SO−8 FLAT LEAD S D<br>R JA ≤  10 s (Note 1) Steady CASE 488AA S 4C09N<br>gg Continuous Drain State TA = 25 ° C ID 9.0 A STYLE 1 S AYWZZ<br>| Current R(Note 2) JA ea? TA = 80 ° C 6.8 1 G D D<br>Power Dissipation TA = 25 ° C PD 0.76 W A = Assembly Location<br>R JA (Note 2) Y = Year<br>ee Continuous Drain ee TC = 25 ee ° C ee ID ee 52 ee A W = Work Week<br>a Current R(Note 1) JC TC =80 ° C 39 ZZ = Lot Traceabililty<br>Power Dissipation TC = 25 ° C PD 25.5 W<br>R JC (Note 1) ORDERING INFORMATION<br>ee Pulsed DrainCurrent  ee TA = 25 ° C, tp = 10 s ee ee IDM ee 146 ee A Device Package Shipping [†]<br>p____j Current Limited by Package TA = 25 ° C IDmax 80 | A NTMFS4C09NT1G SO−8 FL 1500 /<br>Operating Junction and Storage "| TJ, {| −55 to ° C (Pb−Free) Tape & Reel<br>Temperature TSTG +150 NTMFS4C09NT3G SO−8 FL 5000 /<br>Source Current (Body Diode) IS 23 A (Pb−Free) Tape & Reel<br>pT Ff<br>Drain to Source dV/dt dV/dt 7.0 V/ns †For information on tape and reel specifications,<br>Single Pulse Drain−to−Source Avalanche EAS 42 mJ including part orientation and tape sizes, please<br>Energy (TJ = 25 ° C, VGS = 10 V, IL = 29 Apk, refer to our Tape and Reel Packaging Specifications<br>es L = 0.1 mH, RLead Temperature for Soldering PurposesGS = 25 ) (Note 3) a TL 260 ° C Brochure, BRD8011/D.<br>ee (1/8 ″  from case for 10 s) ee ee ee<br>Stresses exceeding those listed in the Maximum Ratings table may damage the<br>device. If any of these limits are exceeded, device functionality should not be<br>assumed, damage may occur and reliability may be affected.<br>**----- End of picture text -----**<br>


1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

3. Parts are 100% tested at TJ = 25 ° C, VGS = 10 V, IL = 20 Apk, EAS = 20 mJ. 

Publication Order Number: **NTMFS4C09N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2015 **November, 2015 − Rev. 5** 

**NTMFS4C09N** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**THERMAL RESISTANCE MAXIMUM RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Value**|**Unit**|
|Junction−to−Case (Drain)|R�JC|4.9|°C/W|
|Junction−to−Ambient – Steady State (Note 4)|R�JA|49.8||
|Junction−to−Ambient – Steady State (Note 5)|R�JA|164.6||
|Junction−to−Ambient – (t≤10 s) (Note 4)|R�JA|21.0||



4. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

5. Surface−mounted on FR4 board using the minimum recommended pad size. 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||30|||V|
|Drain−to−Source Breakdown Voltage<br>(transient)|V(BR)DSSt|VGS= 0 V, ID(aval)= 8.4 A,<br>Tcase= 25°C, ttransient= 100 ns||34|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||14.4||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 24 V|TJ= 25°C|||1.0|�A|
||||TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA|
|**ON CHARACTERISTICS**(Note 6)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.3||2.1|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||4.8||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 30 A||4.6|5.8|m�|
|||VGS= 4.5 V|ID= 18 A||6.8|8.5||
|Forward Transconductance|gFS|VDS= 1.5 V, ID= 15 A|||50||S|
|Gate Resistance|RG|TA= 25°C||0.3|1.0|2.0|�|
|**CHARGES AND CAPACITANCES**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 15 V|||1252||pF|
|Output Capacitance|COSS||||610|||
|Reverse Transfer Capacitance|CRSS||||126|||
|Capacitance Ratio|CRSS/CISS|VGS= 0 V, VDS= 15 V, f = 1 MHz|||0.101|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||10.9||nC|
|Threshold Gate Charge|QG(TH)||||1.9|||
|Gate−to−Source Charge|QGS||||3.4|||
|Gate−to−Drain Charge|QGD||||5.4|||
|Gate Plateau Voltage|VGP||||3.1||V|
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V; ID= 30 A|||22.2||nC|
|**SWITCHING CHARACTERISTICS**(Note 7)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||10||ns|
|Rise Time|tr||||32|||
|Turn−Off Delay Time|td(OFF)||||16|||
|Fall Time|tf||||6.0|||



6. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

7. Switching characteristics are independent of operating junction temperatures. 

**www.onsemi.com** 

**2** 

## **NTMFS4C09N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ|= 25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**SWITCHING CHARACTERISTICS**(Note 7)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||7.0||ns|
|Rise Time|tr||||28|||
|Turn−Off Delay Time|td(OFF)||||20|||
|Fall Time|tf||||4.0|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 10 A|TJ= 25°C||0.79|1.1|V|
||||TJ= 125°C||0.65|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 30 A|||31||ns|
|Charge Time|ta||||15|||
|Discharge Time|tb||||16|||
|Reverse Recovery Charge|QRR||||15||nC|



6. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

7. Switching characteristics are independent of operating junction temperatures. 

**www.onsemi.com** 

**3** 

**NTMFS4C09N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [491 x 611] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 100<br>4.5 V to 10 V 4.0 V<br>90 T J  = 25 ° C 3.8 V 90 V DS  = 5 V<br>80 80<br>70 3.6 V 70<br>60 60<br>3.4 V<br>50 50<br>40 3.2 V 40<br>30 30<br>3.0 V<br>20 2.8 V 20 T J  = 125 ° C<br>10 V GS  = 2.6 V 10 TJ = 25 ° C T J  = −55 ° C<br>0 0<br>0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.026 0.009<br>0.024<br>0.022 I D  = 30 A 0.008 T J  = 25 ° C<br>0.020<br>VGS = 4.5 V<br>0.018 0.007<br>0.016<br>0.014 0.006<br>0.012<br>0.010 0.005<br>VGS = 10 V<br>0.008<br>0.006 0.004<br>0.004<br>0.002 0.003<br>3 4 5 6 7 8 9 10 10 20 30 40 50 60 70<br>VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1.7 1600<br>V GS  = 0 V<br>1.61.5 V ID GS  = 30 A  = 10 V 1400 Ciss T J  = 25 ° C<br>1200<br>1.4<br>1000<br>1.3 Coss<br>1.2 800<br>1.1<br>600<br>1.0<br>400<br>0.9<br>200 Crss<br>0.8<br>0.7 0<br>−50 −25 0 25 50 75 100 125 150 0 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>) �<br>, NORMALIZED DRAIN−TO− SOURCE RESISTANCE ( C, CAPACITANCE (pF)<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Capacitance Variation** 

**www.onsemi.com** 

**4** 

**NTMFS4C09N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [491 x 608] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 1000<br>QT VGS = 10 V<br>V DD  = 15 V<br>8 ID = 15 A<br>td(off)<br>100<br>tf<br>6<br>tr<br>4 Q GS Q GD<br>VGS = 10 V 10 td(on)<br>2 VDD = 15 V<br>ID = 30 A<br>TJ = 25 ° C<br>0 1<br>0 2 4 6 8 10 12 14 16 18 20 22 24 1 10 100<br>QG, TOTAL GATE CHARGE (nC) RG, GATE RESISTANCE ( � )<br>Figure 7. Gate−to−Source and Figure 8. Resistive Switching Time Variation<br>Drain−to−Source Voltage vs. Total Charge vs. Gate Resistance<br>20 1000<br>18 V GS  = 0 V 0 V < VGS < 10 V<br>16 100<br>14 10  � s<br>12 T J  = 125 ° C T J  = 25 ° C 10 100  � s<br>1 ms<br>10<br>10 ms<br>8 1<br>6<br>4 0.1 R DS(on)  Limit dc<br>Thermal Limit<br>2 Package Limit<br>0 0.01<br>0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.01 0.1 1 10 100<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 9. Diode Forward Voltage vs. Current Figure 10. Maximum Rated Forward Biased<br>Safe Operating Area<br>20 80<br>18 I D  = 20 A 70<br>16<br>60<br>14<br>50<br>12<br>10 40<br>8<br>30<br>6<br>20<br>4<br>10<br>2<br>0 0<br>25 50 75 100 125 150 0 5 10 15 20 25 30 35 40 45 50<br>TJ, STARTING JUNCTION TEMPERATURE ( ° C) ID (A)<br>t, TIME (ns)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)<br>, SOURCE CURRENT (A)IS ID<br> (S)<br>FS<br>G<br>, SINGLE PULSE DRAIN−TO−<br>AS<br>E<br>SOURCE AVALANCHE ENERGY (mJ)<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Avalanche Energy vs. Starting Junction Temperature** 

**Figure 12. GFS vs. ID** 

**www.onsemi.com** 

**5** 

**NTMFS4C09N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [248 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>10<br>1<br>1.E−08 1.E−07 1.E−06 1.E−05 1.E−04 1.E−03<br>PULSE WIDTH (sec)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 13. Avalanche Characteristics** 

**==> picture [489 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>Duty Cycle = 0.5<br>0.2<br>10<br>0.1<br>0.05<br>0.02<br>1<br>0.01<br>0.1<br>Single Pulse<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br>R(t) (<br>**----- End of picture text -----**<br>


**Figure 14. Thermal Response** 

**www.onsemi.com** 

**6** 

**NTMFS4C09N** 

## **PACKAGE DIMENSIONS** 

**DFN5 5x6, 1.27P (SO−8FL)** CASE 488AA ISSUE M 

**==> picture [475 x 544] intentionally omitted <==**

**----- Start of picture text -----**<br>
2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>D < A a 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>fet —= A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.00 5.15 5.30<br>2 D1 4.70 4.90 5.10<br>c D2 3.80 4.00 4.20<br>A1 E 6.00 6.15 6.30<br>E1 5.70 5.90 6.10<br>1 2 3 4 E2 3.45 3.65 3.85<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.575 0.71<br>C K 1.20 1.35 1.50<br>SEATING L 0.51 0.575 0.71<br>0.10 C DETAIL A PLANE L1 0.125 REF<br>= | —— M 3.00 3.40 3.80<br>A STYLE 1: 0  −−− 12<br>0.10 C PIN 1. SOURCE<br> 2. SOURCE RECOMMENDED<br>8 SIDE VIEW DETAIL A  3. 4. GATESOURCE SOLDERING FOOTPRINT* ———<br> 5. DRAIN 2X<br>0.495 4.560<br>8X b 2X<br>0.10 C A B 1.530<br>e/2<br>0.05 c<br>L e<br>1 4<br>3.200<br>K 4.530<br>W W “ 5 Pe<br>E2 1.330<br>PIN 5 M 2X<br>(EXPOSED PAD) L1 0.905<br>1<br>a to<br>0.965<br>G D2 4X<br>1.000 1.270<br>BOTTOM VIEW<br>oa 4X “OES 0.750 PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>ON Semiconductor and the         are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.<br>SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed<br>at www.onsemi.com/site/pdf/Patent−Marking.pdf.  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation<br>or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and<br>specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  “Typical” parameters which may be provided in SCILLC data sheets<br>and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each<br>customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended,<br>or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which<br>the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or<br>unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and<br>expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim<br>alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable<br>copyright laws and is not for resale in any manner.<br>**----- End of picture text -----**<br>


## **PUBLICATION ORDERING INFORMATION** 

## **LITERATURE FULFILLMENT** : 

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

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**NTMFS4C09N/D** 

**7** 



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