# Power MOSFET, N Channel, 30 V, 147 A, 1520 µohm, SO-8 FL, Surface Mount ![Product image](https://novapart.co/image/farnell:2724415/) **URL**: https://novapart.co/products/NTMFS4934NT1G./power-mosfet-n-channel-30-v-147-a-1520-ohm-so-8-fl **SKU**: NTMFS4934NT1G. **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.4000 **Stock**: 10+ ## Description Transistor Polarity:N Channel; Continuous Drain Current Id:147A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.00152ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1.6V; ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | Lead (17-Jan-2022) | | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | - | | Power Dissipation | 69.44W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | SO-8 FL | | Drain Source Voltage Vds | 30V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 147A | | Drain Source On State Resistance | 1520µohm | | Gate Source Threshold Voltage Max | 1.6V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2724415/) NTMFS4934N ## Power MOSFET ## **30 V, 147 A, Single N−Channel, SO−8 FL** ## **Features** - Low R to Minimize Conduction Losses DS(on) - Low Capacitance to Minimize Driver Losses **http://onsemi.com** - Optimized Gate Charge to Minimize Switching Losses - These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant **V(BR)DSS RDS(ON) MAX ID MAX** 2.0 m @ 10 V 30 V 147 A 3.0 m @ 4.5 V ~~oe~~ D (5,6) G (4) S (1,2,3) **N−CHANNEL MOSFET** ## **Applications** - CPU Power Delivery, DC−DC Converters **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ± 20 V Continuous Drain TA = 25 ° C ID 29.1 A G (4) ~~Ss~~ Current R(Note 1) JA TA = 100 ° C 18.4 Power Dissipation TA = 25 ° C PD 2.72 W S (1,2,3) ~~es~~ R JA (Note 1) ~~ee~~ **N−CHANNEL MOSFET** Continuous Drain TA = 25 ° C ID 47.5 A Current R(Note 1) JA ≤ 10 s TA = 100 ° C 30.0 **MARKING** ~~ee~~ Power Dissipation TA ~~ee~~ = 25 ° C PD 7.23 W **DIAGRAM** ~~a~~ R JA ≤ 10 s (Note 1) Steady D Continuous Drain State TA = 25 ° C ID 17.1 A 1 S D Current R(Note 2) JA TA = 100 ° C 10.8 **SO−8 FLAT LEAD** SS AYWZZ4934N **CASE 488AA** Power Dissipation TA = 25 ° C PD 0.93 W **STYLE 1** G D R JA (Note 2) D ~~fe~~ Continuous Drain TC ~~ee~~ = 25 ° C ID 147 A : ~~ee~~ Current R(Note 1) JC TC =100 ° C 93 AY = Year= Assembly Location Power Dissipation TC = 25 ° C PD 69.44 W W = Work Week ~~Slt~~ R JC (Note 1) ZZ = Lot Traceability ~~|~~ Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 442 A Current Limited by Package TA = 25 ~~_}~~ ° C IDmax ~~|~~ 100 ~~|~~ A Operating Junction and Storage Temperature TJ, −55 to ° C **ORDERING INFORMATION** TSTG +150 Source Current (Body Diode) IS 68 A **Device Package Shipping**[†] Drain to Source DV/DT dV/dt 6 V/ns NTMFS4934NT1G SO−8 FL 1500 / Single Pulse Drain−to−Source Avalanche EAS 205 mJ (Pb−Free) Tape & Reel Energy TJ = 25 ° C, VDD = 24 V, VGS = 10 V, NTMFS4934NT3G SO−8 FL 5000 / IL = 37 Apk, L = 0.3 mH, RG = 25 Lead Temperature for Soldering Purposes TL 260 ° C (Pb−Free) Tape & Reel ~~a~~ (1/8 ″ from case for 10 s) †For information on tape and reel specifications, including part orientation and tape sizes, please Stresses exceeding Maximum Ratings may damage the device. Maximum refer to our Tape and Reel Packaging Specifications Ratings are stress ratings only. Functional operation above the Recommended Brochure, BRD8011/D. Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. Publication Order Number: **NTMFS4934N/D** **1** © Semiconductor Components Industries, LLC, 2012 **May, 2012 − Rev. 4** **NTMFS4934N** ## **THERMAL RESISTANCE MAXIMUM RATINGS** |**THERMAL RESISTANCE MAXIMUM RATINGS**|||| |---|---|---|---| |**Parameter**|**Symbol**|**Value**|**Unit**| |Junction−to−Case (Drain)|R�JC|1.8|°C/W| |Junction−to−Ambient – Steady State (Note 3)|R�JA|46.0|| |Junction−to−Ambient – Steady State (Note 4)|R�JA|134.2|| |Junction−to−Ambient – (t≤10 s) (Note 3)|R�JA|17.3|| 3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size. **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) |**Parameter**|**Symbol**|**Test Condition**|**Test Condition**|**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---|---| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|30|||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/
TJ||||15.2||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,
VDS= 24 V|TJ= 25°C|||1.0|�A| ||||TJ= 125°C|||10|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA| |**ON CHARACTERISTICS**(Note 5)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.2|1.6|2.2|V| |Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||4.6||mV/°C| |Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 30 A||1.52|2.0|m�| ||||ID= 15 A||1.52||| |||VGS= 4.5 V|ID= 30 A||2.2|3.0|| ||||ID= 15 A||2.2||| |Forward Transconductance|gFS|VDS= 1.5 V, ID= 15 A|||80||S| |**CHARGES, CAPACITANCES & GATE RESISTANCE**|||||||| |Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 15 V|||5505||pF| |Output Capacitance|COSS||||2355||| |Reverse Transfer Capacitance|CRSS||||90||| |Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||34||nC| |Threshold Gate Charge|QG(TH)||||3.8||| |Gate−to−Source Charge|QGS||||13.9||| |Gate−to−Drain Charge|QGD||||8.1||| |Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V; ID= 30 A|||76.5||nC| |**SWITCHING CHARACTERISTICS**(Note 6)|||||||| |Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V, ID= 15 A,
RG= 3.0�|||20.0||ns| |Rise Time|tr||||36.2||| |Turn−Off Delay Time|td(OFF)||||39.3||| |Fall Time|tf||||9.4||| 5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 6. Switching characteristics are independent of operating junction temperatures. **http://onsemi.com** **2** ## **NTMFS4934N** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) |**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**SWITCHING CHARACTERISTICS**(Note 6)|||||||| |Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 15 V, ID= 15 A,
RG= 3.0�|||13.2||ns| |Rise Time|tr||||33.3||| |Turn−Off Delay Time|td(OFF)||||49.7||| |Fall Time|tf||||7.8||| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Diode Voltage|VSD|VGS= 0 V,
IS= 30 A|TJ= 25°C||0.79|1.0|V| ||||TJ= 125°C||0.66||| |Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,
IS= 30 A|||59.1||ns| |Charge Time|ta||||28.3||| |Discharge Time|tb||||30.8||| |Reverse Recovery Charge|QRR||||70||nC| |**PACKAGE PARASITIC VALUES**|||||||| |Source Inductance|LS|TA= 25°C|||1.00||nH| |Drain Inductance|LD||||0.005||nH| |Gate Inductance|LG||||1.84||nH| |Gate Resistance|RG||||0.80||�| 5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 6. Switching characteristics are independent of operating junction temperatures. **http://onsemi.com** **3** **NTMFS4934N** ## **TYPICAL CHARACTERISTICS** **==> picture [495 x 629] intentionally omitted <==** **----- Start of picture text -----**
180 200
3.6 V to 10 V TJ = 25 ° C VDS = 10 V
160 V GS = 3.4 V 180
140 3.2 V 160
120 140
100 3.0 V 120
100
80 2.8 V 80 TJ = 125 ° C
60 60 TJ = 25 ° C
40 2.6 V 40
20 2.2 V 2.4 V 20 TJ = −55 ° C
0 0
0 1 2 3 4 5 1 1.5 2 2.5 3 3.5 4
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.0028 0.0026
ID = 30 A T J = 25 ° C
0.0026 TJ = 25 ° C 0.0024
0.0024 0.0022
VGS = 4.5 V
0.0022 0.0020
0.0020 0.0018
0.0018 0.0016
VGS = 10 V
0.0016 0.0014
0.0014 0.0012
3 4 5 6 7 8 9 10 20 40 60 80 100 120 140 160 180
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
1.7 100000
1.6 ID = 30 A VGS = 0 V
1.5 VGS = 10 V
1.4 TJ = 150 ° C
10000
1.3
1.2
1.1 TJ = 125 ° C
1
1000
0.9 TJ = 85 ° C
0.8
0.7
0.6 100
−50 −25 0 25 50 75 100 125 150 5 10 15 20 25 30
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature vs. Voltage
, DRAIN CURRENT (A) , DRAIN CURRENT (A)
ID ID
) � ) �
, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (
DS(on) DS(on)
R R
, LEAKAGE (nA)
(NORMALIZED) IDSS
, DRAIN−TO−SOURCE RESISTANCE
DS(on)
R
**----- End of picture text -----**
**http://onsemi.com** **4** **NTMFS4934N** ## **TYPICAL CHARACTERISTICS** **==> picture [236 x 177] intentionally omitted <==** **----- Start of picture text -----**
11
10 QTT
9
8
7
6
54 QGDGD TJ = 25J = 25 = 25 ° C
4
QGSGS
3
2 VDD = 15 VDD = 15 V = 15 V
1 VGS = 10 VGS = 10 V = 10 V0 V V
ID = 30 AD = 30 A = 30 A
0
0 10 20 30 40 50 60 70 80
QG, TOTAL GATE CHARGE (nC)G, TOTAL GATE CHARGE (nC), TOTAL GATE CHARGE (nC)
, GATE−TO−SOURCE VOLTAGE (V)
GS
V
**----- End of picture text -----**
**==> picture [493 x 617] intentionally omitted <==** **----- Start of picture text -----**
7000 11
TJ = 25 ° C 10 QTT
6000 Ciss V GS = 0 V 9
5000 8
7
4000
6
3000 C oss 54 QGDGD TJ = 25J = 25 = 25 ° C
QGSGS
2000 3
2 VDD = 15 VDD = 15 V = 15 V
1000
1 VGS = 10 VGS = 10 V = 10 V0 V V
Crss ID = 30 AD = 30 A = 30 A
0 0
0 5 10 15 20 25 30 0 10 20 30 40 50 60 70 80
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)G, TOTAL GATE CHARGE (nC), TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
1000 30
VDD = 15 V VGS = 0 V
ID = 15 A 25
VGS = 10 V
100 20
td(off) tr
td(on) 15 TJ = 125 ° C
10 10 TJ = 25 ° C
tf
5
1 0
1 10 100 0.4 0.5 0.6 0.7 0.8 0.9 1.0
RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current
1000
0 V < VGS < 10 V 200 I D = 37 A
SINGLE PULSE 10 � s 180
100 TC = 25 ° C 160
100 � s
140
10 1 ms
120
10 ms
100
1 80
60
0.1 THERMAL LIMITRDS(on) LIMIT dc 40
PACKAGE LIMIT 20
0.01 0
0.01 0.1 1 10 100 25 50 75 100 125 150
VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE ( ° C)
C, CAPACITANCE (pF)
, GATE−TO−SOURCE VOLTAGE (V)
GS
V
t, TIME (ns)
, DRAIN CURRENT (A)
ID
, DRAIN CURRENT (A)
ID
AVALANCHE ENERGY (mJ)
, SINGLE PULSE DRAIN−TO−SOURCE
AS
E
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** **http://onsemi.com** **5** **NTMFS4934N** ## **TYPICAL CHARACTERISTICS** **==> picture [480 x 176] intentionally omitted <==** **----- Start of picture text -----**
100
D = 0.5
0.2
10
0.1
0.05
0.02
1
0.01
0.1
SINGLE PULSE
0.01
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
t, TIME (s)
r(t)C/W)
( °
**----- End of picture text -----**
**Figure 13. Thermal Response** **==> picture [248 x 176] intentionally omitted <==** **----- Start of picture text -----**
260
240
220
200
180
160
140
120
100
80
60
40
20
0
0 10 20 30 40 50 60 70 80 90 100
ID (A)
GFS (S)
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**Figure 14. GFS vs. ID** **http://onsemi.com** **6** **NTMFS4934N** ## **PACKAGE DIMENSIONS** **==> picture [475 x 582] intentionally omitted <==** **----- Start of picture text -----**
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE G
2 X NOTES:
1. DIMENSIONING AND TOLERANCING PER
0.20 C ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
a D A 3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
2 B 2 X BURRS.
D1 MILLIMETERS
0.20 C
4 DIM MIN NOM MAX
A 0.90 1.00 1.10
A1 0.00 −−− 0.05
E1 4 X b 0.33 0.41 0.51
c 0.23 0.28 0.33
E D 5.15 BSC
2 D1 4.50 4.90 5.10
c D2 3.50 −−− 4.22
a A1 E 6.15 BSC
HH f ec t —= E1 5.50 5.80 6.10
P 1 2 3 T 4 ify EEE E2 3.45 −−− 4.30
e 1.27 BSC
TOP VIEW G 0.51 0.61 0.71
3 X C K 1.20 1.35 1.50
0.10 C S e h SEATINGPLANE = L1L 0.510.05 0.610.17 0.710.20
M 3.00 3.40 3.80
A DETAIL A 0 −−− 12
a ae
0.10 C STYLE 1:
PIN 1. SOURCE
SF SIDE VIEW DETAIL A SOLDERING FOOTPRINT* 2. 3. SOURCESOURCE
4. GATE
3X 4X 5. DRAIN
8X b 1.270 0.750
4X
0.10 C A B 1.000
0.05 c L e/2
1 fe 4 0.965 b oo ts
K
1.330 2X
ft an a 0.905
E2 2X
PIN 5 M 0.495 4.530
(EXPOSED PAD) L1
3.200
0.475
G ac D2 and
2X
BOTTOM VIEW 1.530
rah Lo 4.560 eS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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**----- End of picture text -----**
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