# Power MOSFET, N Channel, 30 V, 44 A, 0.0056 ohm, SO-8 FL, Surface Mount

![Product image](https://novapart.co/image/farnell:2317608/)

**URL**: https://novapart.co/products/NTMFS4926NT1G/power-mosfet-n-channel-30-v-44-a-00056-ohm-so-8-fl
**SKU**: NTMFS4926NT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2580
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Power Dissipation | 21.6W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 21.6W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0056ohm |
| Transistor Case Style | SO-8 FL |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 44A |
| Drain Source On State Resistance | 0.0056ohm |
| Gate Source Threshold Voltage Max | 1.6V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2317608/)

## NTMFS4926N 

## Power MOSFET 

## **30 V, 44 A, Single N−Channel, SO−8 FL** 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low Capacitance to Minimize Driver Losses 

- Optimized Gate Charge to Minimize Switching Losses 

**http://onsemi.com** 

- Optimized for 5 V, 12 V Gate Drives 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**==> picture [493 x 516] intentionally omitted <==**

**----- Start of picture text -----**<br>
 These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS<br>Compliant V(BR)DSS RDS(ON) MAX ID MAX<br>7.0 m  @ 10 V<br>Applications 30 V 44 A<br>• CPU Power Delivery ae 11.2 m  @ 4.5 V<br>• DC−DC Converters<br>D (5,6)<br>MAXIMUM RATINGS  (TJ = 25 ° C unless otherwise stated)<br>Parameter Symbol Value Unit<br>Drain−to−Source Voltage VDSS 30 V<br>Gate−to−Source Voltage VGS ± 20 V G (4)<br>Continuous Drain TA = 25 ° C ID 15.5 A<br>Current R(Note 1) JA TA = 100 ° C 9.8 S (1,2,3)<br>SFE Power Dissipation TA = 25 ° C PD 2.70 W N−CHANNEL MOSFET s i<br>ee RContinuous DrainJA (Note 1) ee TA ee  = 25 ° C ee ID ee 23.4 A MARKINGDIAGRAM<br>Current R(Note 1) JA ≤  10 s TA = 100 ° C 14.8 D<br>Power Dissipation TA = 25 ° C PD 6.13 W 1 S D<br>R JA ≤  10 s (Note 1) Steady S 4926N<br>Continuous Drain State TA = 25 ° C ID 9.0 A SO−8 FLAT LEADCASE 488AA S AYWZZ<br>+} TT) Current R(Note 2) JA |}STR TA = 100 ° C tt 5.7 STYLE 1 G D | D<br>Power Dissipation TA = 25 ° C PD 0.92 W<br>R JA (Note 2) A = Assembly Location<br>ee Continuous Drain ee e TC = 25 ° C e ID e ee 44 A Y = Year<br>STR Current R(Note 1) JC TC =100 ° C 28 WZZ = Lot Traceability= Work Week<br>Power Dissipation TC = 25 ° C PD 21.6 W<br>eeSlet RPulsed DrainJC (Note 1) T ee A = 25 ° C, tp = 10 s ee IDM ee 182 A = _<br>Current ORDERING INFORMATION<br>Current Limited by Package TA = 25 ° C IDmax 100 A Device Package Shipping [†]<br>Operating Junction and StorageTemperature TTSTGJ, −55 to+150 ° C NTMFS4926NT1G SO−8 FL 1500 /<br>eeee eee (Pb−Free) Tape & Reel<br>Source Current (Body Diode) IS 21 A<br>Drain to Source DV/DT dV/dt 6.0 V/ns NTMFS4926NT3G SO−8 FL 5000 /<br>(Pb−Free) Tape & Reel<br>rr Single Pulse Drain−to−Source Avalanche EAS 22 mJ ES<br>Energy (TJ = 25 ° C, VDD = 24 V, VGS = 20 V, †For information on tape and reel specifications,<br>ees Lead Temperature for Soldering PurposesIL = 21 Apk, L = 0.1 mH, RG = 25 ) TL ee 260 ° C including part orientation and tape sizes, pleaserefer to our Tape and Reel Packaging Specifications<br>″ Brochure, BRD8011/D.<br>es (1/8  from case for 10 s) ee ee<br>Stresses exceeding Maximum Ratings may damage the device. Maximum<br>Ratings are stress ratings only. Functional operation above the Recommended<br>Operating Conditions is not implied. Extended exposure to stresses above the<br>Recommended Operating Conditions may affect device reliability.<br>**----- End of picture text -----**<br>


1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

Publication Order Number: **NTMFS4926N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2012 **May, 2012 − Rev. 5** 

**NTMFS4926N** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**THERMAL RESISTANCE MAXIMUM RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Value**|**Unit**|
|Junction−to−Case (Drain)|R�JC|5.8|°C/W|
|Junction−to−Ambient – Steady State (Note 3)|R�JA|46.3||
|Junction−to−Ambient – Steady State (Note 4)|R�JA|136.2||
|Junction−to−Ambient – (t≤10 s) (Note 3)|R�JA|20.4||



3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

4. Surface−mounted on FR4 board using the minimum recommended pad size. 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= 250�A||30|||V|
|Drain−to−Source Breakdown Voltage<br>(transient)|V(BR)DSSt|VGS= 0 V, ID(aval)= 8.8 A,<br>Tcase=25°C, ttransient= 100 ns||34|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||25||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 24 V|TJ= 25°C|||1.0|�A|
||||TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA|
|**ON CHARACTERISTICS**(Note 5)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.32|1.6|2.2|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||3.8||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 30 A||5.6|7.0|m�|
||||ID= 15 A||5.6|||
|||VGS= 4.5 V|ID= 30 A||9.0|11.2||
||||ID= 15 A||8.7|||
|Forward Transconductance|gFS|VDS= 1.5 V, ID= 15 A|||40||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 15 V|||1004||pF|
|Output Capacitance|COSS||||390|||
|Reverse Transfer Capacitance|CRSS||||119|||
|Capacitance|CRSS/<br>CISS|VGS= 0 V, VDS= 15 V, f = 1 MHz|||0.119|0.237||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||8.7||nC|
|Threshold Gate Charge|QG(TH)||||1.4|||
|Gate−to−Source Charge|QGS||||3.0|||
|Gate−to−Drain Charge|QGD||||3.5|||
|Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V; ID= 30 A|||17.3||nC|
|**SWITCHING CHARACTERISTICS**(Note 6)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||8.6||ns|
|Rise Time|tr||||36.9|||
|Turn−Off Delay Time|td(OFF)||||14.7|||
|Fall Time|tf||||5.5|||



5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**2** 

## **NTMFS4926N** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**SWITCHING CHARACTERISTICS**(Note 6)||||||||
|Turn−On Delay Time|td(ON)|VGS= 10 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||6.6||ns|
|Rise Time|tr||||31.8|||
|Turn−Off Delay Time|td(OFF)||||18.3|||
|Fall Time|tf||||4.0|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 30 A|TJ= 25°C||0.87|1.1|V|
||||TJ= 125°C||0.76|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 30 A|||21.9||ns|
|Charge Time|ta||||11.0|||
|Discharge Time|tb||||10.9|||
|Reverse Recovery Charge|QRR||||8.0||nC|
|**PACKAGE PARASITIC VALUES**||||||||
|Source Inductance|LS|TA= 25°C|||1.00||nH|
|Drain Inductance|LD||||0.005||nH|
|Gate Inductance|LG||||1.84||nH|
|Gate Resistance|RG||||1.0|2.2|�|



5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**3** 

**NTMFS4926N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 591] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 100<br>10 V °<br>90 4.5 V TJ = 25 C 4.0 V 90 TJ = −55 ° C<br>80 80<br>70 3.6 V 70 TJ = 25 ° C TJ = 125 ° C<br>60 60 VDS = 10 V<br>50 3.2 V 50<br>40 40<br>30 30<br>VGS = 2.8 V<br>20 20<br>10 10<br>0 0<br>0 1 2 3 4 5 1 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.015 0.016<br>0.014 0.015<br>0.013 ID = 30 A 0.014 T = 25 ° C<br>0.012 0.013<br>0.011 0.012<br>0.010 0.011 VGS = 4.5 V<br>0.009 0.010<br>0.008 0.009<br>0.007 0.008<br>0.006 0.007<br>0.005 0.006 VGS = 10 V<br>0.004 0.005<br>0.003 0.004<br>3 4 5 6 7 8 9 10 10 20 30 40 50 60 70 80 90 100<br>VGS (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and<br>Gate Voltage<br>1.7 10,000<br>1.61.5 VIDGS = 30 A = 10 V TJ = 150 ° C<br>1.4<br>1.3 1,000 TJ = 125 ° C<br>1.2<br>1.1<br>1.0<br>0.9 100 TJ = 85 ° C<br>0.8<br>0.7 VGS = 0 V<br>0.6 10<br>−50 −25 0 25 50 75 100 125 150 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>, DRAIN−TO−SOURCE<br>IDSS<br>DS(on)<br>R RESISTANCE (NORMALIZED)<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**==> picture [187 x 20] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6. Drain−to−Source Leakage Current<br>vs. Voltage<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**4** 

**NTMFS4926N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 591] intentionally omitted <==**

**----- Start of picture text -----**<br>
1400 11<br>T J  = 25 ° C 10 QT<br>1200 Ciss V GS  = 0 V 9<br>1000 8<br>7<br>800<br>6<br>5<br>600 C oss 4 Qgs Qgd TJ = 25J = 25 = 25 ° C<br>400 3<br>200 C rss 2 VVGSDD = 10 V = 15 VVGSDD = 10 V = 15 VGSDD = 10 V = 15 VDD = 10 V = 15 V = 10 V = 15 V = 15 V<br>1<br>ID = 30 AD = 30 A = 30 A<br>0 0<br>0 5 10 15 20 25 30 0 2 4 6 8 10 12 14 16 18<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)<br>Figure 7. Capacitance Variation Figure 8. Gate−to−Source and<br>Drain−to−Source Voltage vs. Total Charge<br>1000 30<br>VGS = 10 V VGS = 0 V<br>VDD = 15 V 25<br>ID = 15 A<br>td(off)<br>100 tf 20<br>tr<br>15<br>10 td(on) 10<br>TJ = 125 ° C TJ = 25 ° C<br>5<br>1 0<br>1 10 100 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current<br>vs. Gate Resistance<br>1000 22<br>20 ID = 21 A<br>18<br>100<br>16<br>10  � s<br>14<br>10 100  � s<br>12<br>1 ms 10<br>1 Single Pulse0 V < VGS < 10 V 10 ms 8<br>TC = 25 ° C 6<br>0.1 RDS(on) Limit dc 4<br>Thermal Limit<br>2<br>Package Limit<br>0.01 0<br>0.01 0.1 1 10 100 25 50 75 100 125 150<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE ( ° C)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID , SINGLE PULSE DRAIN−TO−<br>AS<br>E<br>SOURCE AVALANCHE ENERGY (mJ)<br>**----- End of picture text -----**<br>


**==> picture [240 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
11<br>QT<br>10<br>9<br>8<br>7<br>6<br>5<br>4 Qgs Qgd TJ = 25J = 25 = 25 ° C<br>3<br>2<br>VVGSDD = 10 V = 15 VVGSDD = 10 V = 15 VGSDD = 10 V = 15 VDD = 10 V = 15 V = 10 V = 15 V = 15 V<br>1<br>ID = 30 AD = 30 A = 30 A<br>0<br>0 2 4 6 8 10 12 14 16 18<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** 

**http://onsemi.com** 

**5** 

**NTMFS4926N** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [480 x 176] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>D = 0.5<br>0.2<br>10<br>0.1<br>0.05<br>0.02<br>1<br>0.01<br>0.1<br>SINGLE PULSE<br>0.01<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>t, TIME (s)<br>r(t)C/W)<br>( °<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

**http://onsemi.com** 

**6** 

**NTMFS4926N** 

## **PACKAGE DIMENSIONS** 

**==> picture [475 x 582] intentionally omitted <==**

**----- Start of picture text -----**<br>
DFN5 5x6, 1.27P<br>(SO−8FL)<br>CASE 488AA<br>ISSUE G<br>2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>a D A 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>4 DIM MIN NOM MAX<br>A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.15 BSC<br>2 D1 4.50 4.90 5.10<br>c D2 3.50 −−− 4.22<br>a A1 E 6.15 BSC<br>HH f ec t —= E1 5.50 5.80 6.10<br>P 1 2 3 T 4 ify EEE E2 3.45 −−− 4.30<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.61 0.71<br>3 X C K 1.20 1.35 1.50<br>0.10 C S e h SEATINGPLANE = L1L 0.510.05 0.610.17 0.710.20<br>M 3.00 3.40 3.80<br>A DETAIL A 0  −−− 12<br>a ae<br>0.10 C STYLE 1:<br>PIN 1. SOURCE<br>SF SIDE VIEW DETAIL A SOLDERING FOOTPRINT*  2. 3. SOURCESOURCE<br> 4. GATE<br>3X 4X  5. DRAIN<br>8X b 1.270 0.750<br>4X<br>0.10 C A B 1.000<br>0.05 c L e/2<br>1 fe 4 0.965 b oo ts<br>K<br>1.330 2X<br>ft an a 0.905<br>E2 2X<br>PIN 5 M 0.495 4.530<br>(EXPOSED PAD) L1<br>3.200<br>0.475<br>G ac D2 and<br>2X<br>BOTTOM VIEW 1.530<br>rah Lo 4.560  eS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>ON Semiconductor  and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice<br>to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability<br>arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.<br>“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All<br>operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights<br>nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications<br>intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should<br>Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,<br>and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death<br>associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal<br>Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner.<br>**----- End of picture text -----**<br>


## **PUBLICATION ORDERING INFORMATION** 

## **LITERATURE FULFILLMENT** : 

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

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**NTMFS4926N/D** 

**7** 



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